CMOS INVERTER - University of California,...

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Digital Integrated Circuits © Prentice Hall 1995Inverter

CMOS INVERTER


The CMOS Inverter: A First GlanceVDD

Vin Vout

CL

2


CMOS Inverters

Polysilicon

InOut

Metal1

VDD

GND

PMOS

NMOS

1.2 µm=2λ


Switch Model of CMOS Transistor

Ron

|VGS | < |VT| |VGS | > |VT|

|VGS|

3


CMOS Inverter: Steady State Response

VDD VDD

VoutVout

Vin = VDD Vin = 0

Ron

Ron

VOH = VDD

VOL= 0

VM = Ronp) f(Ronn,


CMOS Inverter: Transient Response

VDD

Vout

Vin = VDD

Ron

CL

tpHL = f(Ron.CL)

= 0.69 RonCL

t

Vout

VDD

RonCL

1

0.5

ln(0.5)

0.36

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CMOS Properties

l Full rail-to-rail swingl Symmetrical VTCl Propagation delay function of load

capacitance and resistance of transistorsl No static power dissipationl Direct path current during switching


The MOS Transistor

Polysilicon Aluminum

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MOS Transistors - Types and Symbols

D

S

G

D

S

G

G

S

D D

S

G

NMOS Enhancement NMOS

PMOS

Depletion

Enhancement

B

NMOS withBulk Contact


Threshold Voltage: Concept

n+n+

p-substrate

DSG

B

VGS

+

-

DepletionRegion

n-channel

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The Threshold Voltage


The Body Effect

-2.5 -2 -1.5 -1 -0.5 00.4

0.45

0.5

0.55

0.6

0.65

0.7

0.75

0.8

0.85

0.9

VBS (V)

VT (V

)

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0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10

-4

VDS (V)

I D (A

)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Current-Voltage RelationsA good ol’ transistor

QuadraticRelationship

Resistive Saturation

VDS = VGS - VT


Transistor in Linear

n+n+

p-substrate

D

SG

B

VGS

xL

V(x) +–

VDS

ID

MOS transistor and its bias conditions

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Transistor in Saturation

n+n+

S

G

VGS

D

VDS > VGS - VT

VGS - VT+-

Pinch-off


Current-Voltage RelationsLong-Channel Device

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A model for manual analysis


Current-Voltage RelationsThe Deep-Submicron Era

LinearRelationship

-4

VDS (V)0 0.5 1 1.5 2 2.5

0

0.5

1

1.5

2

2.5x 10

I D (A

)

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Early Saturation

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Velocity Saturation

ξ (V/µm)ξc = 1.5

υ n ( m

/ s)

υsat = 105

Constant mobility (slope = µ)

Constant velocity


Perspective

IDLong-channel device

Short-channel device

VDSVDSAT VGS - VT

VGS = VDD

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ID versus VGS

0 0.5 1 1.5 2 2.50

1

2

3

4

5

6x 10-4

VGS (V)

I D (A

)

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10-4

VGS (V)

I D (A

)

quadratic

quadratic

linear

Long Channel Short Channel


A model for manual analysis

S D

G

B

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Simple Model versus SPICE

0 0.5 1 1.5 2 2.50

0.5

1

1.5

2

2.5x 10

-4

VDS (V)

I D (A

)


A PMOS Transistor

-2.5 -2 -1.5 -1 -0.5 0-1

-0.8

-0.6

-0.4

-0.2

0x 10

-4

VDS (V)

I D (A

)

Assume all variablesnegative!

VGS = -1.0V

VGS = -1.5V

VGS = -2.0V

VGS = -2.5V

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Transistor Modelfor Manual Analysis


The Transistor as a Switch

VGS ≥ VT

RonS D

ID

VDS

VGS = VDD

VDD/2 VDD

R0

Rmid

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0.5 1 1.5 2 2.50

1

2

3

4

5

6

7x 10

5

VDD (V)

Req

(Ohm

)



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The Sub-Micron MOS Transistor

lThreshold VariationslSubthreshold ConductionlParasitic ResistanceslLatch-up


Threshold VariationsVT

L

Long-channel threshold Low VDS threshold

Threshold as a function of the length (for low VDS)

Drain-induced barrier lowering (for low L)

VDS

VT

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Sub-Threshold Conduction

0 0.5 1 1.5 2 2.510

-12

10-10

10-8

10-6

10-4

10-2

VGS (V)

I D (A

)

VT

Linear

Exponential

Quadratic

Typical values for S:60 .. 100 mV/decade

The Slope Factor


Parasitic Resistances

W

LD

Drain

Draincontact

Polysilicon gate

DS

G

RS RD

VGS,eff

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Future Perspectives

25 nm MOS transistor (Folded Channel)


Voltage TransferCharacteristic

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PMOS Load Lines

VDSp

IDp

VGSp=-5

VGSp=-2VDSp

IDnVin=0

Vin=3

Vout

IDnVin=0

Vin=3

Vin = VDD-VGSpIDn = - IDp

Vout = VDD-VDSp

Vout

IDnVin = VDD-VGSpIDn = - IDp

Vout = VDD-VDSp


CMOS Inverter Load Characteristics

In,pVin = 5

Vin = 4

Vin = 3

Vin = 0

Vin = 1

Vin = 2

NMOSPMOS

Vin = 0

Vin = 1

Vin = 2Vin = 3

Vin = 4

Vin = 4

Vin = 5

Vin = 2Vin = 3

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CMOS Inverter VTC

Vout

Vin1 2 3 4 5

12

34

5

NMOS linPMOS off

NMOS satPMOS sat

NMOS offPMOS lin

NMOS satPMOS lin

NMOS linPMOS sat


Simulated VTC

0.0 1.0 2.0 3.0 4.0 5.0Vin (V)

0.0

2.0

4.0

Vou

t (V

)

CMOS INVERTER - University of California,...

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