October 2008 UniFETTM FDH50N50 F133 / FDA50N50 Sheets/Fairchild PDFs...October 2008 ©2008 Fairchild...
Transcript of October 2008 UniFETTM FDH50N50 F133 / FDA50N50 Sheets/Fairchild PDFs...October 2008 ©2008 Fairchild...
October 2008
©20FD
FDH
50N50_F133 / FD
A50N
50 500V N-C
hannel MO
SFET
TM
UniFETFDH50N50_F133 / FDA50N50 500V N-Channel MOSFETFeatures• 48A, 500V, RDS(on) = 0.105Ω @VGS = 10 V• Low gate charge ( typical 105 nC)• Low Crss ( typical 45 pF)• Fast switching• 100% avalanche tested• Improved dv/dt capability
DescriptionThese N-Channel enhancement mode power field effect transis-tors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.
This advanced technology has been especially tailored to mini-mize on-state resistance, provide superior switching perfor-mance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high effi-cient switched mode power supplies and active power factor correction.
S
D
G
GSD
TO-247FDH Series G SD
TO-3PNFDA Series
Absolute Maximum RatingsSymbol Parameter FDH50N50_F133/FDA50N50 Unit
VDSS Drain-Source Voltage 500 V
ID Drain Current - Continuous (TC = 25°C)- Continuous (TC = 100°C)
4830.8
AA
IDM Drain Current - Pulsed (Note 1) 192 A
VGSS Gate-Source voltage ±20 V
EAS Single Pulsed Avalanche Energy (Note 2) 1868 mJ
IAR Avalanche Current (Note 1) 48 A
EAR Repetitive Avalanche Energy (Note 1) 62.5 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD Power Dissipation (TC = 25°C)- Derate above 25°C
6255
WW/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL Maximum Lead Temperature for Soldering Purpose,1/8” from Case for 5 Seconds 300 °C
Thermal CharacteristicsSymbol Parameter Min. Max. Unit
RθJC Thermal Resistance, Junction-to-Case -- 0.2 °C/W
RθCS Thermal Resistance, Case-to-Sink 0.24 -- °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 40 °C/W
08 Fairchild Semiconductor Corporation 1 www.fairchildsemi.comH50N50_F133 / FDA50N50 Rev. A
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Package Marking and Ordering InformationDevice Marking Device Package Reel Size Tape Width Quantity
FDH50N50_F133 FDH50N50_F133 TO-247 - - 30
FDA50N50 FDA50N50 TO-3PN - - 30
Electrical Characteristics TC = 25°C unless otherwise noted
Symbol Parameter Conditions Min. Typ. Max UnitsOff Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 500 -- -- V
ΔBVDSS/ ΔTJ
Breakdown Voltage Temperature Coefficient ID = 250μA, Referenced to 25°C -- 0.5 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 500V, VGS = 0VVDS = 400V, TC = 125°C
----
----
25250
μAμA
IGSSF Gate-Body Leakage Current, Forward VGS = 20V, VDS = 0V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -20V, VDS = 0V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250μA 3.0 -- 5.0 V
RDS(on) Static Drain-SourceOn-Resistance VGS = 10V, ID = 24A -- 0.089 0.105 Ω
gFS Forward Transconductance VDS = 40V, ID = 48A (Note 4) -- 20 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25V, VGS = 0V,f = 1.0MHz
-- 4979 6460 pF
Coss Output Capacitance -- 760 1000 pF
Crss Reverse Transfer Capacitance -- 50 65 pF
Coss Output Capacitance VDS = 400V, VGS = 0V, f = 1.0MHz -- 161 -- pF
Coss eff. Effective Output Capacitance VDS = 0V to 400V, VGS = 0V -- 342 -- pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 250V, ID = 48ARG = 25Ω
(Note 4, 5)
-- 105 220 ns
tr Turn-On Rise Time -- 360 730 ns
td(off) Turn-Off Delay Time -- 225 460 ns
tf Turn-Off Fall Time -- 230 470 ns
Qg Total Gate Charge VDS = 400V, ID = 48AVGS = 10V
(Note 4, 5)
-- 105 137 nC
Qgs Gate-Source Charge -- 33 -- nC
Qgd Gate-Drain Charge -- 45 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain-Source Diode Forward Current -- -- 48 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 192 A
VSD Drain-Source Diode Forward Voltage VGS = 0V, IS = 48A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0V, IS = 48AdIF/dt =100A/μs (Note 4)
-- 580 -- ns
Qrr Reverse Recovery Charge -- 10 -- μC
NOTES:1. Repetitive Rating: Pulse width limited by maximum junction temperature2. L = 1.46mH, IAS = 48A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3. ISD ≤ 48A, di/dt ≤ 200A/μs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
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Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
10-1 100 10110-1
100
101
102 VGS
Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 VBottom : 5.5 V
Notes : 1. 250μs Pulse Test 2. TC = 25oC�
I D, D
rain
Cur
rent
[A]
VDS, Drain-Source Voltage [V]4 5 6 7 8 9 10
0.1
1
10
100
Notes : 1. VDS = 40V 2. 250μs Pulse Test
-55o C�
150o C�
25o C�
I D ,
Dra
in C
urre
nt [
A]
VGS , Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward VoltageDrain Current and Gate Voltage Variation vs. Source Current
and Temperatue
0 25 50 75 100 125 150 1750.0
0.1
0.2
0.3
0.4
VGS = 20V
VGS = 10V
Note : TJ = 25oC
RD
S(O
N) [Ω
],D
rain
-Sou
rce
On-
Res
ista
nce
ID, Drain Current [A]0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
0
40
80
120
160
25oC
150oC
Notes : 1. VGS = 0V 2. 250μs Pulse Test
I DR ,
Rev
erse
Dra
in C
urre
nt [
A]
VSD , Source-Drain Voltage [V]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
10-1 100 101 1020
2,000
4,000
6,000
8,000
10,000
12,000Ciss = Cgs + Cgd (Cds = shorted)Coss = Cds + Cgd
Crss = Cgd
Notes : 1. VGS = 0 V 2. f = 1 MHz
Crss
Coss
Ciss
Cap
acita
nce
[pF]
VDS, Drain-Source Voltage [V]0 20 40 60 80 100 120
0
2
4
6
8
10
12
VDS = 250V
VDS = 100V
VDS = 400V
Note : ID = 48A
VG
S, G
ate-
Sou
rce
Vol
tage
[V]
QG, Total Gate Charge [nC]
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Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variationvs. Temperature vs. Temperature
-100 -50 0 50 100 150 2000.8
0.9
1.0
1.1
1.2
Notes : 1. V
GS = 0 V
2. ID = 250 μA
BV
DS
S, (
Nor
mal
ized
)D
rain
-Sou
rce
Bre
akdo
wn
Vol
tage
TJ, Junction Temperature [oC]-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
Notes : 1. VGS = 10 V 2. ID = 24 A
RD
S(O
N),
(Nor
mal
ized
)D
rain
-Sou
rce
On-
Res
ista
nce
TJ, Junction Temperature [oC]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Currentvs. Case Temperature
100 101 102 10310-1
100
101
102
103
10 us
DC10 ms
1 ms100 us
Operation in This Area is Limited by R DS(on)
Notes : 1. TC = 25 oC
2. TJ = 150 oC 3. Single Pulse
I D, D
rain
Cur
rent
[A]
VDS, Drain-Source Voltage [V]
25 50 75 100 125 1500
10
20
30
40
50
I D, D
rain
Cur
rent
[A]
TC, Case Temperature [oC]
Figure 11. Typical Drain Current Slope Figure 12. Typical Drain-Source Voltagevs. Gate Resistance Slope vs. Gate Resistance
0 5 10 15 20 25 30 35 40 45 500
5
10
15
20
25
30
35
40
45 Notes : 1. VDS = 400 V 2. VGS = 12 V 3. ID = 25A
4. TJ = 125oC�
dv/dt(off)
dv/dt(on)
dv/d
t [V
/nS
]
RG, Gate resistance [Ω]0 5 10 15 20 25 30 35 40 45 50
0
500
1,000
1,500
2,000
2,500
3,000
3,500
4,000 Notes : 1. VDS = 400 V 2. VGS = 12 V 3. ID = 25A
4. TJ = 125oC
di/dt(off)
di/dt(on)
di/d
t [A
/μS
]
RG, Gate resistance [Ω]
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Typical Performance Characteristics (Continued)
Figure 13. Typical Switching Losses vs. Figure 14. Unclamped Inductive Switching Gate Resistance Capability
0 5 10 15 20 25 30 35 40 45 500
200
400
600
800
1,000
Notes : 1. VDS = 400 V 2. VGS = 12 V 3. I
D = 25A
4. TJ = 125oC�
Eoff
Eon
Ene
rgy
[μJ]
RG, Gate resistance [Ω]0.01 0.1 1 10 1001
10
100
Starting TJ = 150oC
Notes : 1. If R = 0 Ω tAV = (L)(IAS)/(1.3 Rated BVDSS - VDD) 2. If R ≠ 0 Ω tAV = (L/R)In[(IAS x R)/(1.3 Rated BVDSS - VDD)+1]
Starting TJ = 25oC
I AS, A
vala
nche
Cur
rent
[A]
tAV, Time In Avalanche [ms]
Figure 15. Transient Thermal Resistance Curve
10-5 10-4 10-3 10-2 10-1 100 10110-3
10-2
10-1
Notes : 1. Z
θJC(t) = 0.2 oC/W Max. 2. Duty Factor, D=t1/t2
3. TJM - TC = PDM * ZθJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
Z θJC(t)
, The
rmal
Res
pons
e
t1, Square Wave Pulse Duration [sec]
5 www.fairchildsemi.comH50N50_F133 / FDA50N50 Rev. A
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Mechanical Dimensions
TO-247AB
Dimensions in Millimeters
6 www.fairchildsemi.comH50N50_F133 / FDA50N50 Rev. A
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Mechanical Dimensions
Dimensions in Millimeters
TO-3PN
7 www.fairchildsemi.comH50N50_F133 / FDA50N50 Rev. A
8 www.fairchildsemi.comFDH50N50_F133 / FDA50N50 Rev. A
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50N50_F133 / FD
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Rev. I37
TRADEMARKSThe following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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tm
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