Amplificadores de Potência (Estágios de Saída)

Amplificadores de Potência(Estágios de Saída)

EEL 7303 – Circuitos Eletrônicos AnalógicosJader A. De Lima UFSC, 2013

Prof. Jader A. De Lima

Ex: amplificadorde audio

η% - eficiência do amplificador

Pout – potência de saída do amplificador entregue à carga

Pdc – potência DC retirada da fonte de alimentação

Output Stage Requirements:

• deliver a specified amount of signal power to a load

with acceptably low levels of signal distortion;

• high input impedance/low output impedance (why?);

• low quiescent power (when the input signal is zero

the power dissipation should be low).

Estágios de Sáida (Estágios de Potência)

Collector current waveforms for transistors operating in (a) class A, (b) class B,

(Continued) (c) class AB, and (d) class C amplifier stages.

Estágios de Sáida (Estágios de Potência)

Classe A - Seguidor de Fonte

( )oLm

0ioutin

∞→=x

oL0vinout

1//r//Rr ≅==

Vcc - Vcesat

Vcc - Vcesat + Vbe

- RL Is + Vbe

• Classe A (seguidor de emissor) com fonte de corrente

- RL Is

• class-A efficiency:

( )CEsatCC VVvo −=2

CEsatCC

1maxmin

( )CEsatCC

CEsatCC

−−

CEsatCC

VV −=

1maxη

Ex: VCC = 3V e VCEsat = 0.3V → ηηηηmax = 22.5%

< 25% !!

• Class A amplifiers ( the transistor conducts for the entirecycle of the input signal) are highly (power) inefficient.

• Large power dissipation occurs even for no signal input (standby).

• Why save power?

• Preserve natural resources/reduce pollution

• Extend battery life

• Reduce costs, improve reliability (power wasted

is dissipated in the active devices: temperature↑,

performance ↓, chance of failure↑ and larger

devices are required → cost ↑

• class-A amplifier with inductive coupling

• small speaker of 3.2Ω (8Ω) needs only 100mW (500mW) to operate

• class-A amplifier may be adequate for output power of a few hundred mW

• using the transformer impedance reflexion, speaker load apperas (Np/Ns)2 larger

at the collector; Ex: if turns ratio is 10:1, a 3.2Ω-speaker appears as 320Ω load.

Classe B – Push-Pull

Transfer characteristic for the class B output stage

• Distorção de cruzamento (crossover distortion)

• class-B efficiency:

≈ 78.6%

• class-B amplifier with inductive coupling

• however, audio transformers are bulky and expensive

Classe AB – Push-Pull (eliminar distorção de cruzamento)

Class AB output stage. A bias voltage VBB is applied between the bases of QN and QP, giving rise to a bias current IQ .Thus, for

small vI, both transistors conduct and crossover distortion is almost completely eliminated.

• quiescent current

• D1 (D2) must match VBE curves of QN (QP)

in saturation current , area and temperature;

• compensating biased diodes

in saturation current , area and temperature;

→ only good approach for integrated deisgn

ex:Determinar o rendimento do estágio:

i) Ibias

ii) IC_pk (transistor lim saturação)

iii) IC_av

iv) Idc

v) Pdc

vi) PL_max

vii) η

( ) ( )W

CEsatCCL 85.4

max =−

%8.75%1004.6

85.4%100

maxmax === xx

• push-pull com multiplicador de VBE

VBB = VBE1 (1 + ( R2 / R1 ))

- curvas dos BJTs devem ser consultadas para se determinar correto valor de VBB

Projeto Multiplicador VBE

• passo #1

QPNPBEQQNPNBEQBB IVIVV @@ __ += R2/R1 definido

max_max__

21_max__max_3

max_max__max_33

RQCNPNBR

onpnBERCC

• no máximo de excursão no semiciclo positivo tem-se:

• passo #2

max_max__max__

NPNCNPNB

==ββ

R3 definido

para IB_Q1 << IR2

Obs:assume-se um valor inicial para IC_Q1 para se determinar VBE_Q1 a partir

Da curva característica IC x VBE de Q1

max_max__

11_max__max_4

max_max__max_44

RQEPNPBR

opnpBERCC

• no máximo de excursão do semiciclo negativo tem-se:

• passo #3

max_max__max__

PNPCPNPB

=≅ββ

R4 definido

• passo #4

• re-calcular valores de IR2 e VBE_Q1

• no caso de diferença importante, reiniciar a partir do passo #2

Homework

• Considerando npn Q2N2222 e pnp Q2N3906, projetar um estágio

classe-AB para IQ = 5mA, RL = 8Ω e Vo_max = 2.5V. Admitir fontes

simétricas, sendo VCC = 5V.

• capacitive coupling is not the preferred coupling mechanism for audio push-

pull stages (bulky caps!)

• common-emitter driver: In addition to providing a higher input resistance, the

buffer Q1 biases the output transistors Q2 and Q3

driver(Av ~ R3/R4)

The Darlington configuration.

The compound-pnp configuration.

The Darlington configuration.

• overload protection

• short-circuit protection occurs by sensing

current threough R6

• VR6 = VBE_Q15

• When load current reaches a given limit, Q15

becomes forwardly-biased and diverts any

further base current of Q14

→ load current no longer increases

• thermal shutdown

• Q2 acts as a swicth and is normally off at

operating temperatures

• with temperature increase above a given threshold,

positive tempco of Zener and negative tempco of

VBE_Q1 increses Q1 current

→ VBE_Q2 increases and Q2 turns on

• power opamp

low-powergain stage

current booster

buffer

gain stage

• when Q5 turns on, it sources

additiona load current

• when Q6 turns on, it sinks

additiona load current

• bridge amplifier

critical match

Class C (tuning amplifier)

• power devices conducts less than 180o

tank is driven by current pulses

rich in harmonics(f, 2f, 3f, ..., nf)

fundamental frequency f

only ressonancefrequency f

(like pure sinewave)

Very-low impedance at harmonics → no gain

• Coil Q > 50• class-C amps have Q > 10 usually

(for overall circuit)

narrowband operation

- determine:

• resonance frequency: fr

• bandwidth: BW

class-A, B, AB

Class D

class-D

• power devices (normally MOSFETs) operate as switches (either fully ON or

OFF) → reducing their power losses (efficiency 90 – 95% is possible, as swicthes

have zero DC current when not switching and low VDS when conducting)

• input signal modulates a PWM carrier that drives the output switches

• commonly used in audio power amplifiers

high-side

~ lossless filter

high-side

low-side

Despite the complexity involved, a properly designed class D amplifier offers the following benefits:

• Reduction in size and weight of the amplifier

• Reduced power waste as heat dissipation and hence smaller (or no) heat sinks

heat sinks

• Reduction in cost due to smaller heat sink and compact circuitry

• Very high power conversion efficiency, usually better than 90% above one quarter of the amplifier's maximum power, and around 50% at low power levels

Using Feedback to Improve Performance

• Many class D amplifiers utilize negative feedback from the PWM output back to the input of the device.

• A closed-loop approach:• improves linearity• allows better power-supply rejection.

• Open-loop amplifier inherently has minimal (if any) supply rejection.

• In closed-loop topology, as the output waveform is sensed and fed back to the input of the amplifier, deviations in the supply rail are detected at the output and corrected by the control loop.

• Drawback: control loop must be carefully designed and compensated to ensure stability under all operating conditions

• Many Class D amplifiers are implemented as full-bridge output stage.

• A full bridge uses two half-bridge stages to drive the load differentially.

• The full-bridge configuration operates by alternating the conduction path through

Half Bridge vs. Full Bridge

• The full-bridge configuration operates by alternating the conduction path through

the load. This allows bidirectional current to flow through the load without the need

of a negative supply or a DC-blocking capacitor.

• Half-bridge amplifier:

• output swings between VDD and ground and idles at 50% duty cycle

→ output has a DC offset equal to VDD/2.

• efficiency >90% while delivering more than 14W per channel into 8Ω.

• Full-bridge amplifier:

• does not require DC-blocking capacitors on outputs when operating from a

single supply

→ offset appears on each side of the load, which means that zero DC current

flows at the output.

• can achieve twice the output signal as the load is driven differentially. → 4x

increase in maximum output power over a half-bridge amplifier operating from

the same supply (at cost of twice as many MOSFET switches)

• efficiency in the range of 80% to 88% with 8Ω loads

Class E

• current I is diverted through C1 when S1 is opened (see IC and IS)

• RFC: only DC current

• Theorectical zero overlap between VDS and IS → ideally 100% efficiency

• LC resonator ensures single tone at output

high Qhigh L

• C1: shunt cap to switch ( + device parasitics) – exact value for max efficiency

• L2 – C2 resonates below the operating frequency (↑Q → sinewave output current)

→ excessive inductive reactance → max efficiency at center frequency (not max power)

• ↑ L1 RF choke (only DC current)

• switch driven with 50%-duty cycle

Rise of Vds is delayeduntil Is = 0

Vds returns to zero before Is increases

• efficiency as function of duty-cycle

Safe Operating Area (SOA)

• voltage and current conditions over which the device can be

expected to operate without self-damage

(only BJT´s)

Transistor Power Rating

• temperature at collector junction places a limit on allowable power

dissipation PD.

Ex: 2N3904 → Tj (max) = 150oC

2N3710 → Tj (max) = 200oC

• ambient temperature: heat produced in junction passes through the transistor

case (metal or plastic) and radiates to the surrounding air (ambient

temperature, usually around 25oC)

• Derating Factor: data sheets often specify PD (max) @25oC.

Ex: 2N1936 has PD (max) @25oC = 4W.

• What happens if temperature is higher than 25oC? → power rating must be

derated (reduced)

• Power Derating

• Heat Sinks

• increase transistor power rating

→ area of transistor case is increased

Ex: assuming the circuit below must operate from 0oC to 50oC, what is the

maximum power rating of the transistor?

• for TO-92 case, PD(max) = 625mW@25oCderating factor D = 5mW/oC

Ex: assuming the circuit below must operate from 0oC to 50oC, what is the

maximum power rating of the transistor?

• for TO-92 case, PD(max) = 625mW@25oCderating factor D = 5mW/oC

• Failure mechanisms in ICs are accentuated by increased temperatures

(leakage in reverse biased diodes, electromigration, and hot-electron

trapping).

• To prevent failure, the die temperature must be kept within certain

ranges:

• commercial devices [0° to 70°C]

• military parts [–55° to 125°C]

• 40-pin DIP has a thermal resistance of 38 °C/W (natural) and 25 °C/W

(forced air convection).

→ DIP can dissipate 2 watts (natural) or 3 watts (forced), and still

keep the temperature difference between the die and the

environment below 75 °C

• PGA has thermal resistance from 15 ° to 30 °C/W.

Electromigration

REFERÊNCIAS:

• Fundamentals of Microelectronics, B. Razavi, John Wiley

and Sons, 2006

• Microelectronic Circuits, A. Sedra and K. Smith, Oxford

university Press, 5th Edition, 2003

• Analysis and Design of Analog Circuits, Gary, Hurst, Lewis

and Meyer, 4th Edition, 2001

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