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Page 1: [IEEE 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT) - Hsinchu, Taiwan (27-29 April 2005)] 2005 IEEE VLSI-TSA International Symposium on

On Improving Dynamic Range of Wideband Multistage EA Modulator Using Nonlinear Oscillation

Teng-Hung Chang', Lan-Rong Dung', and Jwin-Yen Guo2

'Department of Electrical and Control Engineering National Chiao Tung University

Hsinchu, Taiwan, ROC E-mail: thchang.ece9 [email protected]

* Trendchip Technology Corporation@ Rsinchu, Taiwan, ROC

E-mail : j yguo@trendchip. com.tw

ABSTRACT

This paper presents an improved architecture of the multistage (MASH) muItibit sigma-delta modulators @AMs). The architecture can be immune to circuit nonidealities over a large portion of input range when oversampling ratio (OSR) is low, and hence the dynamic range [DR) can be improved. Our approach is based on two resonator topologies, h i g h 9 cascade-of-resonator-with-fecdforward (IIQCRFF) and low-Q cascade-of-mtegrator-with-feedforward (LQCIFF). The key lo improving DR is to use HQCRFF-based single-bit structure in the first stage and have the first stage oscillated. When the first stage oscillates, the coarse quantization noise vanishes and hence circuit nonidealities, such as finite op-amp gain and capacitor mismatching, do not cause leakage quantization noise problem. In addition, because of tbe in-band zeros introduced by the resonators, the proposed architecture enhances the suppression of the in-band quantization noise for wideband applications. As the results of simulabon, the proposed MASH architecture can inherently have wide DK without using additional. calibration techniques

1- INTRODUCTION

With the increasing demand of ZAM with broader bandwidth and higher dynamic range (DR), researchers have exploited new architectures or structures with IOW oversampling ratio (OSR). However, for low OSR, the ZAM becomes very sensitive to circuit imperfection and requircs high-quality components 11-31. Recently, high-order single-stage and multistage multibit TAMS become attractive to ZAM designers in that they can-effectively reduce the OSR while maintaining the desired resolution for wideband applications. The single-stage multibit architecture is less sensitive to circuit imperfections, but the digital-to-analog converter (DAC) in the feedback path requires extremely high linearity. The multistage [MASH), multibit architecture can increases thc order of the noise shaping and avoids the stability problem as well. Nevertheless, the achievable rcsolution of a MASH multibit EAM is usually limited by circuit nonidealities, such as fmite op-amp gain and capacitor mismatching.

tn this paper, we propose a new architecture that not only takes advantages of using the MASH structure and introducing additional zeros into the NTF but also relieves the DR degradation caused fiom ihc circuit nonidealities. The key to improving DR is to have the first stage of the MASH architecture oscillated. According to this

concept, we use HQCRFF-based single-bit modulator at the first stage and LQCIFF-based multibit modulator at the second stage. Depending on the input amplitude, the frst stage based on HQCRFF singIe-bit structure can operate in either modulation mode or oscillation mode [4-61. When the input amplitude is less than a threshold level, the first stage oscillates because its internal loop is high-Q lossless resonator. According to experimental results, the threshold level of this oscillation varies with the OSR of the modulator; that is, the lower the OSR the higher the threshold level. It implies that the architecture can be immune to circuit nonidealities over a large portion of input range when OSR is low.

11. RESONATOR-BASED EA MODULATORS

I I (4

Fig. 1: (a) T h e second-order LQCIPF-based single-bit E M . (b) The second-order HQCRFF-based single-bit CAM.

Fig. 1 shows the low-Q cascade-of-integrator-with-feedforward (LQCIFF) and high-Q cascade-of-resonator-with-feedfonvard (HQCRFF) single-bit E m s . To simplify the analysis, instead of modeling the quantizer as a nonlinear function, we assumc the quantization noise is white and additive. The signal and noise transfer hctions (STPs and NTFs) of the LQCIFF- and HQCRFF- based modulators can be approximately expressed as:

0-7803-9060-1 /05/$20.00 02005 IEEE 31 9

Page 2: [IEEE 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT) - Hsinchu, Taiwan (27-29 April 2005)] 2005 IEEE VLSI-TSA International Symposium on

From Eq. (I), both NTFs contain a pair of complex-conjugate zeros and thus have a notch frequency, determined by TCSOMtOr loop gain, ulug, . According to papers [7, 81, the two complex zeros of HQCRFF-based modulator can be used to suppress the in-band quantization noise. Paper [7] finds the optimal resonator loop gain, r = aiagl by the Eq. (2).

where Bop, is the optimal zero angle of 0.

The main difference between HQCRFF and LQCIFF is on quality factors of their loop filters. As shown in Fig. 2, the loop filters of HQCRFF and LQCIFF have the same resonance kequency but different values of quality factor Q.

Fig. 2: The frequency responses of the loop filters o f the LQCIFF- and HQCRFF-based modulators.

Based on Eq. (I), the equivalent loop filter of the HQCRFF- based modulator can be derived as:

By substituting Eq. (2) into Eq. (3) and assuming al=02=l, the equivalent loop filter of the HQCRFF-based modulator can be obtained as follows:

2cos OOP$ - z-2

1 - 2 cos oopz-' + 2-1 F ( z ) = (4)

According to papers [4, 51, by using nonlinear dynamic analysis, the loop filter F(z) arises nonlinear oscillation. The occurrence of nonlinear oscillation lies on OSR and input amplitude. Given an OSR, there exists a threshold level to switch between oscillation and modulation modes. We therefore define the threshold level as the threshold voltage. When the input amplitude is smaller than the threshold voltage, the HQCRFF is out of the oscillation mode and into the modulation mode. In this paper, we use numerical simulation to find the approximate threshold level. The results of numerical simulation are shown in Fig. 3. Note that the sinusoid and band-

limited signals are used to dctemine the threshold level of oscillation, respectively. The input sampling data of simulation are equal to 2048.

-254

1 5 3 Q 3 S Z Q Z 5 a % a & i

OSR

Fig. 3: The input threshold level curves against OSR in oscillation mode.

According to Fig. 3, we can find that the larger the resonator loop gain or the lower the given OSR, the higher the threshold level. The maximum threshold level is approximately limited by O.lV, i.e., -25 d13 for very low OSR applications. It implies that one cannot make the HQCRFF operate in the oscillation mode for the whole input range. In the following subsection, we will address the how this oscillation can be use to improve the DR of a MASH EAM in detail.

A . HQCRFF-bmcddUnSH 2-2 ZAM

I Pig. 4: The Black diagram of the proposcd MASH 2-2 architecture

Fig. 4 shows the proposed MASH 2-2 architecture in which the fust stage is HQCRFF-based structure and the second stagc is LQCLFP-based multibit structure. When the first stage is operating in modulation mode, after the digital cancellation, the modulator output can he expressed as:

whcre Xz), &(z), and Em&) represent the input signal, single-bit quantization noise, and multihit quantization noise, respectively. The NTF of the proposed MASH 2-2 architecture now becomes d,H2(z)NEJ~~b{z). Since the digital cancellation filter, H2(z) is

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Page 3: [IEEE 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation & Test (VLSI-TSA-DAT) - Hsinchu, Taiwan (27-29 April 2005)] 2005 IEEE VLSI-TSA International Symposium on

essentially equal to the numeratnr of NTF,,, and has a pair nf complex zeros, the NTF has two pairs of complex zeros. Accordingly, the optimum values of the two resonator loop gains rLrtr~uiazgl and rcm=a3u&z can be expressed as: [8]

0

-20

22 4 0 - g 43:

E m - & -lw .- ln

-120

5 -140

3 -160

-180

Introducing these two pairs of the complex zeros can further suppress the h-band quantization noise by a factor of approximately 13 dB. However, the improvement relics on perfect matching between the numerator of iVTFmF and H2(z). When mismatching occurs, the single-bit quantization noise will be leaked to modulator output and consequently the modulator performance is degraded. To avoid the lcakage quantization noise, we utiIize the oscillation of the HQCKPF structure. When the fwst stage is in osciliation mode, the outputs of second integrator in HQCRFF-based modulator can be expressed a [6]

, , , . , . , ~ , . , -

-

- 1 1 -

1 , I . I . I

where R(z) and O(z) represent the resonant signal of HQCRFF structure and a period-2 (+I -1 +1 -I...) oscillating signal at fJ2, respectively. The period3 oscillating signal is caused by limit cycle behavior and makes the single-bit quantizer lose the capability of the errnr tracking Since the feedback path loses the capability of the error tracking, the first stage output contains nothing expect far period-2 oscillating signal. Forlunately, the nonlinear oscillation of HQCRFP makes the second integrator, lz(z) act as a carrier signal for the inpiit sinusoidal signal. This carrier signal is directly passed to second stage for further process. Therefore, in oscillation mode, the derivation of the proposed MASH 2-2 output after the digital cancellation becomes

(8) y,, (2) = S r F , , ( d 1 2 , A z ) + f l % E x (z)E_, (2)

Ymz-*,&) = d ,H2(z )G"z)

= .-'x(z)+~~,H,(z)R(z)+~,H,(z)NTI.;,((z)E,,(z)

Comparing Eq. (8) with Eq. (9, the oscillation of the fnst stage makes the output of MASH 2-2 have a new additional term dlH2(z)R(z). To deal with the new term, Fig. 5 shows the output spectra of some internal nodes in the modulator.

fa)

E .im

Y)

-1sp

Ibl

Fig. 5: The spectra of (a) the second integrator T l , o s c ( ~ ) , (b) the second stage output Y~(z), and (d) the output after cancellation logic Y(z) in the proposed MASH 2-2 architecture. (c) The frequency response of digital cancellation filter Hz(z).

In the Fig. 5(a) and (c), R(z) is trapped into lhe notch of Hz(z) and hence the new term can be dismissed, Therefore, the Eq. (8) can be modified as:

From Eqs. (5) and (9). we can find YMsH2.2, o.Ic is equivalent to Ymm 2 2 . Thus, the oscillation of the first stage does not make the modulator out-ofyrder and, furthermore, it can make the modulator to be immune to the leakage quantization noise.

B. Circuit Nonidealities Analysis

However, If Hz(z) and the numerator of NTFm&z) are not perfectly matching, the in-band idle tone (or resonant signal) may degrade the modulator performance. The 111 and p2 denote the inverse op-amp dc gains used for the first and second integrators of the HQCRFF-based modulator By numerical analysis, Fig. 6 illusbates the relation between the power of the resonant signal and p1+p2 for a given OSR of 8.

Fig. 6: The power of the resonant signal as a function of p,+,u2.

As shown in Fig. 6, the power of resonant signal can be suppressed whcn ,U!+& is large, i.e. the op-amp's gains are small. When the fust stage is in the modulation mode, small op-amp gains will cause serious leakage quantization noise. Therefore, we need to properly choose the op-amp gains to balance the power of resonant signal and leakage quantization noise. The lower the power of resonant signal the better the performance in the oscillation mode; whereas, the lower the leakage quantization noise thc better the performance in the modulation mode. Note that the DR is determined by the performance of oscillation mode and the peak SNDR is determined by the performance of modulation mode. In the later section, Fig. 8 will clearly show this fact. At a very low OSR, the finite opamp gain of 60 dB is sufficient lo make the in-band resonant signal under the noise floor while the peak SNDR i s moderate, say 72 dB.

111. SIMULATION RESULTS

T h e proposed HQCRFF-based MASH 2-2 architecture has been simulated in MATLAB@. The modulator was designed with a sampling rate of 61.44 MHz, a fixed OSR of 8, yielding a signal bandwidth of 3.84 MHz. The single-bit and four-bit quantkers are used for the first- and second-stage modulators, respectively. The scaling loop gains are set to 2 0 , = 2 0 ~ = ~ 7 ~ = ~ ~ = I , bl=l , b2=2, g,=0.45, and g2*.o18. The Finite opamp dc gain, capacitor mismatching and four-bit DAC linearity are set to 60 dB, 0.2% and 0.5%FS, respectively. The same circuit specifications are also applied to the traditional MASH 2-2 architecture [9] for comparison. The output

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spectra in hnth modulation (input level= -3dR) and oscillation modes (input level= -30dB) are shown in Fig. 7, where the DAC error is not included to emphasize immunity of the leakage single-bil quantization noise of the proposed MASH 2-2 in oscillation mode.

~

RMASH 2-2 Architectures (proposed)

Fig. 7: The output spectra of the proposed U S H 2-2 (a) with ideal case, (b) with circuit nonidealities in modulation mode, (c) with ideal case, and (d) with circuit nonidealities in oscillation mode.

Fig. 8 illushates the SNDR against input level for the proposed MASH 2-2 multibit EAMs with Monte Carlo analysis of 30 times. According to Fig. 8, because of the oscillation operation, the proposed MASH 2-2 approach has the high DR inherently. Comparing to traditional architecture with circuit nonidealities, the DR approximately increases 20 dB. However. the achievable peak SNDR of the proposed modulator is still degraded by circuit nonidealities in that the first stage is operating in the modulation mode. The possible solution for reducing this degradation is to pay proper attention to layout geometry. Doing so, the variance of the relative mismatch can be as small as 0.1-0.2%. Table I presents a summary and comparison of the traditional and proposed MASH 2-2 architectures.

MASH 2-2 (traditional)

Monte Catlo Analyds (30 times)

I+ Level IdB]

80.9 dB Peak SNDR (ideal case)

Fig. 8: The SNDR against input level in the proposed MASH 2-2 with Monte Carlo analysis.

64.9 dB

IV. CONCLUSION

72 dB

68.5 dB

84 dB

84 dB

Peak SNDR (nonideal case)

Peak SNDR [worst case)

Dynamic Range (ideal case)

Dynamic Range (nonideal case)

A wideband and high DR MASH architecture is proposed. The main contributions of the proposed HQCRFF-based MASH architectures are: I ) The proposed MASH architecture introduces

61 dB

59 dB

68 dB

64.5 dB

the complex-cnnjugate 7eros tn suppress the in-hand quanti~ation noise and hencc enhances the peak SNDR of the CA A D converters. 2) The use of HQCRFF-based single-bit structure in the first stage can effectively make the modulator insensitive to the circuit nonidealities and hence improve DR. Note that this improvement is intrinsic in the proposed architectures. Unlike the other published MASH architectures, the proposcd modulator does not need calibration techniques to compensate the circuit mismatch. This makes the implementation robust and reduces the circuit complexity. 3) The other MASH architectures can take advantage of t h s DR improvement when using the HQCWF-based single-bit structure in the first stage. The detailed nonlinear oscillation of the proposed architecture, such as transient behavior will be addressed in the future publication.

84 dB Dynamic Rangc (worst case)

TABLE 1: SUMMARV AND COMPARISON OF THE TRADITIONAL AND PROPOSED MASH 2-2.

63.9 dB

REFERENCES

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J. Silva, U.-K. Moon, J. Steensgaard, and G. C. Temes, “Wideband low-distortion delta-sigma ADC topology,” IEE Electron. Left., vol. 37, pp. 737-738, Jun. 2001. 0. Feely and D. Fitzgerald, “Bandpass SD modulator - an analysis kom the perspective of nonlinear dynamics,” in Pruc. IEEEISCAS, May 1996, pp. HI 146-149. A. C. Davies, “Periodic non-linear oscillations from bandpass ZA modulators,” in Proc. IEEE ISCAS, May 1996, pp. I1 469- 472. T.-H. Chang and L.-R. Long, “Resonator-based multi-stage EA modulator for wideband applications with improved dynamic range,” IEE Electron. Lett., vol. 40, vol. 11, pp. 652-654, May 2004. R. Schreier, “An empirical study of higher-order single-bit delta-sigma modulators,” IEEE Trum. Circuils Sysr. II, vol. 40, pp. 461466, Aug. 1993. G. Fischer and A. J. Davis, “Alternative topologies for sigma- delta modulators - a comparative study,” IEEE Trans. Circuits

F. Medejro et al., “Fourth-Order Cascade SC EA Modulators: A Comparative Study,” IEEE Trans. Circuits Syst. I, vol. 45, pp. 1041-1051, Oct. 1998.

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