ESE370: Circuit-Level Modeling, Design, and …ese370/fall2019/handouts/lec...ESE370: Circuit-Level...

ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems

Lec 15: October 7, 2019 Energy and Power Basics

Penn ESE 370 Fall 2019 - Khanna

Previously

!  Where capacitance arises "  Device materials

!  What drives delay "  Equivalent drive resistance and load capacitance

!  Optimize delay "  τ-estimate "  Transistor sizing "  Fanin/fanout "  Drive in stages

2 Penn ESE 370 Fall 2019 - Khanna

Today

!  Power Sources "  Static power "  Switching power

"  Dynamic switching power "  Short circuit power


Power

!  P = I×V

!  Tricky part: "  Understanding I "  (pairing with correct V)


Inverter Current Simplification

Penn ESE 370 Fall 2019 - Khanna 5

!  What is Ipwr,gnd? "  0V "  140mV "  400mV "  500mV "  600mV "  860mV "  1V

"  From preclass – see next two slides

Preclass (1/2)


Preclass (2/2)


Inverter Current Simplification

!  What is Ipwr,gnd? "  0V "  140mV "  400mV "  500mV "  600mV "  860mV "  1V


Understanding Currents

Static Power


Operating Modes

!  Steady-State: What modes are the transistors in? "  Vin=Vdd

"  Vin=Gnd

!  What current flows in steady state?


Operating Modes

!  Steady-State: Vin=Vdd

"  PMOS: subthreshold "  NMOS: resistive


Operating Modes



12

€

IDSp = −IS#WL

$

% &

'

( ) e

−VGS −VTnkT / q

$

% &

'

( )

1− eVDSkT / q$

% &

'

( )

$

% & &

'

( ) ) 1− λVDS( )

IDSn = µnCOXWL

!

"#

$

%& VGS −VT( )VDS −

VDS2

2(

)*

+

,-


Operating Modes



13

€

IDSp = −IS#WL

$

% &

'

( ) e

−VGS −VTnkT / q

$

% &

'

( )

1− eVDSkT / q$

% &

'

( )

$

% & &

'

( ) ) 1− λVDS( )

IDSn = µnCOXWL

!

"#

$


VDS2

2(

)*

+

,-

Which current determines Istatic ?


Operating Modes



14

€

IDSp = −IS#WL

$

% &

'

( ) e

−VGS −VTnkT / q

$

% &

'

( )

1− eVDSkT / q$

% &

'

( )

$

% & &

'

( ) ) 1− λVDS( )

IDSn = µnCOXWL

!

"#

$


VDS2

2(

)*

+

,-

Which current determines Istatic ?


Static Power

!  P = I×V !  What V should we use?

"  Where is the static current flowing?


Data Dependent?

!  How does the binary value of the input impact Istatic?


Data Dependent?

!  How does the binary value of input impact Istatic?

17

€

IDS = IS"WL

#

$ %

&

' ( e

VGS −VTnkT / q

#

$ %

&

' (

1− e−VDSkT / q#

$ %

&

' (

#

$ %

&

' ( 1+ λVDS( )


Out

1

2

1

2

1

2

1

2

A

B

Data Dependent Leakage Current


ACM Great Lakes Symposium on VLSI Stresa, I. (n.d.). Analysis of data dependence of leakage current in CMOS cryptographic hardware. In GLSVLSI ’07 proceedings of the 2007 ACM Great Lakes Symposium

on VLSI : Stresa - Lago Maggiore, Italy, March 11-13, 2007 /. New York, N.Y. :: Association for Computing Machinery. https://doi.org/10.1145/1228784.1228808


Dynamic Switching Currents


Power: During Switching

!  P = IV !  Input switch: 1#0 !  Where does I go?

"  Vin=Gnd




"  Vin=Gnd




"  Vin=Gnd

22

Subtheshold Leakage

Idyn (Saturation/Linear)



!  P = IV !  Input switch 0#1 !  Where does I go?

"  Vin=Vdd




"  Vin=Vdd




"  Vin=Vdd

25

Subtheshold Leakage

Idyn (Saturation/Linear)


Switching Currents

!  Dynamic current flow:



Short Circuit Currents



!  P = IV !  Where does I go?

"  Vin=Vdd/2 "  And Vdd>Vthn+|Vthp|



!  P = IV !  Where does I go?

"  Vin=Vdd/2 "  And Vdd>Vthn+|Vthp|

29

0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

0 0.2 0.4 0.6 0.8 1

Vou

t

Vin

CMOS Inverter DC Transfer

Linear/Saturation


Linear/Saturation

Switching Currents

!  Dynamic current flow:

!  If both transistor on: "  Current path from Vdd

to Gnd "  Short circuit current


Currents Summary

!  Current (I) changes over time !  At least two components

"  Istatic – no switching "  Iswitch – when switching

"  Idyn and Isc


Currents Summary

!  Current (I) changes over time !  At least two components

"  Istatic – no switching "  Iswitch – when switching

"  Idyn and Isc

32

VRAMP

CLK

φ

ramp_enable


Switching

Dynamic Power


Switching Currents

!  Itotal(t) = Istatic(t)+Iswitch(t)

!  Iswitch(t) = Isc(t) + Idyn(t)

34

Isc

Istatic

Idyn


Charging

!  Idyn(t) – why is it changing? "  Ids = f(Vds,Vgs) "  and Vgs, Vds changing

35

€

IDS = µnCOXWL

"

# $

%

& ' VGS −VT( )VDS −

VDS2

2)

* +

,

- .

€

IDS ≈νsatCOXW VGS −VT −VDSAT

2%

& '

(

) *


Switching Energy – focus on Idyn(t)


Isc

Istatic

Idyn

Switching Energy – focus on Idyn(t)

E = P(t)dt∫= I(t)Vdd dt∫=Vdd I(t)dt∫

37

Idyn


Switching Energy

38

!  Do we know what this is?

Idyn

Idyn (t)dt∫



Switching Energy

39


Idyn



Q = Idyn (t)dt∫

Switching Energy

40


!  What is Q? Idyn



Q = Idyn (t)dt∫

Switching Energy

41





Q = Idyn (t)dt∫=CV

Switching Energy

42





Q = Idyn (t)dt∫=CV

€

E = CVdd2

Capacitor charging energy

Switching Power

!  Every time output switches 0#1 pay: "  E = CV2

!  Pdyn = (# 0#1 trans) × CV2 / time

!  # 0#1 trans = ½ # of transitions

!  Pdyn = (# trans) × ½CV2 / time


Data Dependent Activity

!  Consider an 8b counter "  How often do each of the following switch?

"  Low bit? "  High bit?

!  Assuming random inputs "  Activity at output of nand2? "  Activity at output of xor2?


Gate Output Switching (random inputs)

45

0

1

P(outi!=outi+1)=P(outi=0)*P(outi+1=1)+P(outi=1)*P(outi+1=0)

i i+1

Output states

Probablity of output switch of nand4? Probablity of output switch of xor4?


Charging Power

!  Pdyn = (# trans) × ½CV2 / time !  Often like to think about switching frequency !  Useful to consider per clock cycle

"  Frequency f = 1/clock-period = clock-cycles/time

!  Pdyn = (#trans/clock-cycle) ½CV2 f


Charging Power

!  Pdyn = (#0#1 trans) × CV2 / time !  Often like to think about switching frequency !  Useful to consider per clock cycle

"  Frequency f = 1/clock-period = clock-cycles/time

!  Pdyn = (#0#1 trans/clock-cycle) CV2 f


Dynamic Power

!  Pdyn = (#0#1 trans/clock-cycle) CV2 f !  Let a = activity factor

a = average #tran0#1/clock a = probability of #tran0#1

!  Pdyn = aCV2 f


Activity Factor

!  Let a = activity factor "  a = average #tran0#1/clock "  a = probability of #tran0#1


a = p(outi = 0)p(outi+1 =1)

a = N0

2NN12N

=N0 (2

N − N0 )22N

Switching


Short Circuit Power

Short Circuit Power

!  Between VTN and Vdd - VTP

"  Both N and P devices conducting


Short Circuit Power

!  Between VTN and Vdd - VTP

"  Both N and P devices conducting

!  Roughly:

52

Isc


Vin

time

Vout

Isdp

time

time

time

Vthn

Vdd

Vdd

Vdd-Vthp

Isc

tsc tsc

Peak Current

!  Ipeak around Vdd/2 "  If |VTN|=|VTP| and sized equal rise/fall

53

€


2%

& '

(

) *


Vin

time

Vout

Isdp

time

time

time

Vthn

Vdd

Vdd

Vdd-Vthp

Isc

tsc tsc

Peak Current


54

€


2%

& '

(

) *

€

I(t)dt∫ ≈ Ipeak × tsc ×12%

& ' (

) *


Vin

time

Vout

Isdp

time

time

time

Vthn

Vdd

Vdd

Vdd-Vthp

Isc

tsc tsc

Vin

time

Vout

Isdp

time

time

time

Vthn

Vdd

Vdd

Vdd-Vthp

Isc

tsc tsc

Peak Current


55

€


2%

& '

(

) *

€

I(t)dt∫ ≈ Ipeak × tsc ×12%

& ' (

) *

€

E =Vdd × Ipeak × tsc ×12#

$ % &

' (


Short Circuit Energy

!  Make it look like switching an equivalent capacitance, CSC

"  Q=I×t "  Q=CV

56

E =Vdd × I peak × tsc ×12"

#$%

&'

"

#$

%

&'

E =Vdd ×QSC

E =Vdd × (CSCVdd ) =CSCV2dd



!  Make it look like switching an equivalent capacitance, CSC

"  Q=I×t "  Q=CV

57

E =Vdd × I peak × tsc ×12"

#$%

&'

"

#$

%

&'

E =Vdd ×QSC

E =Vdd × (CSCVdd ) =CSCV2dd


CSC =I peaktsc2Vdd


!  Every time switch (0#1 and 1#0) "  Also dissipate short-circuit energy: E = CscV2

"  Ccs “fake” capacitance (for accounting)


Total Power

!  Ptot = Pstatic + Psc + Pdyn

!  Pdyn + Psc = aCloadV2f+2aCscV2f

!  Ptot ≈ a(Cload+2Csc)V2f+VI’s(W/L)e-Vt/(nkT/q)


Switching Waveforms


Ideas

!  Three components of power "  Static "  Dynamic "  Short-circuit

!  Ptot = Pstatic + Pdyn+ Psc


Admin

!  HW6 due Friday


ESE370: Circuit-Level Modeling, Design, and …ese370/fall2019/handouts/lec...ESE370: Circuit-Level...

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