Spring 2002 EE 532 − Analog IC Design II Page 34

Analog MOSFET Models Small-signal model for MOSFET in saturation In SI, the total drain current is described by

( ) ( ) ( )( )dsDSmcTHNgsGSDdD vVVvVIii +⋅++−+=+= λλβ 12

2

If assume vgs << VGS and that 1 >> (λc+λm)(VDS+vds), than the forward transconductance (gate-to-channel) in SI is approximately

DTHNGSgs

dconstI

constVGS

Dm IVV

vi

vig

DS

GS

⋅⋅=−==

∂∂

==

=ββ 2)(

In weak inversion saturation,

qkTI

VI

g D

T

Dm ==

Note the similarity to BJT behavior ⇒ gm varies linearly with bias current.

Spring 2002 EE 532 − Analog IC Design II Page 35

The small-signal bulk-to-channel transconductance (or simply body transconductance) in SI saturation operation is

η⋅=

−

+=

∂∂⋅=

∂∂

−==

=m

SBm

SB

THNm

constI

constVSB

Dmb gK

VPHIKg

vV

gvig

D

SB

22

1

The factor η decreases with reverse body bias (source-to-bulk p/n junction bias). For this model, η is assumed to be zero rather than becoming negative for large source-bulk bias voltages.

Spring 2002 EE 532 − Analog IC Design II Page 36

Output conductance (drain-to-source) in SI saturation is given by

)(11mcD

constI

constVDS

Dodsds I

virrg

D

DS

λλ +⋅=

∂∂

====

=

−−

Hence, the maximum magnitude of voltage gain achievable in SI saturation is

λβ⋅

−=⋅−=

Dom

gs

ds

Irg

vv 2 (λ = λc + λm)

Note that higher current DOES NOT help the MOSFET achieve higher voltage gain magnitude. Low power (i.e., low current) analog circuits readily achieve high gains. For triode operation in SI the drain-to-source conductance is described by

( ) ( )THNGSDSTHNGSch VVVVVR −≈−−=− βββ1 valid when VDS << VGS − VTHN

Spring 2002 EE 532 − Analog IC Design II Page 37

High-Frequency MOSFET model Now the capacitive components of the MOSFET will be included.

Any source resistance (including the parasitic gate resistance) associated with a voltage signal driving the gate a MOSFET results in the MOSFET’s forward transconductance having a frequency dependence:

( ) ( )gbgdgss

m

s

dm CCCZj

gvi

fg++⋅+

==ω1

0

where gm0 is the low-frequency transconductance discussed previously.

Spring 2002 EE 532 − Analog IC Design II Page 38

Now we can determine the fT (transitional or unity-current gain frequency) of the MOSFET. For SI saturation, fT is described by

( )( ) ( )

gs

mTHNGS

gsgbgdgs

THNGST C

gVV

LCWKP

CCCLVVWKP

fπππ 222

=−⋅

≈++

−⋅=

or ( )THNGS

oxT VV

CLKPf −⋅⋅

⋅= '24

3π

⇐ independent of W!

Obviously minimum channel length must be used for high-speed design. Beyond fT, the MOSFET provides no usable gain. Aside: CMOS source-followers have an important limitation (see example 9.5).

Zinto source = ( )

+++

00

1

m

gbgdgss

m gCCCR

jg

ω ⇐ inductive!

Note that this impedance analysis is valid when the drain is at AC ground.

Spring 2002 EE 532 − Analog IC Design II Page 39

Temperature Effects in MOSFETs The temperature dependence of the surface inversion potential induces a change in threshold voltage over temperature. Between −100°C to 100°C, the threshold voltage temperature coefficient is

CppmdT

dVV

TCV THN

THNTHN

o30001−≈⋅=

and the threshold voltage as a function of temperature is given by

( ) ( ) ( )[ ]00 1 TTTCVTVTV THNTHNTHN −⋅+= Depending upon the absolute magnitude of VTHN, the approximate absolute change in VTHN is –2.4 mV/°C (i.e., TCVTHN⋅VTHN).

Spring 2002 EE 532 − Analog IC Design II Page 40

The temperature dependence of mobility,

( ) ( )5.1

00

−

⋅=

TTTT µµ ,

determines the transconductance parameter’s variation with temperature:

( ) ( )5.1

00

−

⋅=

TTTKPTKP or ( ) ( )

5.1

00

−

⋅=

TTTT ββ

Note however that at low-drain currents the variations in surface inversion potential (affecting the threshold voltage) with temperature will dominate the temperature-induced changes in drain current. At higher drain currents the mobility temperature dependence will dominate.

Spring 2002 EE 532 − Analog IC Design II Page 41

MOSFET Noise Model Thermal noise due to parasitic resistance of gate, bulk, drain, and source is described by

XRX R

kTi 42 =

where X = G (gate), B (bulk/substrate), D (drain), or S (source). These noise sources, however, are often neglected in hand analysis. The MOSFET’s channel resistance generates thermal noise. In SI saturation, the effective channel resistance is ( )mg23 . This provides a channel noise current given by

Dm

therm IkTgkTi β2

38

32

42 ⋅=⋅= [SI saturation]

In SI triode operation, the MOSFET channel resistance is RCH. Imperfections at the oxide/semiconductor interface form trapping centers for charges within the inversion layer. These trapping centers give rise to carrier generation/recombination that induce fluctuations in drain current. The current fluctuations are concentrated at lower frequencies since the carrier lifetime of silicon is approximately tens of microseconds. This flicker noise phenomenon is modeled by

2'21

effox

AFD

f LCfIKFi⋅⋅

⋅= [SI sat, NLEV=0 in SPICE]

or

effeffox

AFD

f LWCfIKFi

⋅⋅⋅

= '21 [SI sat, NLEV=1 in SPICE]

or

effeffox

AFm

f LWCfgKF

i⋅⋅⋅

= '

221 [SI sat, NLEV=2, 3 in HSPICE]

Spring 2002 EE 532 − Analog IC Design II Page 42

Referring the channel noise current to the gate via the gate-to-channel transconductance provides noise voltage in series with the gate. This is convenient for estimating the minimum voltage signal the MOSFET can detect or resolve at its gate. Gate referred MOSFET thermal and flicker noise is described by

Dm

thermm

thermtherm I

kTgkTv

g

iv

β238

382

22

⋅=

⋅=⇒=

and

2

212

1

212

1m

ff

m

ff g

iv

g

iv =⇒=

Example 9.7 introduces noise analysis of MOSFET circuits.