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Transcript of Analog circuits
Test Paper-1Analog Electronics
Source Book: GATE Multiple Choice Questions ECE
Author: RK Kanodia Edition: 6th
ISBN: 9788192276205
Publisher : Nodia and Company
Visit us at: www.nodia.co.in
Q. No. 1 - 10 Carry One Mark Each
MCQ 1.1 Consider the given a circuit and a waveform for the input voltage. The diode in circuit has cutin voltage 0V =γ .
The waveform of output voltage vo is
SOL 1.1 Hence (C) is correct option.Diode will be off if 2 0v >i + . Thus 0vo =For 2 0v <i + V, 2, 2 3v v v<i o i− = + =− V
MCQ 1.2 In the shunt regulator shown below, the 8.2VZ = V and 0.7VBE = V. The regulated output voltage Vo is
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(A) 11.8 V (B) 7.5 V
(C) 12.5 V (D) 8.9 V
SOL 1.2 Hence (D) is correct option. Vo 8.2 0.7 8.9V VZ BE= + = + = V
MCQ 1.3 The Early voltage of a BJT is 75VA = V. The minimum required collector current, such that the output resistance is at least 200ro = kΩ, is(A) 1.67 mA (B) 5 mA
(C) 0.375 mA (D) 0.75 mA
SOL 1.3 Hence (C) is correct option.
ro IVCQ
A=
& ICQ 200 .krV 75 0 375
o
A= = = mA
MCQ 1.4 In the given circuit of figure if 0.4VTH = V, the transistor M1 is operating in
(A) Linear region (B) Saturation region
(C) M1 is off (D) Cannot be determined
SOL 1.4 Hence (B) is correct option.For P -channel MOSFET V ( )SD sat (1 0) 0.4 0.6V VSG TH= + = − − = VSD 1 0.3 0.7V VS D= − = − =Here, V V> ( )SD SD sat
So, M1 is in saturation region.
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MCQ 1.5 In the circuit shown below the PMOS transistor has parameter 1.5 VVTP =− , 25 /A Vk '
p2μ= , 4 mL μ= and 0λ = . If 0.1 mAID = and 2.5 VVSD = , then value of
W will be
(A) 15 mμ (B) 1.6 mμ
(C) 32 mμ (D) 3.2 mμ
SOL 1.5 Hence (C) is correct option. VSD VSG= ,
ID ( )k
LW V V2
'p
GS TP2= +
10 4− (2.5 1.5) 32 mW W225
42 & μ= − =b bl l
MCQ 1.6 Which of the following amplifier has high input impedance, low output impedance and low voltage gain(A) Common-gate (B) Common-Drain
(C) Common-Source (D) None of these
SOL 1.6 Hence (B) is correct option.
For common drain amplifier output impedance, R g1
om
= (low)Input impedance Rin 3= (high)
Voltage gain ( )Av 1g Rg R
1 m L
m L .= + (low)
MCQ 1.7 What is the input resistance to the common gate circuit shown in figure if I 1D = mA, I 5DSS = mA and V 2TH =− V
(A) 2.24 kΩ (B) 447 Ω
(C) 27 kΩ (D) 224 Ω
SOL 1.7 Hence (B) is correct option.Input resistance is given by
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Rin Iv
g1
D
i
m= =
gm V I I2TH
D DSS#=
( )( ) 2.24 /mA V22 1 5= =
Rin ( . )447
2 241mA/V
Ω= =
MCQ 1.8 For the circuit shown below the value of A vv
vi
o= is
(A) 10− (B) 10
(C) 13.46 (D) 13.46−
SOL 1.8 Hence (A) is correct optionThe noninverting terminal is at ground level. Thus inverting terminal is also at virtual ground. There will not be any current in 60 kΩ.
Av 1040400=− =−
MCQ 1.9 For the circuit shown below the true relation is
(A) v vo o1 2= (B) v vo o1 2=−
(C) 2v vo o2= (D) 2v vo o1 2=
SOL 1.9 At second stage input to both op-amp circuit is same. The upper op-amp circuit is buffer having gain 1Av = . Lower op-amp circuit is inverting amplifier having gain
1A RR
v =− =− . Therefore v vo o1 2=− .
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Page 5 Analog Electronics Chapter 1
Hence (B) is correct option.
MCQ 1.10 The following op-amp circuit is
(A) Band-pass filter (B) Second order low pass filter
(C) Second order high pass filter (D) Band Reject filter
SOL 1.10 Hence (A) is correct option.Transfer function of above circuit is
vv
i
o .R
R
R sC RR
CC s R C C
sC1 11
2
11
1
2
1
2 22 1 2
1= −+ + +b l> H
So, this is a band pass filter
Q. No. 11- 21 Carry Two Mark Each
MCQ 1.11 In the following circuit minimum required value of RR
1
2 to sustain oscillation is
(A) 1.5 (B) 1
(C) 2 (D) 4
SOL 1.11 This is a wein-bridge oscillator circuit, loop gain is given as
( )T s ( / )R
RsRC sRC
13 1
11
2= + + +b cl m
Condition for oscillation
( )T j oω 1( / )R
Rj RC j RC
13 1
1o o1
2
ω ω= = + + +b cl m
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oω RC1=
So, 1 , 2RR
RR1 3
11
2
1
2&= + =b bl l
So, to sustain the oscillations, we must have ( / ) 2R R >2 1
Hence (C) is correct option.
MCQ 1.12 The analog multiplier X shown below has the characteristics v v vp 1 2= . The output of this circuit is
(A) v vs ss (B) v vs ss−
(C) vvss
s− (D) vvss
s
SOL 1.12 Hence (C) is correct option. v+ 0 v= = −,Let output of analog multiplier be vp .
Rvs ,R
vv v v v vp
s p p ss o&=− =− =
vs v vss o=− ,
vo vvss
s=−
MCQ 1.13 For the circuit shown below the value of io is
(A) 12 mA (B) 8.5 mA
(C) 6 mA (D) 7.5 mA
SOL 1.13 The circuit is as shown below
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v+ 0, 3 mAv i 412k1= = = =−
i2 3 2 5 mA= + = , vo (5)(3) 15 V=− =− i2 i io L= + ,
5 i 615
o= + − ,
io .7 5= mAHence (D) is correct option.
MCQ 1.14 For the op-amp circuit shown below the voltage gain /A v vv o i= is
(A) 8− (B) 8
(C) 10− (D) 10
SOL 1.14 The circuit is as shown below
Rv
Rv0 0i 1− + − 0= ,
v1 vi=−
Rv
Rv v
Rv01 1 2 1− + − + 0= ,
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3 , 3v v v vi1 2 2= =−
rv v
Rv
Rv vo2 1 2 2− + + − 0=
3 3 3v v v vi i i i− + − − vo=
& vv
i
o 8=−
Hence (A) is correct option.
MCQ 1.15 Consider the common-source circuit with source bypass capacitor. The signal frequency is sufficiently large. The transistor parameters are .V 0 8TN = V, K 1n = mA/V2 and 0λ = . The voltage gain is
(A) .15 6− (B) .9 9−
(C) .6 8− (D) .3 2−
SOL 1.15 Since the DC gate current is zero, v Vs GSQ=− IDQ ( )I K V VQ n GSQ TN
2= = −& 0.5 1( 0.8)VGSQ
2= − VGSQ 1.51 V vs= =− VDSQ 5 (0.5 )(7 ) ( 1.51) 3.01m k= − − − = VThe transistor is therefore biased in the saturation region.The small-signal equivalent circuit is shown below
vo (7 )g v km gs=−
vgs , (7 )v vv A g ki
i
ov m= = =−
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gm 2 ( )K V Vn GS TN= − 2(1 )m= (1.51 0.8) 1.42− = mS Av (1.42 )(7 )m k=− 9.9=−
Hence (B) is correct option.
MCQ 1.16 Consider the common-source circuit shown below The transistor parameters are .V 0 8TN = V, K 1n = mA/V2 and 0λ = . The small-signal voltage gain is
(A) .10 83− (B) .8 96−
(C) .5 76− (D) .3 28−
SOL 1.16 Form the DC analysis : VGSQ 1.5 V= , IDQ 0.5 mA= gm 2 ( )K V Vn GS TN= − 2(1 )(1.5 0.8) 1.4 /mA Vm= − = ro [ ]IDQ
1 3λ= =−
The resulting small-signal equivalent circuit is shown below
vo ,g u R v v g v Rm gs D i gs m gs S=− = +
& vv
i
o g Rg R
1 m S
m D= +−
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(1.4 )( . )( . )
( )5.76
1 1 4 0 57
mm kk=− + =−
Hence (C) is correct option.
MCQ 1.17 In the circuit shown below the transistor parameters are 1 VVTN = and 36 /A Vk 'n
2μ=
If 0.5 mAID = , 5 VV1 = and 2 VV2 = then the width to-length ratio required in each transistor is
LW
1b l L
W2
b l LW
3b l
(A) 1.75 6.94 27.8
(B) 4.93 10.56 50.43
(C) 35.5 22.4 5.53
(D) 56.4 38.21 12.56
SOL 1.17 Each transistor is biased in saturation becauseV VDS GS= and V V V>DS GS TN−For , 2M V3 2 = V VGS3=
ID 0.5 (2 1)LW
236 10 3
3
2#= = −−
b bl l
& LW
3b l 27.8=
For ,M VGS2 2 5 2 3V V1 2= − = − = V
ID 0.5 (2 1)LW
236 10 3
3
2#= = −−
b bl l
& LW
3b l 27.8=
For M2, VGS2 5 2 3V V1 2= − = − = V
ID 0.5 (3 1)LW
236 10 3
2
2#= = −−
b bl l
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& LW
2b l 6.94=
For M1, VGS1 10 10 5 5V1= − = − = V
ID 0.5 (5 1)LW
236 10 5
1
2#= = −−
b bl l
& LW
1b l 1.74=
Hence (A) is correct option.
MCQ 1.18 A p-channel JFET biased in the saturation region with 5 VVSD = has a drain current of 2.8 mAID = , and 0.3 mAID = at 3 VVGS = . The value of IDSS is(A) 10 mA (B) 5 mA
(C) 7 mA (D) 2 mA
SOL 1.18 Hence (B) is correct option.
ID I VV1DSS
P
GS2
= −b l
2.8 m ,I V1 1DSS
P
2= −b l 0.3m I V1 3
DSSp
2= −c m
& ..
0 32 8 3.97
V
VV
1 3
1 1
P
PP&=
−
−=
b
b
l
l V
2.8 . 5I I1 3 971
DSS DSS&= − =b l mA
MCQ 1.19 The transistor in the circuit shown below has parameters 8IDSS = mA and 4VP =− V. The value of VDS is
(A) 2.7 V (B) 2.85 V
(C) 1.30− V (D) 1.30 V
SOL 1.19 Hence (B) is correct option.
VG (20) 660 14060= + = V
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Assume the transistor in saturation,
ID I VV1DSS
P
GS2
= −b l
ID RV
RV V V
26
kS
S
S
G GS GS= = − = −
6 VGS− (2 )(8 )k m= V1 4GS
2− −b l
& VGS 1.3=− V
ID (8 )m= . 3651 41 3 2
− −− =b l mA
VDS 20 (2.7 2 )I k kD= − + 20 (3.65)(2.7 2) 2.85= − + = V V ( )DS sat 1.30 ( 4) 2.7V VGS p= − =− − − = VV V> ( )DS DS sat Assumption is correct.
MCQ 1.20 In the following circuit, impedance Rb seen through base of the transistor is
(A) 100 Ω (B) 9.90 Ω
(C) 502 Ω (D) 900 Ω
SOL 1.20 Input impedance through base is given as
Rb r gm
β= =π
gm VI
T
C=
So, Rb r IVC
Tβ= =π
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By DC analysis IE 10= mA, I IC Eα=
α 0.9551ββ= + =
IC (0.995)= (10 mA) = 9.95 mA
So, Rb ( . )( )( )
502r9 95
200 25mA
mV Ω= = =π
Hence (C) is correct option.
MCQ 1.21 For the circuit shown below each diode has 0.6V =γ V and 0rf = . Both diode will be ON if
(A) 3.9v >s V (B) 4.9v >s V
(C) 6.3v >s V (D) 5.3v >s V
SOL 1.21 The circuit is as follows
For vs small, both diode are OFF. For 0.6v >s V, D1 is ON. For 0.6v >1 V, both diode will be ON.
.v v v v5
0 65
s s1 1= − + − . ..v v
0 5 0 50 61 1= + −
v1 . 0.6u
222 5 4 >s= + V 3.9v >s& V
Hence (A) is correct option.
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Common Data for Q. 22-23 :For the circuit given 3 10IC
17#= − and VA 3= and 1IC = mA.
MCQ 1.22 The value of VB is(A) 26 mV (B) 809.6 mV
(C) 726 mV (D) 0 mV
SOL 1.22 Hence (B) is correct option.
IC I e VV1/
SV V
A
CEB T= +: D
As, VA 3= , VB lV IInT
S
C= b l
26 10 ln 0.80963 101 103
17
3
#
##= =−
−
−
c m V
MCQ 1.23 If 5VA = V and 1IC = mA for 15VCE = V, the value of VB is(A) 802.8 mV (B) 796 mV
(C) 809.6 mV (D) 26 mV
SOL 1.23 The collector current is
IC I e VV1/
SV V
A
CEB T= +b l
10 3− 3 10 .e 0 51 5/V V17 B T
#= +−b l
e /V VB T .3 91014
=
VB lnV 3910
T
14
= b l
26 10 ln . 802.83 9103
14
.#= −b l mV
Hence (A) is correct option.
Statements for Linked Answer : 24 & 25
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Consider following an ideal op-amp circuit
MCQ 1.24 Load current iL is(A) 5 mA (B) 0.5− mA
(C) 5− mA (D) 0.5 mA
SOL 1.24 This is a voltage to current converter circuit with10 kR1 Ω= , 1 kR2 Ω= , 1 kR3 Ω= , 10 kRF Ω=
vs 5 V=−a Here R R R RF 2 1 3=So, load current is given as
iL ( )
5 mARv
15
ks
2 Ω=− =− − =
Hence (A) is correct option.
MCQ 1.25 Output voltage vo is(A) 5 V (B) 4 V
(C) 6 V (D) 4.5 V
SOL 1.25 By solving the circuit
vL 100 (5 10 )(100) 0.5 ViL 3# #= = =−
i4 ( ). 0.5 mAv
1 10 5
k kL
Ω= = =
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i3 0.5 5 5.5 mAi iL4= + = + =Output voltage is vo (1 )i vk L3 Ω#= + vo (5.5 10 )(1 10 ) 0.53 3
# #= +− −
vo 6 V=Hence (C) is correct option.
Answer Sheet
1. (C) 6. (B) 11. (C) 16. (C) 21. (A)2. (D) 7. (B) 12. (C) 17. (A) 22. (B)3. (C) 8. (A) 13. (D) 18. (B) 23. (A)4. (B) 9. (B) 14. (A) 19. (B) 24. (A)5. (C) 10. (A) 15. (B) 20. (C) 25. (C)