15CS32Assignment- 2 Questions

Module-2Karnaugh Simplifications

Q1. Find the minimal SOP of the following Boolean functions using K-Map:i. F(p,q,r,s)=∑m(6,7,9,10,13)+d(0,1,8,12)

ii. F(a,b,c,d)= πM(1,2,4,9,10,12)+d(0,3,5)Simplification by Quine- McClusky Method

Q2. Simplify following expression using Quine-McClusky method: f(A,B,C,D)= ∑m(0,1,2,3,10,11,12,13,14,15)Hazards and Hazard covers

Q3. What are static hazards? How to design a hazard free circuit? Explain with an example.

Module-3Multiplexer and Demultiplexer

Q4. Implement the Boolean function expressed by POS f(A,B,C,D)= πM(1,2,5,6,9,12) using 8 to 1 MUX.Q5. Write the HDL implementation of 2:1 MUX.

DecoderQ6. Describe the working principal of 3:8 decoder. Design a circuit that realize the following function using a 3:8

decoder and multi-input OR gates. i) F1(A,B,C)= ∑m(1,3,7); F2(A,B,C)=∑m(2,3,5) ii) F3(A,B,C)= ∑m(1,2,3,4); F4(A,B,C)=∑m(3,5,7)Encoder

Q7. Realize a logic circuit for Octal to Binary encoder.Magnitude Comparator

Q8. What is a magnitude comparator? Design one bit comparator and write the truth table, logic circuit using basic gates.Programmable Array Logic and Programmable Logic Arrays

Q9. Implement the following Boolean function using suitable PLA f1= ∑(0,1,4,6), f2= ∑(2,3,4,6,7), f3= ∑(0,1,2,6), f4= ∑(2,3,5,6,7)Flip- Flops

Q10.Draw the logic diagram of clocked D Flip-Flop. Write its truth table, characteristic equation, state diagram and excitation table. What is the drawback of SR flip-flop?