FQP2N60C / FQPF2N60C - FarnellFQP2N60C / FQPF2N60C N-Channel QFET® MOSFET 600 V, 2 A, 4.7 Ω...
Transcript of FQP2N60C / FQPF2N60C - FarnellFQP2N60C / FQPF2N60C N-Channel QFET® MOSFET 600 V, 2 A, 4.7 Ω...
December 2013
Thermal Characteristics
FQP2N60C / FQPF2N60CN-Channel QFET® MOSFET600 V, 2 A, 4.7 Ω
Description
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com1
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
This N-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, active power factor correction (PFC), and electronic lamp ballasts.
Features• 2 A, 600 V, RDS(on) = 4.7 Ω (Max.) @ VGS = 10 V,
ID = 1 A
• Low Gate Charge (Typ. 8.5 nC)
• Low Crss (Typ. 4.3 pF)
• 100% Avalanche Tested
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Symbol Parameter FQP2N60C FQPF2N60C UnitRθJC Thermal Resistance, Junction-to-Case, Max. 2.32 5.5 °C/WRθCS Thermal Resistance, Case-to-Sink Typ, Max. 0.5 -- °C/WRθJA Thermal Resistance, Junction-to-Ambient, Max. 62.5 62.5 °C/W
TO-220GDS TO-220F
GDS
G
S
D
Symbol Parameter FQP2N60C FQPF2N60C UnitVDSS Drain-Source Voltage 600 VID Drain Current - Continuous (TC = 25°C) 2.0 2.0 * A
- Continuous (TC = 100°C) 1.35 1.35 * AIDM Drain Current - Pulsed (Note 1) 8 8 * AVGSS Gate-Source Voltage ± 30 VEAS Single Pulsed Avalanche Energy (Note 2) 120 mJIAR Avalanche Current (Note 1) 2.0 AEAR Repetitive Avalanche Energy (Note 1) 5.4 mJdv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/nsPD Power Dissipation (TC = 25°C) 54 23 W
- Derate above 25°C 0.43 0.18 W/°CTJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum Lead Temperature for Soldering, 1/8" from Case for 5 Seconds
300 °C
* Drain current limited by maximum junction temperature.
Package Marking and Ordering Information
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com2
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Electrical Characteristics TC = 25°C unless otherwise noted.
Part Number Top Mark Package Reel Size Tape Width QuantityFQP2N60CFQP2N60C TO-220 N/A N/A 50 units
Packing MethodTube
TO-220F Tube N/A N/A 50 unitsFQPF2N60CFQPF2N60C
Notes:1. Repetitive rating : pulse-width limited by maximum junction temperature.2. L = 56 mH, IAS = 2 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.3. ISD ≤ 2 A, di/dt ≤ 200 A/µs , VDD ≤ BVDSS, starting TJ = 25°C.4. Essentially independent of operating temperature.
Symbol Parameter Test Conditions Min. Typ. Max. Unit
Off CharacteristicsBVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 600 -- -- V∆BVDSS / ∆TJ
Breakdown Voltage Temperature Coefficient
ID = 250 µA, Referenced to 25°C -- 0.6 -- V/°C
IDSS Zero Gate Voltage Drain CurrentVDS = 600 V, VGS = 0 V -- -- 1 µAVDS = 480 V, TC = 125°C -- -- 10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nAIGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 VrDS(on) Static Drain-Source
On-ResistanceVGS = 10 V, ID = 1 A -- 3.6 4.7 Ω
gFS Forward Transconductance VDS = 40 V, ID = 1 A -- 5.0 -- S
Dynamic CharacteristicsCiss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 180 235 pFCoss Output Capacitance -- 20 25 pFCrss Reverse Transfer Capacitance -- 4.3 5.6 pF
Switching Characteristics td(on) Turn-On Delay Time VDD = 300 V, ID = 2 A,
RG = 25 Ω
(Note 4)
-- 9 28 nstr Turn-On Rise Time -- 25 60 nstd(off) Turn-Off Delay Time -- 24 58 nstf Turn-Off Fall Time -- 28 66 nsQg Total Gate Charge VDS = 480 V, ID = 2 A,
VGS = 10 V (Note 4)
-- 8.5 12 nCQgs Gate-Source Charge -- 1.3 -- nCQgd Gate-Drain Charge -- 4.1 -- nC
Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- 2 AISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 8 AVSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2 A -- -- 1.4 Vtrr Reverse Recovery Time VGS = 0 V, IS = 2 A,
dIF / dt = 100 A/µs -- 230 -- ns
Qrr Reverse Recovery Charge -- 1.0 -- µC
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com3
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
!
10-1 0 10110-2
10-1
100
VGS
Top : 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V
Bottom : 4.5 V
Notes :1. 250us Pulse Test2. TC = 25oC
I D, D
rain
Cur
rent
[A]
10
VDS, Drain-Source Voltage [V]42 8 10
10-1
100
101
150oC
25oC
-55oC
Notes : 1. VDS = 40V2. 250us Pulse Test
I D, D
rain
Cur
rent
[A]
6
VGS, Gate-Source Voltage [V]
10-1 0 1010
50
100
150
200
250
300
350
400
450
500C
iss = C
gs + C
gd (C
ds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Note ;1. VGS = 0 V2. f = 1 MHz
Crss
Coss
Ciss
Cap
acita
nces
[pF]
10
VDS, Drain-Source Voltage [V]20 4 6 8 10
0
2
4
6
8
10
12
VDS = 300V
VDS = 120V
VDS = 480V
Note : ID = 2A
VG
S, G
ate-
Sou
rce
Vol
tage
[V]
QG, Total Gate Charge [nC]
0 10 3 4 50
2
4
6
8
10
12
VGS = 20V
VGS = 10V
Note : TJ = 25oC
r DS(
ON
) [O
hm],
Dra
in-S
ourc
e O
n-R
esis
tanc
e
ID, Drain Current [A]0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
150oC
Notes :1. VGS = 0V2. 250us Pulse Test
25oCI DR, R
ever
se D
rain
Cur
rent
[A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vsDrain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation with Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
2
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com4
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Typical Characteristics (Continued)
-100 -50 0 50 100 150 2000.8
0.9
1.0
1.1
1.2
Notes : 1. VGS = 0 V 2. ID = 250 uA
BV
DS
S, (
Nor
mal
ized
)D
rain
-Sou
rce
Bre
akdo
wn
Vol
tage
TJ, Junction Temperature [oC]-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
? Notes :1. VGS = 10 V2. ID = 1 A
r DS
(ON
), (N
orm
aliz
ed)
Dra
in-S
ourc
e O
n-R
esis
tanc
e
TJ, Junction Temperature [oC]
100 101 102 10310-2
10-1
100
101
100 msDC
10 ms1 ms
100 µs
Operation in This Area is Limited by R DS(on)
Notes :1. TC = 25 oC
2. TJ = 150 oC3. Single Pulse
I D, D
rain
Cur
rent
[A]
VDS, Drain-Source Voltage [V]100 101 102 103
10-2
10-1
100
101
100 msDC
10 ms1 ms
100 µs
Operation in This Area is Limited by R DS(on)
Notes : 1. TC = 25 oC
2. TJ = 150 oC3. Single Pulse
I D, D
rain
Cur
rent
[A]
VDS, Drain-Source Voltage [V]
25 50 75 100 125 1500.0
0.4
0.8
1.2
1.6
2.0
2.4
I D, D
rain
Cur
rent
[A]
TC, Case Temperature [oC]
Figure 9-1. Maximum Safe Operating Areafor FQP2N60C
Figure 10. Maximum Drain Currentvs Case Temperature
Figure 7. Breakdown Voltage Variationvs Temperature
Figure 8. On-Resistance Variationvs Temperature
Figure 9-2. Maximum Safe Operating Areafor FQPF2N60C
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com5
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Typical Characteristics (Continued)
Z JC
(t), T
herm
al R
espo
nse
[o C/W
]Z
JC(t)
, The
rmal
Res
pons
e [o C
/W]
1 0 -5 1 0 -4 1 0 0 1 0 11 0 -2
1 0 -1
1 0 0 N o te s : 1 . Z
θ J C ( t ) = 5 .5 o C /W M a x . 2 . D u ty F a c to r , D = t1 / t 2
3 . T J M - T C = P D M * Zθ J C ( t )
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
1 0 -3 1 0 -2 1 0 -1
t 1 , S q u a re W a v e P u ls e D u ra t io n [s e c ]
Figure 11-1. Transient Thermal Response Curve for FQP2N60C
Figure 11-2. Transient Thermal Response Curve for FQPF2N60C
1 0 -5 1 0 -4 1 0 0 1 0 11 0 -2
1 0 -1
1 0 0
oN te s : 1 . Z
θ J C ( t ) = 2 .3 2 o C /W M a x . 2 . D u ty F a c to r , D = t1 / t 2
3 . T J M - T C = M P D * Zθ J C ( t )
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
1 0 -3 1 0 -2 1 0 -1
t 1 , S q u a re W a v e P u ls e D u ra t io n [s e c ]
t1
PDM
t2
t1
PDM
t2
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
t on t off
td(off) tf
VDD
10V
VDSRL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
t on t off
td(off) tf
VDD
10V
VDSRL
DUT
RG
VGS
VGS
Charge
VGS
10VQg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF12V
Same Typeas DUT
Charge
VGS
10VQg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF12V
Same Typeas DUT
EAS = L IAS2----
21 --------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
I D
t p
EAS = L IAS2----
21EAS = L IAS
2----21----21 --------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
I DI D
t p
VGSVGS
IG = const.
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com6
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
DriverRG
Same Type as DUT
VGS • dv/dt controlled by RG
• ISD controlled by pulse period
VDD
LI SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDD
Body DiodeForward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse WidthGate Pulse Period
--------------------------
DUT
VDS
+
_
DriverRG
Same Type as DUT
VGS • dv/dt controlled by RG
• ISD controlled by pulse period
VDD
LLI SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDD
Body DiodeForward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse WidthGate Pulse Period
--------------------------D =Gate Pulse WidthGate Pulse Period
--------------------------
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com7
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
www.fairchildsemi.com8
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Mechanical Dimensions
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
Figure 16. TO-220, Molded, 3-Lead, Jedec Variation ABPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT220-003
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com9
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET
Mechanical Dimensions
Figure 17. TO220, Molded, 3-Lead, Full Pack, EIAJ SC91, Straight LeadPackage drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specif-ically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TF220-003
©2003 Fairchild Semiconductor Corporation FQP2N60C / FQPF2N60C Rev. C1
www.fairchildsemi.com10
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*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
2. A critical component in any component of a life support, device, orsystem whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety oreffectiveness.
PRODUCT STATUS DEFINITIONSDefinition of Terms
AccuPower™AX-CAP®*BitSiC™Build it Now™CorePLUS™CorePOWER™CROSSVOLT™CTL™Current Transfer Logic™DEUXPEED®
Dual Cool™EcoSPARK®
EfficentMax™ESBC™
Fairchild®
Fairchild Semiconductor®FACT Quiet Series™FACT®
FAST®
FastvCore™FETBench™FPS™
F-PFS™FRFET®
Global Power ResourceSM
GreenBridge™Green FPS™Green FPS™ e-Series™Gmax™GTO™IntelliMAX™ISOPLANAR™Marking Small Speakers Sound Louder and Better™MegaBuck™MICROCOUPLER™MicroFET™MicroPak™MicroPak2™MillerDrive™MotionMax™mWSaver®OptoHiT™OPTOLOGIC®
OPTOPLANAR®
PowerTrench®
PowerXS™Programmable Active Droop™QFET®
QS™Quiet Series™RapidConfigure™
Saving our world, 1mW/W/kW at a time™SignalWise™SmartMax™SMART START™Solutions for Your Success™SPM®
STEALTH™SuperFET®
SuperSOT™-3SuperSOT™-6SuperSOT™-8SupreMOS®
SyncFET™
Sync-Lock™®*
TinyBoost®TinyBuck®
TinyCalc™TinyLogic®
TINYOPTO™TinyPower™TinyPWM™TinyWire™TranSiC™TriFault Detect™TRUECURRENT®*SerDes™
UHC®
Ultra FRFET™UniFET™VCX™VisualMax™VoltagePlus™XS™
®
™
Datasheet Identification Product Status Definition
Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
Preliminary First ProductionDatasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design.
No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design.
Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.
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Rev. I66
tm
®
FQP2N
60C / FQ
PF2N60C
— N
-Channel Q
FET® M
OSFET