Combinational Circuits - csie.ntu.edu.twb95088/temp/print/%b2%d5%bby/lec02... · ν Systematic...

Introduction to Computer Science • Robert Sedgewick and Kevin Wayne • Copyright © 2005 • http://www.cs.Princeton.EDU/IntroCS

Combinational Circuits

2

Virtual machines

High-Level Language

Assembly Language

Operating System

Instruction SetArchitecture

Microarchitecture

Digital Logic Level 0

Level 1

Level 2

Level 3

Level 4

Level 5

Abstractions for computers

3

A simple microcomputer from the year of 2005

IR

DECODE

CONTROLAND

SEQUENCING

PC

ACC B

ALU

CLOCK

I/OD

EVICE

I/OD

EVICE

DATA BUS

CONTROL BUS

ADDRESS BUS

MEMORYI/OPORT

FLAG

4

Instruction set

OPCODE MNEMONIC OPCODE MNEMONIC 0 NOP A CMP 1 LDA B JG2 STA C JE 3 ADD D JL4 SUB5 IN6 OUT7 JMP8 JN9 HLT

OPCODE OPERAND

4 12

Introduction to Computer Science • Robert Sedgewick and Kevin Wayne • Copyright © 2005 • http://www.cs.Princeton.EDU/IntroCS

The Princeton TOY Machine

6

What is TOY?

An imaginary machine similar to:ν Ancient computers. (PDP-8, world's first

commercially successful minicomputer. 1960s)

– 12-bit words– 2K words of memory– Used in Apollo project

7

What is TOY?

An imaginary machine similar to:ν Ancient computers.ν Today's microprocessors.

Pentium Celeron

8

What is TOY?

An imaginary machine similar to:ν Ancient computers.ν Today's microprocessors.

Why study TOY?ν Machine language programming.

– how do high-level programs relate to computer?– a favor of assembly programming

ν Computer architecture.– how is a computer put together?– how does it work?

ν Optimized for understandability, not cost or performance.

9

Inside the Box

Switches. Input data and programs.

Lights. View data.

Memory.ν Stores data and programs.ν 256 "words." (16 bits each)ν Special word for stdin /

stdout.

Program counter (PC).ν An extra 8-bit register.ν Keeps track of next

instruction to be executed.

Registers.ν Fastest form of storage.ν Scratch space during

computation.ν 16 registers. (16 bits each)ν Register 0 is always 0.

Arithmetic-logic unit (ALU). Manipulate data stored in registers.

Standard input, standard output. Interact with outside world.

10

Instruction set architecture (level 2)

Machine contents at a particular place and time.ν Record of what program has done.ν Completely determines what machine will do.

0008 0005 0000 0000 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

8A00 8B01 1CAB 9C02 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000

00:

08:

10:

18:

20:

28:

.

.

E8:

F0:

F8: 0000 0000 0000 0000 0000 0000 0000 0000

Main Memorypc10

nextinstruction

program

Registers

0000

R2

0000

R3

0000

R8

0000

R9

R0

0000

R1

0000

RA

0000

RB

0000

0000

R6

0000

R7

0000

RC

0000

RD

R4

0000

R5

0000

RE

0000

RF

0000

variables

data

11

Instruction set architecture (level 2)

Program: Sequence of instructions.

16 instruction types:ν 16-bit word (interpreted one way).ν Changes contents of registers,

memory, andPC in specified, well-defined ways.

Data:ν 16-bit word (interpreted other way).

Program counter (PC):ν Stores memory address of "next

instruction."

0: haltInstructions

1: add2: subtract3: and4: xor5: shift left6: shift right7: load address8: load9: storeA: load indirectB: store indirectC: branch zeroD: branch positiveE: jump registerF: jump and link

12

TOY Architecture (level 1)

13

level 0

14

Boolean Algebra

Based on symbolic logic, designed by George BooleBoolean variables take values as 0 or 1.Boolean expressions created from:

ν NOT, AND, OR

15

NOT

NOT

Digital gate diagram for NOT:

X X’

16

AND

AND

Digital gate diagram for AND:

X⋅Y XY

17

OR

OR

Digital gate diagram for OR:

X+Y

18

Operator Precedence

Examples showing the order of operations: NOT > AND > OR

Use parentheses to avoid ambiguity

19

Defining a function

Description: square of x minus 1Algebraic form : x2-1Enumeration:

::245154833201

f(x)x

20

Defining a function

Description: number of days of the x-th month of a non-leap yearAlgebraic form: ?Enumeration:

311230113110309318317306315304313282311

f(x)x

21

Truth Table

Truth table.ν Systematic method to describe Boolean function.ν One row for each possible input combination.ν N inputs ⇒ 2N rows.

AND truth table

0 0

0 1

1 0

1 1

0

0

0

1

x y x y

22

Proving the equivalence of two functions

Prove that x2-1=(x+1)(x-1)

Using algebra: (you need to follow some rules)(x+1)(x-1) = x2+x-x-1= x2-1

Using enumeration:

:::2424515154883332001

x2-1(x+1)(x-1)x

23

Important laws

x + 1 = 1x + 0 = xx + x = 1

x．1 = xx．0 = 0x．x = 0

DeMorgan Law

x．y = x + y

24

Truth Tables (1 of 3)

A Boolean function has one or more Boolean inputs, and returns a single Boolean output.A truth table shows all the inputs and outputs of a Boolean function

Example: ¬X ∨ Y

25


Example: X ∧ ¬Y

26


When s=0, return x; otherwise, return y.Example: (Y ∧ S) ∨ (X ∧ ¬S)

muxX

Y

S

Z

Two-input multiplexer

27

Truth Table for Functions of 2 Variables

Truth table.ν 16 Boolean functions of 2 variables.

ZERO

Truth table for all Boolean functions of 2 variables

y

0 0

0 1 0

1 0 0

1 1 0

0

0

1

0

0

1

0

0

x

0

0

1

1

AND

0

0

0

1

y

0

1

0

1

XOR

0

1

1

0

OR

0

1

1

1

x

0

NOR

Truth table for all Boolean functions of 2 variables

y

0 1

0 1 0

1 0 0

1 1 0

y'

1

0

1

0

x'

1

1

0

0

1

0

1

1

EQ

1

0

0

1

1

1

0

1

NAND

1

1

1

0

ONE

1

1

1

1

x

0

every 4-bit value represents one

28

Truth Table for Functions of 3 Variables

Truth table.ν 16 Boolean functions of 2 variables.ν 256 Boolean functions of 3 variables.ν 2^(2^n) Boolean functions of n variables!

AND

some functions of 3 variables

z

0 0

0 1 0

1 0 0

1 1 0

y

0

x

0

0

0

0

0

0 1

1 0

1 1

01

1

1

1

0

0

0

1

OR

0

1

1

1

1

1

1

1

MAJ

0

0

0

1

0

1

1

1

ODD

0

1

1

0

1

0

0

1



every 2n-bit value represents one

29

Sum-of-Products

Sum-of-products. Systematic procedure for representing a Boolean function using AND, OR, NOT.

ν Form AND term for each 1 in Boolean function.ν OR terms together.

x'yz

expressing MAJ using sum-of-products

z xyz' xyzxy'zMAJyx

0

0

0

1

0

1

1

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

1

x'yz + xy'z + xyz' + xyz

0

0

0

1

0

1

1

1

proves that { AND, OR, NOT }are universal

30

Universality of AND, OR, NOT

Fact. Any Boolean function can be expressed using AND, OR, NOT.

ν { AND, OR, NOT } are universal.ν Ex: XOR(x,y) = xy' + x'y.

Exercise. Show {AND, NOT}, {OR, NOT}, {NAND}, {NOR} are universal.Hint. DeMorgan's law: (x'y')' = x + y.

x'

Expressing XOR Using AND, OR, NOT

y

0 1

1 1

0 0

1 0

x'y

0

1

0

0

x'y + xy'

0

1

1

0

xy'

0

0

1

0

y'

1

0

1

0

x XOR y

0

1

1

0

x

0

0

1

1

NOT xx'x AND yx yx OR y

MeaningNotation

x + y

31

Computer Architecture

This lecture. Boolean circuits.

Ahead. Putting it all together and building a TOY machine.

same issues apply to modern day microprocessors, just a matter of scale and speed.

32

Digital Circuits

What is a digital system?ν Analog: signals vary continuously.ν Digital: signals are 0 or 1.

Why digital systems?ν Accuracy and reliability.ν Staggeringly fast and cheap.

Basic abstractions.ν On, off.ν Wire: propagates on/off value.ν Switch: controls propagation of on/off values

through wires.

0.0V0.5V

2.8V3.3V

0 1 0

33

Wires

Wires.ν On (1): connected to power.ν Off (0): not connected to power.ν If a wire is connected to a wire that is on, that

wire is also on.ν Typical drawing convention: "flow" from top, left

to bottom, right.

0

powerconnection

1

1

1

34

Controlled switch. [relay implementation]ν 3 connections: input, output, control.ν Magnetic force pulls on a contact that cuts

electrical flow.ν Control wire affects output wire, but output does

not affect control; establishes forward flow of information over time.

Controlled Switch

X

X

35

Circuit Anatomy

36

Logic Gates: Fundamental Building Blocks

37

NOT

38

NOT

1

0

0

1

39

OR

40

Series relays = NOR

0 10 0

101 1

0

0

0

1

41

NOR

42

AND

43

AND

44

Logic Gates: Fundamental Building Blocks

45

What about parallel relays?

0

11

0

0

1

=NAND

46

Can we implement AND/OR using parallel relays?

Now we know how to implement AND,OR and NOT. We can just use them as black boxes without knowing how they were implemented. Principle of information hiding.

47

Multiway Gates

Multiway gates.ν OR: 1 if any input is 1; 0 otherwise.ν AND: 1 if all inputs are 1; 0 otherwise.ν Generalized: negate some inputs.

48

Multiway Gates

Multiway gates.ν OR: 1 if any input is 1; 0 otherwise.ν AND: 1 if all inputs are 1; 0 otherwise.ν Generalized: negate some inputs.

49

Translate Boolean Formula to Boolean Circuit

Sum-of-products. XOR.

50



51



52


Sum-of-products. Majority.

53



54



55

Simplification Using Boolean Algebra

Every function can be written as sum-of-product

Many possible circuits for each Boolean function.ν Sum-of-products not necessarily optimal in:

– number of switches (space)– depth of circuit (time)

56

Boolean expression simplification

Karnaugh map

57

Example

xy z

58

Simplification Using Boolean Algebra

Many possible circuits for each Boolean function.ν Sum-of-products not necessarily optimal in:

– number of switches (space)– depth of circuit (time)

MAJ(x, y, z) = x'yz + xy'z + xyz' + xyz = xy + yz + xz.

59

Layers of Abstraction

Layers of abstraction.ν Build a circuit from wires and switches.

[implementation]ν Define a circuit by its inputs and outputs. [API]ν To control complexity, encapsulate circuits.

[ADT]

60

Layers of Abstraction

Layers of abstraction.ν Build a circuit from wires and switches.

[implementation]ν Define a circuit by its inputs and outputs. [API]ν To control complexity, encapsulate circuits.

[ADT]

61

ODD Parity Circuit

ODD(x, y, z).ν 1 if odd number of inputs are 1. ν 0 otherwise.

x'y'z

Expressing ODD using sum-of-products

z xy'z' xyzx'yz'ODDyx

0

1

1

0

1

0

0

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

0

1

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

1

0

0

0

0

0

0

0

0

0

0

1

x'y'z + x'yz' + xy'z' + xyz

0

1

1

0

1

0

0

1

62

ODD Parity Circuit


63

ODD Parity Circuit


64

Expressing a Boolean Function Using AND, OR, NOT

Ingredients.ν AND gates.ν OR gates.ν NOT gates.ν Wire.

Instructions.ν Step 1: represent input and output signals with

Boolean variables.ν Step 2: construct truth table to carry out

computation.ν Step 3: derive (simplified) Boolean expression using

sum-of products.ν Step 4: transform Boolean expression into circuit.

65

Let's Make an Adder Circuit

Goal. x + y = z for 4-bit integers.ν We build 4-bit adder: 9 inputs, 4 outputs.ν Same idea scales to 128-bit adder.ν Key computer component.

842 7

753 9+

606 6

111 0

66


Step 1. Represent input and output in binary.

x1x2x3 x0

y1y2y3 y0+

z1z2z3 z0

100 0

110 1+

001 1

011 0

67


Goal. x + y = z for 4-bit integers.

Step 2. [first attempt]ν Build truth table.

Q. Why is this a bad idea?A. 128-bit adder: 2256+1 rows >> # electrons in universe!

x1x2x3 x0

y1y2y3 y0+

z1z2z3 z0

4-Bit Adder Truth Table

y2y30

0

0

0

1

.

1

0

0

0

0

0

.

1

x0x10

0

0

0

0

.

1

0

0

0

0

0

.

1

x2x30

0

0

0

0

.

1

0

0

0

0

0

.

1

y0y10

1

0

1

0

.

1

0

0

1

1

0

.

1

z2z30

0

0

0

1

.

1

0

0

0

0

0

.

1

z0z10

1

0

1

0

.

1

0

0

1

1

0

.

1

28+1 = 512 rows!

c00

0

0

0

0

.

1

cincout

68

1-bit half adder

x y s c

ADDxy

cs

We add numbers one bit at a time.

69

1-bit full adder

x y s

ADD

x

Cout

Cin

y

s

CoutCin

70

8-bit adder

71



Step 2. [do one bit at a time]ν Build truth table for carry bit.ν Build truth table for summand bit.

x1x2x3 x0

y1y2y3 y0+

z1z2z3 z0

c1c2c3 c0 = 0

Carry Bit

ci ci+1yixi

0

0

0

1

0

1

1

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

Summand Bit

ci ziyixi

0

1

1

0

1

0

0

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

cout

72



Step 3.ν Derive (simplified) Boolean expression.

MAJ

0

0

0

1

0

1

1

1

ODD

0

1

1

0

1

0

0

1

ci ci+1yixi

0

0

0

1

0

1

1

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

ci ziyixi

0

1

1

0

1

0

0

1

0

1

0

1

0

1

0

1

0

0

1

1

0

0

1

1

0

0

0

0

1

1

1

1

Carry Bit Summand Bit

73



Step 4.ν Transform Boolean expression into circuit.ν Chain together 1-bit adders.

74

Adder: Interface

75

Adder: Component Level View

76

Adder: Switch Level View

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Subtractor

Subtractor circuit: z = x – y.ν One approach: design like adder circuitν Better idea: reuse adder circuit

– 2’s complement: to negate an integer, flip bits, then add 1

78

Shifter

4-bit Shifter

SHIFT

s0 s1 s2 s3

z0 z1 z2 z3

x0

x1

x2

x3

Only one of them will be on at a time.

79

Shifter

x0000s3

x1x000s2

x2x1x00s1

x3x2x1x0s0

z3z2z1z0

z0 = s0‧x0 + s1‧0 + s2‧0 + s3‧0z1 = s0‧x1 + s1‧x0 + s2‧0 + s3‧0z2 = s0‧x2 + s1‧x1 + s2‧x0 + s3‧0z3 = s0‧x3 + s1‧x2 + s2‧x1 + s3‧x0

80

Shifter

z0 = s0‧x0 + s1‧0 + s2‧0 + s3‧0z1 = s0‧x1 + s1‧x0 + s2‧0 + s3‧0z2 = s0‧x2 + s1‧x1 + s2‧x0 + s3‧0z3 = s0‧x3 + s1‧x2 + s2‧x1 + s3‧x0

81

N-bit Decoder

N-bit decoderν N address inputs, 2N data outputsν Addresses output bit is 1;

all others are 0

82

N-bit Decoder

N-bit decoderν N address inputs, 2N data outputsν Addresses output bit is 1;

all others are 0

83

2-Bit Decoder Controlling 4-Bit Shifter

Ex. Put in a binary amount to shift.r0r1

84

Arithmetic Logic Unit

Arithmetic logic unit (ALU). Computes all operations in parallel.

ν Add and subtract.ν Xor.ν And.ν Shift left or right.

Q. How to select desired answer?

85

1 Hot OR

1 hot OR.ν All devices compute their answer;

we pick one.ν Exactly one select line is on.ν Implies exactly one output line is

relevant.

adder

xor

shifter

x．1 = xx．0 = 0

x + 0 = x

86

Bus

16-bit busν Bundle of 16 wiresν Memory transfer

Register transfer

8-bit busν Bundle of 8 wiresν TOY memory address

4-bit busν Bundle of 4 wiresν TOY register address

87

Bitwise AND, XOR, NOT

Bitwise logical operationsν Inputs x and y: n bits eachν Output z: n bitsν Apply logical operation to each corresponding pair

of bits

88

ALU

TOY ALUν Big combinational logic ν 16-bit busν Add, subtract, and, xor, shift left, shift right,

copy input 2

89

Device Interface Using Buses

Device. Processes a word at a time.Input bus. Wires on top.Output bus. Wires on bottom.Control. Individual wires on side.

16-bit words for TOY memory

90

ALU

Arithmetic logic unit.ν Add and subtract.ν Xor.ν And.ν Shift left or right.

Arithmetic logic unit.ν Computes all operations in parallel.ν Uses 1-hot OR to pick each bit answer.

91

Summary

Lessons for software design apply to hardware design!

ν Interface describes behavior of circuit.ν Implementation gives details of how to build it.

Layers of abstraction apply with a vengeance!ν On/off.ν Controlled switch. [relay, transistor]ν Gates. [AND, OR, NOT]ν Boolean circuit. [MAJ, ODD]ν Adder.ν Shifter.ν Arithmetic logic unit.ν …ν TOY machine.

Combinational Circuits - csie.ntu.edu.twb95088/temp/print/%b2%d5%bby/lec02... · ν Systematic...

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