Post on 03-Feb-2021
Transimpedance Amplifiers
Professor Jri Lee台大電子所 李致毅教授
Electrical Engineering DepartmentNational Taiwan University
Outline
General ConsiderationsOpen-Loop TIAsFeedback TIAsHigh Performance TIAsCase Study
Jitter Due to Bandwidth Limitation
ln21 τ=T )]expln[2(1 b2 ττTT −−= )expln(1 b
bb
21τ
τ TTT
TT −−
−=
−
Insufficient bandwidth leads to deterministic jitter
ISI Due to Bandwidth Limitation
For a simple RC network with f−3dB = 0.7 Rb, data jitter equals 0.28 % and ISI = 1.23 %.Practical TIAs contain multiple poles/zeros, making the analysis complex and requiring simulations.
τΔ b
0expISI T
VV −
==
Intersymbol Interference (ISI):defining the vertical eye closure.
Noise Effect
For a BER of 10 , SNR needs to be around 14.−12
Noise issue becomes more severe for low supply-voltage designs.
∫∞
=−
=n0
)2
(2
exp21
n
PP2
totc, σ σπVVQdxxP
2exp
21
2exp
21)(
22 xx
duuxQx
−≈
−= ∫
∞
ππ3>xfor
Single-Register TIAs
Direct trade off between speed and noise ⇒seeking circuits that provide low input resistance (high bandwidth) and high gain.
RT(Transimpedance Gain) = RL
D2L
2inn, CR
kTI =
DL21
CRπ=Data Rate
Simplest way to convert current into voltage.
Typical TIA Specs for OC-192 (10 Gb/s)
High Gain
Gain > 1 kΩ
Bandwidth > 9 GHz
Sensitivity < -18 dBm
Maximum Input > 3 dBm
Peaking < 2 dB
Challenges:
Large Input RangeLow Noise
High BandwidthGood PSRRReasonable Power
Open-Loop TIAs
Common Gate Common Base
DT RR =
ombm
D
mbmin )(
1rgg
Rgg
R+
++
≈
CT RR =
om
C
min
1rg
Rg
R +≈
Satisfying (input) impedance matching. Comparable gain (consumes voltage headroom, too).
High Frequency Response of Open-Loop TIAs
Input pole dominates (Cin ~ 250 fF).Multiple tradeoffs make it difficult to achieve broad band and high gain simultaneously.
Common Gate Common Base
1))(()(
outDinmb1m1
Dmb1m1
in
out
++++
=sCRsCgg
RggI
V1))(( outDinm1
Cm1
in
out
++=
sCRsCgRg
IV
Noise Performance of Common-Gate Stages
Noise Currents of M2 and RD are referred to the input with unity gain and trade with each other.
For more information about noise, check: “Design of Analog CMOS Integrated Circuits”, Chap 7.
2Rn,
2Mn,
Dm2
2inn,
D2
)1(4
II
RgkTI
+=
+= γ
D2
DD2
Mn,2
Rn, 2D
84IV
IkT
IkT
High Frequency Noise Analysis of CG Stages
Little flexibility can be achieved in CG/CB TIAs.
)21
41(4 inp,m2outp,m1
2totin,n, ωωγ ggkTI +=
in
mb1m1inp, C
gg +=ω
outDoutp,
1CR
=ω
CG/CB architecture bears intrinsic limitation in many aspects.
Feedback TIAs
Consider a shunt-shunt feedback system:
mFD
openout,out
mFD
openin,in
mFD
DT
1
1
1
gRR
R
gRR
R
gRRR
+=
+=
+=
Many restrictions in CG/CB topology would be released.
Reasonable Gain
Impedance Matching
First-Order Feedback TIAs
RF does not need to carry a bias current, relaxing the voltage headroom limitation.
sCRAARR
DF
FT 1++
−=
DF3dB 2 CR
Afπ
=−Ideal
Opamp
Noise Performance of Feedback TIAs
Noise can be reduced by increasing RF .
(when CD = 0)
Vn,RF approaches AVn,A as the frequency goes to infinity ⇒ inaccurate opamp model (it should have a finite bandwidth).
AsCRVsCRV
VDF
An,DFRFn,outn, 1
1)(+
++=
2F
2An,
F
2inn,
4RV
RkTI +=
High Frequency Performance of Feedback TIAs
For maximum flatten response
Bandwidth is greater than that of first order TIA by 41%.
0
0
1)(
ωsAsA
+=
DF
00
0DF
0DF2
D
00
T 1)(1CR
AsCR
CRs
CA
Rω
ωω
ω
++
++
=
21
=ζDF
03dB 2
2CR
Afπ
=−⇒ ,
CMOS Realization of Feedback TIA
Dm1
m2out
Dm1
Fin
FDm1
Dm1T
11
1
1
RggR
RgRR
RRg
RgR
+=
+=
+=
)1(44 2D
2m1m2D
2m1m1
2FF
2inn, RggRggR
kTRkTI γγ +++=
Generally inversely proportional to RF.
High-Frequency Behavior of Feedback TIA
TIA may oscillate due to the three poles around the feedback loop.CD and CL are nontrivial.
Modified Feedback TIA
Split the feedback loop with output port.Adding internal buffer.
Power Supply Rejection Issue
Photodiode provides a single-ended current, leading to a single-ended TIA design and poor power supply rejection.
Dm1DD
out
11
RgVV
+=
∂∂
Common issue for all single-ended circuits.
Differential TIAs
Unequal gain and phase shift at high frequencies.
Issues:
Input noise current times higher.Generating only “pseudo” differential output.
2
‘‘Pseudo’’ Differential
Single-Ended to Differential Conversion
Time constant of tens of microseconds requires large external capacitor.Data pattern dependent.
Average of Vx
High-Gain Techniques
Noise inevitably becomes higher.Providing extra current without IR drop.
(Under what condition?)
Capacitive Coupling
Relax the voltage-headroom requirement.Some standards need very long runs, leading to external large R and C.Stability is of concern.
Feedback TIA without Source Follower
mDout
Dm
DFin
FDDm
Fm
in
out
11
11
gRR
RgRRR
RRRgRg
VV
=
++
=
−≈+−
−=
FD2F
2m
2Fm
2inn,
444RkT
RRgkT
RgkTI ++= γ
Degenerate the source follower.Tradeoffs between gain, stability, noise, and robustness.
Inductive Peaking
LD3dB 2
1CR
fπ
=−πω
ωζωζω
22s2s n
2nn
2n
Dmin
out
+++
−= RgVV
21 for
21.79
LD3dB ==− ζπ CR
f
Automatic Gain Control
Large input current may degrade the response be pulling one or more current source into triode region.Necessitating dynamic tracking mechanism to adjust it in real time.
Automatic Gain Control
system may become unstable as RF goes down.
Since
121
0
0DF
+=
ACR ω
ζ
⇒ Need to reduce A0 so as to maintain a relatively constant ζ.
Case Study (I)
Korramabadi et. al. [ISSCC, 96]
Case Study (II)
Wu et. al. [JSSC, 03]
Case Study (III)
Park et. al. [JSSC, 04]
Case Study (IV)
Chen et. al. [JSSC, 05]