TS5A2066 Dual-Channel 10-ΩSPST Analog Switch · scds184e –january 2005–revised june 2017 ......

SPST

IN1

NO1 COM1

SPST

IN2

NO2 COM2

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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

TS5A2066SCDS184E –JANUARY 2005–REVISED JUNE 2017

TS5A2066 Dual-Channel 10-Ω SPST Analog Switch

1

1 Features1• Low ON-State Resistance (10 Ω)• Control Inputs Are 5-V Tolerant• Low Charge Injection• Excellent ON-State Resistance Matching• Low Total Harmonic Distortion (THD)• 1.65-V to 5.5-V Single-Supply Operation• Latch-Up Performance Exceeds 100 mA

Per JESD 78, Class II• ESD Performance Tested Per JESD 22

– 2000-V Human-Body Model(A114-B, Class II)

– 1000-V Charged-Device Model (C101)

2 Applications• Sample-and-Hold Circuits• Battery-Powered Equipment• Audio and Video Signal Routing• Communication Circuits• Cell Phones• Low-Voltage Data-Acquisition Systems• PDAs

3 DescriptionThe TS5A2066 device is a dual single-pole single-throw (SPST) analog switch that is designed tooperate from 1.65 V to 5.5 V. This device can handleboth digital and analog signals, and signals up to VCCcan be transmitted in either direction.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)

TS5A2066SSOP (DCT) 2.95 mm x 2.80 mmVSSOP (DCU) 2.30 mm x 2.00 mmDSBGA (YZP) 1.25 mm x 2.25 mm

(1) For all available packages, see the orderable addendum atthe end of the data sheet.

SPACER

SPACER

Functional Block Diagram

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Table of Contents1 Features .................................................................. 12 Applications ........................................................... 13 Description ............................................................. 14 Revision History..................................................... 25 Pin Configuration and Functions ......................... 36 Specifications......................................................... 4

6.1 Absolute Maximum Ratings ...................................... 46.2 ESD Ratings ............................................................ 46.3 Recommended Operating Conditions....................... 46.4 Thermal Information .................................................. 46.5 Electrical Characteristics For 5-V Supply ................ 56.6 Electrical Characteristics For 3.3-V Supply ............. 76.7 Electrical Characteristics For 2.5-V Supply ............. 96.8 Electrical Characteristics For 1.8-V Supply............. 116.9 Typical Performance ............................................... 13

7 Parameter Measurement Information ................ 168 Detailed Description ............................................ 21

8.1 Overview ................................................................. 21

8.2 Functional Block Diagram ....................................... 218.3 Feature Description................................................. 218.4 Device Functional Modes........................................ 21

9 Application and Implementation ........................ 229.1 Application Information............................................ 229.2 Typical Application ................................................. 22

10 Power Supply Recommendations ..................... 2311 Layout................................................................... 24

11.1 Layout Guidelines ................................................. 2411.2 Layout Example .................................................... 24

12 Device and Documentation Support ................. 2512.1 Receiving Notification of Documentation Updates 2512.2 Community Resources.......................................... 2512.3 Trademarks ........................................................... 2512.4 Electrostatic Discharge Caution............................ 2512.5 Glossary ................................................................ 25

13 Mechanical, Packaging, and OrderableInformation ........................................................... 25

4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision D (April 2010) to Revision E Page

• Added Device Information table, Pin Configuration and Functions section, ESD Ratings table, RecommendedOperating Conditions table, Thermal Information table, Feature Description section, Device Functional Modes,Application and Implementation section, Power Supply Recommendations section, Layout section, Device andDocumentation Support section, and Mechanical, Packaging, and Orderable Information section....................................... 1

• Deleted the Summary of Characteristics table ....................................................................................................................... 3• Changed pin 8 From: V+ To: VCC in the pinout images .......................................................................................................... 3• Deleted the ON-state resistance Min values of 10 Ω and 12 Ω in the Electrical Characteristics For 3.3-V Suppy table ...... 7• Deleted the ON-state resistance Min values of 20 Ω in the Electrical Characteristics For 2.5-V Supply table...................... 9• Changed Test Conditions for Charge injection From: See Figure 23 To; See Figure 24 in the Electrical

Characteristics For 2.5-V Supply table ................................................................................................................................. 10• Deleted the ON-state resistance Min values of 80 Ω and 90 Ω in the Electrical Characteristics For 1.8-V Supply table.... 11• Changed V+ to VCC in the Typical Performance graphs ...................................................................................................... 13• Changed V+ to VCC in the Parameter Measurement Information images ............................................................................ 16


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GND

IN2

COM1

NO1

IN1

COM2

NO2

VCC

4

3

2

1 8

6

7

5 D2D1

C2C1

B2B1

A2A1

1

2

3

4

8

7

6

5

NO1

COM1

IN2

GND

COM2

IN1

NO2

VCC

3

TS5A2066www.ti.com SCDS184E –JANUARY 2005–REVISED JUNE 2017


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5 Pin Configuration and Functions

DCT or DCU Package8 Pin (SSOP or VSSOP)

Top View

YZP Package8 Pin (DSBGA)

Top View

Pin FunctionsNO. NAME DESCRIPTION

1 NO1 Normally open2 COM1 Common3 IN2 Digital control to connect COM to NO4 GND Digital ground5 NO2 Normally open6 COM2 Common7 IN1 Digital control to connect COM to NO8 VCC Power supply


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4




(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.(3) All voltages are with respect to ground, unless otherwise specified.(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(5) This value is limited to 5.5 V maximum.

6 Specifications

6.1 Absolute Maximum Ratings (1) (2)

over operating free-air temperature range (unless otherwise noted)MIN MAX UNIT

VCC Supply voltage range (3) –0.5 6.5 VVNOVCOM

Analog voltage range (3) (4) (5) –0.5 VCC + 0.5 V

IK Analog port diode current VNO, VCOM < 0 or VNO, VCOM > VCC –50 50 mAINOICOM

On-state switch current VNO, VCOM = 0 to VCC –50 50 mA

VIN Digital input voltage range (3) (4) –0.5 6.5 VIIK Digital input clamp current VIN < 0 –50 mAICC Continuous current through VCC 100 mAIGND Continuous current through GND –100 100 mATstg Storage temperature range –65 150 °C

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. .

6.2 ESD RatingsVALUE UNIT

V(ESD) Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) ±2000

VCharged-device model (CDM), per JEDEC specification JESD22-C101 (2) ±1000

6.3 Recommended Operating Conditionsover operating free-air temperature range (unless otherwise noted)

MIN MAX UNITVCC Supply voltage range 1.65 5.5 VVNO VCOM Analog voltage range 0 VCC VVIN Digital input voltage range 0 5.5 V

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics applicationreport.

6.4 Thermal Information

THERMAL METRIC (1)TS5A2066

UNITDCT (SSOP) DCU (VSSOP) YZP (DSBGA)8 PINS 8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 214.1 212.8 99.8 °C/WRθJC(top) Junction-to-case (top) thermal resistance 106.8 93.6 1.0 °C/WRθJB Junction-to-board thermal resistance 127.8 133.6 29.6 °C/WψJT Junction-to-top characterization parameter 30.2 30.4 0.5 °C/WψJB Junction-to-board characterization parameter 125.5 133.1 29.8 °C/W


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(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.

6.5 Electrical Characteristics For 5-V Supply (1)

VCC = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)PARAMETER SYMBOL TEST CONDITIONS TA VCC MIN TYP MAX UNIT

Analog SwitchAnalog signalrange VCOM, VNO 0 VCC V

ON-stateresistance ron

0 ≤ VNO ≤ VCC,ICOM = –32 mA,

Switch ON,See Figure 16

25°C4.5 V

7.5 10Ω

Full 15ON-stateresistancematchbetweenchannels

ΔronVNO = 3.15 V,ICOM = –32 mA,

Switch ON,SeeFigure 16

25°C

4.5 V

0.4 1

ΩFull 3

ON-stateresistanceflatness

ron(flat)0 ≤ VNO ≤ VCC,ICOM = –32 mA,


25°C4.5 V

3.5 5Ω

Full 8

NOOFF leakagecurrent

INO(OFF)

VNO = 1 V,VCOM = 4.5 V,orVNO = 4.5 V,VCOM = 1 V,

Switch OFF,See Figure 17

25°C

5.5 V

–30 –10 30

nAFull –40 40

COMOFF leakagecurrent

ICOM(OFF)

VCOM = 1 V,VNO = 4.5 V,orVCOM = 4.5 V,VNO = 1 V,


25°C

5.5 V

–50 –8 50

nAFull –50 50

NOON leakagecurrent

INO(ON)

VNO = 1 V,VCOM = Open,orVNO = 4.5 V,VCOM = Open


25°C

5.5 V

–40 –12 40

nAFull –4 40

COMON leakagecurrent

ICOM(ON)

VCOM = 1 V,VNO = Open,orVCOM = 4.5 V,VNO = Open,


25°C

5.5 V

–70 –30 70

nAFull –70 70

Digital Control Input (IN)Input logic high VIH Full VCC × 0.7 5.5 VInput logic low VIL Full 0 VCC × 0.3 V

Input leakagecurrent IIH, IIL VIN = 5.5 V or 0

25°C5.5 V

–0.1 0.05 0.1µA

Full –1 1


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6




Electrical Characteristics For 5-V Supply(1) (continued)VCC = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS TA VCC MIN TYP MAX UNITDynamic

Turn-on time tONVCOM = 3 V,RL = 300 Ω,

CL = 35 pF,See Figure 20

25°C 5 V 4.4 5.2 5.8

nsFull

4.5 Vto

5.5 V3.4 6.1

Turn-off time tOFFVCOM = 3 V,RL = 300 Ω,


25°C 5 V 1.7 2.6 3.6

nsFull

4.5 Vto

5.5 V1.3 4.2

Charge injection QCVGEN = 0,RGEN = 0,

CL = 0.1 nF,See Figure 24 25°C 5 V 1 pC

NOOFFcapacitance

CNO(OFF) VNO = VCC or GND, Switch OFF,See Figure 19 25°C 5 V 5.5 pF

COMOFFcapacitance

CCOM(OFF)VCOM = VCC orGND,

Switch OFF,See Figure 19 25°C 5 V 5.5 pF

NOON capacitance CNO(ON) VNO = VCC or GND, Switch ON,

See Figure 19 25°C 5 V 13.5 pF

COMON capacitance CCOM(ON)

VCOM = VCC orGND,

Switch ON,See Figure 19 25°C 5 V 13.5 pF

Digital inputcapacitance CIN VIN = VCC or GND, See Figure 19 25°C 5 V 2.5 pF

Bandwidth BW RL = 50 Ω, Switch ON,See Figure 21 25°C 5 V 300 MHz

OFF isolation OISORL = 50 Ω,f = 10 MHz,

Switch OFF,See Figure 22 25°C 5 V –68 dB

Crosstalk XTALKRL = 50 Ω,f = 10 MHz,

Switch ON,See Figure 23 25°C 5 V –66 dB

Total harmonicdistortion THD RL = 600 Ω,

CL = 50 pF,f = 20 Hz to 20 kHz,See Figure 25 25°C 5 V 0.01%

Supply

Positive supplycurrent ICC VIN = VCC or GND, Switch ON or OFF

25°C5.5 V

0.1 1µA

Full 5


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6.6 Electrical Characteristics For 3.3-V Supply (1)

VCC = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)PARAMETER SYMBOL TEST CONDITIONS TA VCC MIN TYP MAX UNIT





25°C3 V

12 15Ω




25°C

3 V

0.5 1.5

ΩFull 3.5




25°C3 V

7 8Ω

Full 12


INO(OFF)

VNO = 1 V,VCOM = 3 V,orVNO = 3 V,VCOM = 1 V,


25°C

3.6 V

–30 –6 30

nAFull –40 40


ICOM(OFF)

VCOM = 1 V,VNO = 3 V,orVCOM = 3 V,VNO = 1 V,


25°C

3.6 V

–50 –7 50

nAFull –50 50

NOON leakagecurrent

INO(ON)

VNO = 1 V,VCOM = Open,orVNO = 3 V,VCOM = Open,


25°C

3.6 V

–40 –7 40

nAFull –40 40


ICOM(ON)

VCOM = 1 V,VNO = Open,orVCOM = 3 V,VNO = Open,


25°C

3.6 V

–70 –20 70

nAFull –70 70

Digital Control Input (IN)Input logic high VIH Full VCC × 0.7 5.5 VInput logic low VIL Full 0 VCC × 0.3 V


25°C3.6 V

–0.1 0.05 0.1µA

Full –1 1


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8




Electrical Characteristics For 3.3-V Supply(1) (continued)VCC = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)


Turn-on time tONVCOM = 2 V,RL = 300 Ω,


25°C 3.3 V 4.9 5.6 6.4ns

Full 3 V to3.6 V 4.3 7.1

Turn-off time tOFFVCOM = 2 V,RL = 300 Ω,


25°C 3.3 V 2 2.7 3.7ns

Full 3 V to3.6 V 1.3 4.7


CL = 0.1 nF,See Figure 24 25°C 3.3 V 0.5 pC

NOOFFcapacitance

CNO(OFF)VNO = VCC orGND,

Switch OFF,See Figure 19 25°C 3.3 V 5.5 pF

COMOFFcapacitance


Switch OFF,See Figure 19 25°C 3.3 V 6 pF

NOON capacitance CNO(ON)

VNO = VCC orGND,

Switch ON,See Figure 19 25°C 3.3 V 14 pF


VCOM = VCC orGND,


Digital inputcapacitance CI VIN = VCC or GND, See Figure 19 25°C 3.3 V 3 pF

Bandwidth BW RL = 50 Ω, Switch ON,See Figure 21 25°C 3.3 V 300 MHz


Switch OFF,See Figure 22 25°C 3.3 V –68 dB


Switch ON,See Figure 23 25°C 3.3 V –66 dB


CL = 50 pF,f = 20 Hz to 20 kHz,See Figure 25 25°C 3.3 V 0.065%

Supply


25°C3.6 V

0.1 1µA

Full 5


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9











25°C2.3 V

22Ω



Switch ON,SeeFigure 16

25°C

2.3 V

0.5 1.5

ΩFull 5




25°C2.3 V

16 18Ω

Full 25


INO(OFF)

VNO = 0.5 V,VCOM = 2.2 V,orVNO = 2.2 V,VCOM = 0.5 V,


25°C

2.7 V

–30 –5.5 30

nAFull –40 40


ICOM(OFF)

VCOM = 0.5 V,VNO = 2.2 V,orVCOM = 2.2 V,VNO = 0.5 V,


25°C

2.7 V

–50 –7.5 50

nAFull –50 50

NOON leakagecurrent

INO(ON)

VNO = 0.5 V,VCOM = Open,orVNO = 2.2 V,VCOM = Open,


25°C

2.7 V

–40 –5 40

nAFull –40 40


ICOM(ON)

VCOM = 0.5 V,VNO = Open,orVCOM = 2.2 V,VNO = Open,


25°C

2.7 V

–70 –12 70

nAFull –70 70

Digital Control Input (IN)

Input logic high VIH Full VCC ×0.7

5.5 V

Input logic low VIL Full 0 VCC × 0.3 V


25°C2.7 V

–0.1 0.05 0.1µA

Full –1 1


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10




Electrical Characteristics For 2.5-V Supply(1) (continued)VCC = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)


Turn-on time tONVCOM = 1.5 V,RL = 300 Ω,


25°C 2.5 V 5.7 6.4 8.1ns

Full 2.3 V to2.7 V 4.4 8.5

Turn-off time tOFFVCOM = 1.5 V,RL = 300 Ω,


25°C 2.5 V 2.1 3.1 4.3ns

Full 2.3 V to2.7 V 1.8 4.8



NOOFFcapacitance

CNO(OFF)VNO = VCC orGND,


COMOFFcapacitance



NOON capacitance CNO(ON)

VNO = VCC orGND,



VCOM = VCC orGND,


Digital inputcapacitance CIN VIN = VCC or GND, See Figure 19 25°C 2.5 V 3 pF







CL = 50 pF,f = 20 Hz to 20 kHz,See Figure 25 25°C 2.5 V 0.35%

Supply


25°C2.7 V

0.1 1µA

Full 5


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11











25°C1.65 V

85Ω




25°C

1.65 V

0.9 2

ΩFull 6




25°C1.65 V

75 85Ω

Full 100


INO(OFF)

VNO = 0.3 V,VCOM = 1.65 V,orVNO = 1.65 V,VCOM = 0.3 V,


25°C

1.95 V

–30 –6 30

nAFull –40 40


ICOM(OFF)

VCOM = 0.3 V,VNO = 1.65 V,orVCOM = 1.65 V,VNO = 0.3 V,


25°C

1.95 V

–50 –7 50

nAFull –50 50

NOON leakagecurrent

INO(ON)

VNO = 0.3 V,VCOM = Open,orVNO = 1.65 V,VCOM = Open,


25°C

1.95 V

–40 7 40

nAFull –40 40


ICOM(ON)

VCOM = 0.3 V,VNO = Open,orVCOM = 1.65 V,VNO = Open,


25°C

1.95 V

–70 –8.5 70

nAFull –70 70

Digital Control Input (IN)

Input logic high VIH Full VCC ×0.65

5.5 V

Input logic low VIL Full 0 VCC ×0.35 V


25°C1.95 V

–0.1 0.05 0.1µA

Full –1 1


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Electrical Characteristics For 1.8-V Supply(1) (continued)VCC = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)


Turn-on time tONVCOM = 1.3 V,RL = 300 Ω,


25°C 1.8 V 9.3 10.4 11.5

nsFull

1.65 Vto

1.95 V6.8 12.9

Turn-off time tOFFVCOM = 1.3 V,RL = 300 Ω,


25°C 1.8 V 3.3 4.3 5.2

nsFull

1.65 Vto

1.95 V2.4 6.5



NOOFFcapacitance

CNO(OFF) VNO = VCC or GND, Switch OFF,See Figure 19 25°C 1.8 V 6 pF

COMOFFcapacitance



NOON capacitance CNO(ON) VNO = VCC or GND, Switch ON,

See Figure 19 25°C 1.8 V 14.5 pF


VCOM = VCC orGND,

Switch ON,See Figure 19 25°C 1.8 V 14.5 pF

Digital inputcapacitance CIN VIN = VCC or GND, See Figure 19 25°C 1.8 V 3 pF






Total harmonicdistortion THD RL = 10 kΩ,

CL = 50 pF,

f = 20 Hz to 20kHz,See Figure 25

25°C 1.8 V 2.7%

Supply


25°C1.95 V

0.1 1µA

Full 5


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0

2

4

6

8

10

12

14

16

VCOM (V)

r on

(Ω)

TA = −40°C

TA = 25°C

TA = 85°C

0 0.5 1 2 2.5 31.5

0

1

2

3

4

5

6

7

8

9

10

VCOM (V)

r on

(Ω)

TA = −40°C

TA = 25°C

TA = 85°C

0 0.5 1 2 2.5 31.5 3.5 4 4.5

0

2

4

6

8

10

12

14

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.5 1 2 2.5 31.5

0

1

2

3

4

5

6

7

8

9

10

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.5 1 2 2.5 31.5 3.5 4 4.5

Figure 1

0

10

20

30

40

50

60

70

80

90

VCOM (V)

r on

()

Ω

TA = 25°C

NO1 COM1

0 0.25 0.5 1 1.25 1.5 1.750.75

0

5

10

15

20

25

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.3 0.6 1.2 1.5 1.8 2.10.9 2.4

13




6.9 Typical Performance

VCC = 1.65 V

Figure 1. ron vs VCOM

VCC = 2.3 V


VCC = 3 V


VCC = 4.5 V


Figure 5. ron vs VCOM (VCC = 3 V) Figure 6. ron vs VCOM (VCC = 4.5 V)


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VCC (V)

Logic

Thre

shold

(V

)

VIL

VIH

TA = 25°C

0.5

1

1.5

2

2.5

3

3.5

01.6 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6

–35

–30

–25

–20

–15

–10

–5

0

5

–10

–8

–6

–4

–2

−1

0

0.1 1 10 100 1000Frequency (MHz)

Gain

(dB

)

Phase (

°)

Phase

Gain

TA = 25°C

0

1

2

3

4

5

6

TA (C)

t ON

/tO

FF

(ns)

−40 C 25C 85C° ° °

tON

tOFF

0

2

4

6

8

10

12

1.65 2.15 2.65 3.15 3.65 4.15 4.65 5.15

Supply Voltage (V)

tON

t ON

/tO

FF

(ns)

tOFF

0

2

4

6

8

10

12

14

16

18

20

−40°C

Leakage (

nA

)

TA (C)

INO2(OFF)

INO2(ON)

ICOM2(ON), ICOM2(OFF)

INO1(ON)

ICOM1(ON), ICOM1(OFF)

INO1(OFF)

25°C 85°C

3.3 V

5 V

−1.0

−0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 1 2 3 4 5 6

VCOM

QC

14




Typical Performance (continued)

Figure 7. Leakage Current vs Temperature Figure 8. Charge Injection (QC) vs VCOM

Figure 9. tON and tOFF vs VCCFigure 10. tON and tOFF vs Temperature (VCC = 5 V)

Figure 11. Logic Threshold vs VCC

Figure 12. Bandwidth (VCC = 5 V)


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0

10

20

30

40

50

60

70

−40 C 25C 85C° ° °

I CC

TY

P (

nA

)

TA (C)

0

1

2

3

4

5

6

0.1 1 10 100 1000Frequency (MHz)

TH

D +

Nois

e (

%)

7

THD (3.3 V)

THD (5 V)

Frequency (MHz)

Ga

in (

dB

)

–120

–100

–60

–40

–20

0

0.1 1 10 100 1000

–80

OFF Isolation

Crosstalk

15




Typical Performance (continued)

Figure 13. OFF Isolation and Crosstalk (VCC = 5 V) Figure 14. Total Harmonic Distortion vs Frequency

Figure 15. Power-Supply Current vs Temperature(VCC = 5 V)


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16




7 Parameter Measurement Information

Table 1. Parameter DescriptionSYMBOL DESCRIPTION

VCOM Voltage at COMVNO Voltage at NOron Resistance between COM and NO ports when the channel is ONΔron Difference of ron between channels in a specific device

ron(flat) Difference between the maximum and minimum value of ron in a channel over the specified range of conditionsINO(OFF) Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state

INO(ON)Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output(COM) open

ICOM(OFF) Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state

ICOM(ON)Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output(NO) open

VIH Minimum input voltage for logic high for the control input (IN)VIL Maximum input voltage for logic low for the control input (IN)VIN Voltage at the control input (IN)

IIH, IIL Leakage current measured at the control input (IN)

tONTurn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagationdelay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.

tOFFTurn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagationdelay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.

QC

Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.Charge injection, QC = CL × ΔVCOM, CL is the load capacitance and ΔVCOM is the change in analog output voltage.

CNO(OFF) Capacitance at the NO port when the corresponding channel (NO to COM) is OFFCNO(ON) Capacitance at the NO port when the corresponding channel (NO to COM) is ON

CCOM(OFF) Capacitance at the COM port when the corresponding channel (COM to NO) is OFFCCOM(ON) Capacitance at the COM port when the corresponding channel (COM to NO) is ON

CIN Capacitance of IN

OISOOFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specificfrequency, with the corresponding channel (NO to COM) in the OFF state.

XTALKCrosstalk is a measurement of unwanted signal coupling from an ON channel to an adjacent ON channel (NC1 to NC2).This is measured in a specific frequency and in dB.

BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.

THD Total harmonic distortion is defined as the ratio of the root mean square (RMS) value of the second, third, and higherharmonics to the magnitude of fundamental harmonic.

ICC Static power-supply current with the control (IN) pin at VCC or GND


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Channel ON

ON-State Leakage Current

VIN = VIH or V IL

VCC

GND

NO

VIN

COMVCOM

VNO

IN

+

+

Channel OFF

OFF-State Leakage Current

VIN= VIH or V IL

VCC

GND

NO

VIN

COM VCOM

VNO

IN

+

+

+

VCC

ICOM

ron

VCOM

VNO

ICOM

GND

Channel ON

NO

VIN

COM VCOM

VIN = VIH or V IL

VNO

IN

+

+

=–

Ω

17




Figure 16. ON-State Resistance (ron)

Figure 17. OFF-State Leakage Current (ICOM(OFF), INO(OFF))

Figure 18. ON-State Leakage Current (ICOM(ON), INO(ON))


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VCC

GND

NO

INVIN

COM

50

50

VNO

VCOM

Channel ON: NO to COM

Network Analyzer Setup

Source Power = 0 dBm

(632-mV P-P at 50- load)

DC Bias = 350 mV

Network Analyzer

Source

Signal

+

VIN = VCC or GND

Ω

ΩΩ

CL(2) RL

VCOM

VCC

GND

NO

IN

VNO

VIN

COM

Logic

Input (1)

300 Ω

RL CL

35 pFtON

TEST

300 Ω 35 pFtOFF

50%

tON tOFF

50%

90% 90%

Logic

Input

(VIN)

VCC

Switch

Output

(VNO)

0

(3)

VCC

GND

IN

VBIAS

VIN

VIN = VIH or V IL

VBIAS = VCC or GND

Capacitance is measured at NO,

COM, and IN inputs during ON

and OFF conditions.

Capacitance

Meter

VCOM

VNO

COM

NO

18




Figure 19. Capacitance (CIN, CCOM(OFF), CCOM(ON), CNO(OFF), CNO(ON))

(1) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,tf < 5 ns.

(2) CL includes probe and jig capacitance.(3) See Electrical Characteristics tables for VCOM.

Figure 20. Turn-On (tON) and Turn-Off Time (tOFF)

Figure 21. Bandwidth (BW)


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VCC

GND

NO

IN

RGEN

VIN

COM VCOM

CL(2)

OFF

VCOM

ON OFF

ΔVCOMVGEN

+

VIN= VIH or V IL

CL = 0.1 nF

VGEN = 0 to VCC

RGEN = 0

QC = CL × ΔVCOM

Logic

Input (1)

VIH

VIL

Logic

Input

(VIN)

NO1

NO2

50

50

VNO1

COM1Channel ON: NO to COM



(632 mV P-P at 50 load)

DC Bias = 350 mV

50

VCC

GND

VNO2

Source

Signal

Network Analyzer

COM2

INVIN

+

Ω

Ω

Ω

-Ω

NO

COM

VNO

VCOM

Channel OFF: NO to COM



(632-mV P-P at 50- load)

DC Bias = 350 mV

50

VCC

GND

50

50

Network Analyzer

Source

Signal

INVIN

+

VIN = VCC or GNDΩ

Ω

Ω

Ω

19




Figure 22. OFF Isolation (OISO)

Figure 23. Crosstalk (XTALK)

(1) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,tf < 5 ns.

(2) CL includes probe and jig capacitance.

Figure 24. Charge Injection (QC)


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VCC

GND

NO

COM

10 F

CL(1)

RL

VCC/2

10 F

INVIN

600600

600

Audio Analyzer

Source

Signal

RL = 600 Ω

CL = 50 pFVSOURCE = VCC P-P fSOURCE = 20 Hz to 20 kHz

Channel ON: COM to NC VIN = VIH or V IL

ΩΩ

Ω

µ

µ

20




(1) CL includes probe and jig capacitance.

Figure 25. Total Harmonic Distortion (THD)


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SPST

IN1

NO1 COM1

SPST

IN2

NO2 COM2

21




8 Detailed Description

8.1 OverviewThe TS5A2066 device is a 2-channel single-pole single-throw (1:1 SPST) analog switch that is designed tooperate from 1.65 V to 5.5 V. This device can handle both digital and analog signals, and signals up to VCC canbe transmitted in either direction

8.2 Functional Block Diagram

8.3 Feature Description5-V tolerant control inputs allow 5-V logic levels to be present on the IN pin irrespective of the voltage on VCCpin.

Low ON-resistance and THD performance allows minimal signal distortion through device.

8.4 Device Functional ModesTable 2 shows the functional modes for TS5A23166.

Table 2. Function Table

IN NO TO COM,COM TO NO

L OFFH ON


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SPST switch Device 1

System

Controller

COM1

COM2

NO1

Data

IN1

VCC

3.3V 3.3V

GND

IN2

Device 2NO2

3.3V

22




9 Application and Implementation

NOTEInformation in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TI’s customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.

9.1 Application InformationThe TS5A2066 2-channel, 1:1 SPST analog switch is a basic component that could be used in any electricalsystem design that signal isolation.

9.2 Typical Application

Figure 26. Typical Application Circuit

9.2.1 Design RequirementsEnsure that all of the signals passing through the switch are within the specified ranges in the recommendedoperating conditions to ensure proper performance.

9.2.2 Detailed Design ProcedureThe TS5A2066 can be properly operated without any external components.

Unused signal path pins COM or NO maybe left floating or connected to ground through a 50-Ω resistor toprevent signal reflections back into the device.

TI recommends that the digital control pins (INX) be pulled up to VCC or down to GND to avoid undesired switchpositions that could result from the floating pin. Leaving the logic pins floating may increase ICC. Refer to the TIapplication report, Implications of Slow or Floating CMOS Inputs (SCBA004), for further details.


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http://www.ti.com/lit/pdf/SCBA004

0

2

4

6

8

10

12

14

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.5 1 2 2.5 31.5

0

1

2

3

4

5

6

7

8

9

10

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.5 1 2 2.5 31.5 3.5 4 4.5

Figure 1

0

10

20

30

40

50

60

70

80

90

VCOM (V)

r on

()

Ω

TA = 25°C

NO1 COM1

0 0.25 0.5 1 1.25 1.5 1.750.75

0

5

10

15

20

25

VCOM (V)

r on

(Ω)

TA = 25°C

NO1 COM1

0 0.3 0.6 1.2 1.5 1.8 2.10.9 2.4

23




Typical Application (continued)9.2.3 Application Curves

VCC = 1.65 V


VCC = 2.3 V


VCC = 3 V


VCC = 4.5 V


10 Power Supply RecommendationsProper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximumratings, because stresses beyond the listed ratings can cause permanent damage to the device. Alwayssequence VCC on first, followed by NO, NC, or COM. Although it is not required, power-supply bypassingimproves noise margin and prevents switching noise propagation from the VCC supply to other components. A0.1-μF capacitor, connected from VCC to GND, is adequate for most applications. Copyright


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1

2

3

4

8

NO2GND

COM1

COM2

NO1 VCC

IN1

IN2

LEGEND

VIA to Power Plane

VIA to GND Plane (Inner Layer)

Polygonal Copper Pour

To System

To System

To System

7

6

5

Bypass Capacitor

Vcc

To System To System

To System

24




11 Layout

11.1 Layout GuidelinesHigh-speed switches require proper layout and design procedures for optimum performance. Reduce strayinductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to thedevice as possible. Use large ground planes where possible.

11.2 Layout Example

Figure 31. Layout Example


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25




12 Device and Documentation Support

12.1 Receiving Notification of Documentation UpdatesTo receive notification of documentation updates, navigate to the device product folder on ti.com. In the upperright corner, click on Alert me to register and receive a weekly digest of any product information that haschanged. For change details, review the revision history included in any revised document.

12.2 Community ResourcesThe following links connect to TI community resources. Linked contents are provided "AS IS" by the respectivecontributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms ofUse.

TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaborationamong engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and helpsolve problems with fellow engineers.

Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools andcontact information for technical support.

12.3 TrademarksE2E is a trademark of Texas Instruments.All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge CautionThis integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.5 GlossarySLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable InformationThe following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.


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http://www.ti.com/corp/docs/legal/termsofuse.shtml

http://www.ti.com/corp/docs/legal/termsofuse.shtml

http://e2e.ti.com

http://support.ti.com/

http://www.ti.com/lit/pdf/SLYZ022

PACKAGE OPTION ADDENDUM

www.ti.com 17-Aug-2015

Addendum-Page 1

PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

TS5A2066DCTR ACTIVE SM8 DCT 8 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 JAGZ

TS5A2066DCTRE4 ACTIVE SM8 DCT 8 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 JAGZ

TS5A2066DCUR ACTIVE VSSOP DCU 8 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 JAGR

TS5A2066DCURE4 ACTIVE VSSOP DCU 8 3000 Green (RoHS& no Sb/Br)


TS5A2066DCURG4 ACTIVE VSSOP DCU 8 3000 Green (RoHS& no Sb/Br)


TS5A2066YZPR ACTIVE DSBGA YZP 8 3000 Green (RoHS& no Sb/Br)

SNAGCU Level-1-260C-UNLIM -40 to 85 (J47 ~ J4N)

(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

http://www.ti.com/product/TS5A2066?CMP=conv-poasamples#samplebuy






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PACKAGE OPTION ADDENDUM


Addendum-Page 2

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

TS5A2066DCTR SM8 DCT 8 3000 180.0 13.0 3.35 4.5 1.55 4.0 12.0 Q3

TS5A2066DCUR VSSOP DCU 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 Q3

TS5A2066DCURG4 VSSOP DCU 8 3000 180.0 8.4 2.25 3.35 1.05 4.0 8.0 Q3

TS5A2066YZPR DSBGA YZP 8 3000 178.0 9.2 1.02 2.02 0.63 4.0 8.0 Q1

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TS5A2066DCTR SM8 DCT 8 3000 182.0 182.0 20.0

TS5A2066DCUR VSSOP DCU 8 3000 202.0 201.0 28.0

TS5A2066DCURG4 VSSOP DCU 8 3000 202.0 201.0 28.0

TS5A2066YZPR DSBGA YZP 8 3000 220.0 220.0 35.0

PACKAGE MATERIALS INFORMATION


Pack Materials-Page 2

MECHANICAL DATA

MPDS049B – MAY 1999 – REVISED OCTOBER 2002

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DCT (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE

ÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇÇ

0,600,20

0,25

0° – 8°

0,15 NOM

Gage Plane

4188781/C 09/02

4,25

5

0,300,15

2,903,752,70

8

4

3,152,75

1

0,100,00

1,30 MAX

Seating Plane

0,10

M0,130,65

PIN 1INDEX AREA

NOTES: A. All linear dimensions are in millimeters.B. This drawing is subject to change without notice.C. Body dimensions do not include mold flash or protrusionD. Falls within JEDEC MO-187 variation DA.

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PACKAGE OUTLINE

C0.5 MAX

0.190.15

1.5TYP

0.5 TYP

8X 0.250.21

0.5TYP

B E A

D

4223082/A 07/2016

DSBGA - 0.5 mm max heightYZP0008DIE SIZE BALL GRID ARRAY

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.2. This drawing is subject to change without notice.

BALL A1CORNER

SEATING PLANE

BALL TYP0.05 C

B

1 2

0.015 C A B

SYMM

SYMM

C

A

D

SCALE 8.000

D: Max =

E: Max =

1.918 mm, Min =

0.918 mm, Min =

1.858 mm

0.858 mm

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EXAMPLE BOARD LAYOUT

8X ( 0.23)(0.5) TYP

(0.5) TYP

( 0.23)METAL

0.05 MAX ( 0.23)SOLDER MASKOPENING

0.05 MIN

4223082/A 07/2016


NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).

SYMM

SYMM

LAND PATTERN EXAMPLESCALE:40X

1 2

A

B

C

D

NON-SOLDER MASKDEFINED

(PREFERRED)

SOLDER MASK DETAILSNOT TO SCALE

SOLDER MASKOPENING

SOLDER MASKDEFINED

METAL UNDERSOLDER MASK

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EXAMPLE STENCIL DESIGN

(0.5)TYP

(0.5) TYP

8X ( 0.25) (R0.05) TYP

METALTYP

4223082/A 07/2016


NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

SYMM

SYMM

SOLDER PASTE EXAMPLEBASED ON 0.1 mm THICK STENCIL

SCALE:40X

1 2

A

B

C

D

IMPORTANT NOTICE

Texas Instruments Incorporated (TI) reserves the right to make corrections, enhancements, improvements and other changes to itssemiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyersshould obtain the latest relevant information before placing orders and should verify that such information is current and complete.TI’s published terms of sale for semiconductor products (http://www.ti.com/sc/docs/stdterms.htm) apply to the sale of packaged integratedcircuit products that TI has qualified and released to market. Additional terms may apply to the use or sale of other types of TI products andservices.Reproduction of significant portions of TI information in TI data sheets is permissible only if reproduction is without alteration and isaccompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such reproduceddocumentation. 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Designer represents that, withrespect to their applications, Designer has all the necessary expertise to create and implement safeguards that (1) anticipate dangerousconsequences of failures, (2) monitor failures and their consequences, and (3) lessen the likelihood of failures that might cause harm andtake appropriate actions. Designer agrees that prior to using or distributing any applications that include TI products, Designer willthoroughly test such applications and the functionality of such TI products as used in such applications.TI’s provision of technical, application or other design advice, quality characterization, reliability data or other services or information,including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended toassist designers who are developing applications that incorporate TI products; by downloading, accessing or using TI Resources in anyway, Designer (individually or, if Designer is acting on behalf of a company, Designer’s company) agrees to use any particular TI Resourcesolely for this purpose and subject to the terms of this Notice.TI’s provision of TI Resources does not expand or otherwise alter TI’s applicable published warranties or warranty disclaimers for TIproducts, and no additional obligations or liabilities arise from TI providing such TI Resources. TI reserves the right to make corrections,enhancements, improvements and other changes to its TI Resources. TI has not conducted any testing other than that specificallydescribed in the published documentation for a particular TI Resource.Designer is authorized to use, copy and modify any individual TI Resource only in connection with the development of applications thatinclude the TI product(s) identified in such TI Resource. NO OTHER LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISETO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT, AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTYRIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN, including but not limited to any patent right, copyright, mask work right, orother intellectual property right relating to any combination, machine, or process in which TI products or services are used. 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IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL,DIRECT, SPECIAL, COLLATERAL, INDIRECT, PUNITIVE, INCIDENTAL, CONSEQUENTIAL OR EXEMPLARY DAMAGES INCONNECTION WITH OR ARISING OUT OF TI RESOURCES OR USE THEREOF, AND REGARDLESS OF WHETHER TI HAS BEENADVISED OF THE POSSIBILITY OF SUCH DAMAGES.Unless TI has explicitly designated an individual product as meeting the requirements of a particular industry standard (e.g., ISO/TS 16949and ISO 26262), TI is not responsible for any failure to meet such industry standard requirements.Where TI specifically promotes products as facilitating functional safety or as compliant with industry functional safety standards, suchproducts are intended to help enable customers to design and create their own applications that meet applicable functional safety standardsand requirements. Using products in an application does not by itself establish any safety features in the application. Designers mustensure compliance with safety-related requirements and standards applicable to their applications. Designer may not use any TI products inlife-critical medical equipment unless authorized officers of the parties have executed a special contract specifically governing such use.Life-critical medical equipment is medical equipment where failure of such equipment would cause serious bodily injury or death (e.g., lifesupport, pacemakers, defibrillators, heart pumps, neurostimulators, and implantables). Such equipment includes, without limitation, allmedical devices identified by the U.S. Food and Drug Administration as Class III devices and equivalent classifications outside the U.S.TI may expressly designate certain products as completing a particular qualification (e.g., Q100, Military Grade, or Enhanced Product).Designers agree that it has the necessary expertise to select the product with the appropriate qualification designation for their applicationsand that proper product selection is at Designers’ own risk. Designers are solely responsible for compliance with all legal and regulatoryrequirements in connection with such selection.Designer will fully indemnify TI and its representatives against any damages, costs, losses, and/or liabilities arising out of Designer’s non-compliance with the terms and provisions of this Notice.

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2017, Texas Instruments Incorporated

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