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Page 1: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Practice Midterm Exam

Oct. 3, 8:35-9:25am

Name:

(40 points total)

Problem 1: Consider the non-linear system shown in Fig. 1(a), where the circuit isbeing driven with the signal vS = 1 + 0.1 sin(ωt) V. [10 points]

(a) What are the steady state and small signal components of the input volt-age? [2]

(b) What is the steady state level of the output voltage (VOUT )? [2]

(c) Suppose now that we wish to linearize the circuit of Fig. 1(a) to determineits response to the small signal component of the input voltage. We cando this by modeling the system for small signals as shown in Fig. 1(b).What is the value of the small signal transconductance g for these biasconditions? [5]

(d) Using this model, what is the signal component of the output voltage (vout)?[1]

(a)

(b)

Figure 1: (a) Non-linear system, (b) Linear model.

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Page 2: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Problem 1 (cont’d)

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Page 3: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Problem 2: Consider the differential pair with current mirror biasing and activeloads shown in Fig. 2. Assume that all transistors are sized equally withW/L=10. For both pMOS and nMOS devices: Vt=1 V, µCox=2 mA/V2, andVA=20 V. Also, IREF = 40 mA and the supply voltage is VDD = 10 V. [16points]

Figure 2: Differential pair schematic for Problem 2.

(a) Assuming that all transistors are in saturation, what are the VGS valuesfor M4 and M5? (neglect channel length modulation for this part of theproblem) [4]

(b) What is the differential gain (Ad) of the circuit? [6]

(c) What is the input common-mode range of the differential pair? [6]

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Page 4: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Problem 2 (cont’d)

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Page 5: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Problem 3: Consider the circuit shown in Fig. 3 where the relationship betweenthe voltages at the two nodes is as shown. We would like to replace this circuitwith its Miller equivalent, shown in Fig. 3(b). What are the values of R1, R2,C1, and C1? [6 points]

(a) (b)

Figure 3: (a) Schematic, (b) Miller equivalent.

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Page 6: Practice Midterm Examccharles/ece3110/Homework/pmidterm1_1.pdfECE 3110: Engineering Electronics II Fall 2007 Practice Midterm Exam Oct. 3, 8:35-9:25am Name: (40 points total) Problem

ECE 3110: Engineering Electronics II Fall 2007

Problem 4: Consider the feedback system shown in Fig. 4. [8 points]

(a) What is the gain of the system (vout/vin)? [6]

(b) By what factor is the gain reduced from what it would be if all feedbackwere removed? [2]

Figure 4: Feedback system for Problem 4.

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