Organic Charge Trapping Memory Transistors

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1 Organic Charge Trapping Memory Transistors n – Erik Bury – André Cardoso – Evelien Mathieu – Pieter Weckx

description

Under a Compulsory Course of "Materials Physics and Technology for Nanoelectronics" a team of BE Students of Nanotechnology, Nanoelectronics and Bionnotechnology prepared this seminar for Prof. Marc Heyns, [email protected] Kapeldreef 75, B-3001 Heverlee IMEC Building IV, room 2.33Tel: 016 281 348

Transcript of Organic Charge Trapping Memory Transistors

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Organic Charge Trapping Memory Transistors

Dries Agten – Erik Bury – André Cardoso – Evelien Mathieu – Pieter Weckx

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Overview

Introductiono Memory typeso FET-based memories

Working principleo Charge trappingo Band diagram analysiso Programming sequence

Comparison of two deviceso PVA & PCBMo PαMS & Pentacene

Conclusion

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Memory types

Q.D. Ling et al, Progr. Polym. Sci. 2008, 33, 92

Introduction

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FET-based memories

Floating Gate FerroelectricCharge Trapping

Cyferz, Wikipedia, 2007, Flash_cell_structure Cyferz, Wikipedia, 2008, 1T_FeRAM_cell_structure

Introduction

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SONOS/MONOS Dielectrics

Cyferz, Wikipedia, 2007, SONOS_cell_structure L. Forbes, free patents onl. 2005, 10/775908

Charge TrappingIntroduction

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Charge Trapping

Organic field-effect transistors with polarizable gate insulatorsHoward E. Katz et al., Appl. Phys. 2002, 91, 1572–6

“There is growing appreciation of the capability to fabricatevarious kinds of electronic circuits from organic materials.”

Introduction

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From MOS to FGMOS

Based on MOSFET transistor

Gate is uncoupled, memory is non-volatile

Charges are trapped in the floating gate

Data sensed by Vth shift of MOSFET

Data represented by carriers stored in the floating gate

J. D. Casperson et al., CIT, Journal of Applied Physics, 2009, 92, 261

Working principle

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Influences on Vth

Traps close to/in the channel

Charge injection from the semiconductor into the dielectric

Slow reactionsof charge carriers in the organic semiconductor

Mobile ions in the semiconductor

Ferroelectric effect

Mobile ions in the dielectric

Charge injection from the gate electrode

M. Egginger et al., Monatsh Chem, 2009,140,735

Working principle

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Band diagram analysis (1)

Vgs=0V Vgs=-5V

-> accumulation-> depletion

Working principle

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Band diagram analysis (2)

Vgs=-5V Vgs=-10V

-> accumulation-> inversion

Working principle

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Working principle

When applying an external voltage to the gate, charges tunnel from the channel to the interface (~104 carriers to represent 1 bit)

Both electrons and holes

Programming sequence

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Measurement setup

S.Y. Chou, Princeton University, Publication on website

Working principle

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Measurements

Shift in threshold voltage

M. Debucquoy et al, Organic electronics 2009, 10, 1252

Working principle

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Ambipolar vs unipolar

Ambipolar semiconductor: both p-type and n-type operations are realised (eg. program by holes and erase by electrons)

→ Balanced mobility (n and p) and ON/OFF operation needed

Insufficient electron mobility→ Trapped holes cannot be erased

Wide memory window

Working principle

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Stacking holes for memory usage

Example: electrons tunnel back too easy -> poor retention time

Negative part of memory window is useful

M. Debucquoy et al , Organic electronics 2009, 10, 1252

Working principle

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Search for improvement in terms of Materials and Scheme

Singh et al, 2004

Heremans et al, 2009

Comparison of two devicesComparison of two devices

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Comparison - Structure

PVA – polyvinylalcohol PCBM – methanofullerene

T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409

Organic components

Size: channel length W=1000um L=10um

Comparison of two devices

Pentacene – polyaromatic hydrocarbon

PαMS – polystyrene Thiol monolayer –

fluorinated thiols

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Comparison - Semiconductor

PCBM p-type High mobility High ON/OFF current ratio

T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409

Pentacene (~14 Å)o 5 benzene ringso Crystal Structure

p-type High Mobility Reasonable ON/OFF current ratio

IBM Zurich,AFM Image Penacene Aug 2009

Campbell, 1961 molecular packing

Prof. Takao Someya

Comparison of two devices

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Comparison - Electret

Charge trapping within bulk or at interface

Hydrophilic

T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409

PαMS (polyalpha-methylstyrene) Hydrophobic(Insulator coated with a very thin-layer)

Reduces: trapped electrons at the interface between the pentacene

and the gate dielectric

To suppress the degradation of the on–off ratio

High-quality, electron-trap free surface allowing excellent electron transport

Comparison of two devices

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Comparison - Adjacent materials

Cr for source & drain: o No diffusion into PCBM

ITO gate

No insulator layer

Heptadecafluoro-1-decanethiol (Thiol monolayer) Other materials:

o Au ; SiO2 ; n++Si

Improved interface:

Improves pentacene layer growthReduces interface states

Mobility increases Threshold voltage approaches zero

Appl. Phys. Lett. 88, 222103 (2006)

Improve the interface Contacts <-> Semiconductor layer

Comparison of two devices

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Performance measurements (Singh)

T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409

T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409

Comparison of two devices

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Performance Measurements (Herem.)

- pulse (write) h trapped

Programming voltage Transistor’s mobilitye-

trapped

dielectricΔVon =2V

Gate

Decrease 1.9V->1.4V

h mobility decrease

Shift VON+ & VON-

Retention time

Memory Window

+pulse (erase) e trapped

Saturation

Comparison of two devices

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Performance Comparison

  FLASH[a]

Floating Gate[b]

Ferroelectric[c]

PVA & PCBM

[d]

PαMS & pentacene

[e]

Retention time (h)  ~ 3 years  ~ 11  ~ 168  > 15  > 3 months

Programming time (s) 0.8  1  0.3e-3   500 1.5e-3 

Programming/erasing voltage (V) +8/-8  +6/-6  +77.5/-77.5   +50/-50 -15/+15

[a] R. Bez et al, Proc. of the IEEE 2003, 91, 4, 489[b] S. Kolliopoulou et al, Microel. Eng. 2004, 73-74, 725[c] R.C.G. Naber et al, Nat. Mater. 2005, 4, 243[d] T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 22, 5409[e] P. Heremans et al, Appl. Phys. Lett. 2009, 95, 103311

Comparison of two devices

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Conclusion

Conclusion from Singh organic memory:o The combination of PVA & PCBM does not make a good memory-element

Conclusion from Heremans organic memory:o It is possible to fabricate a device with

reprogrammable nonvolatile organic memory usable in Plastic Logic.

“Organic Transistor/Memory devices will reach $21.6 Billion in 2015”, NanoMarkets (2001)

Conclusion

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References

K.J. Baeg et al, Adv. Funct. Mater. 2008, 18, 3678-3685 T.B. Singh et al, Appl. Phys. Lett. 2004, 85, 5409-5411 K.J. Baeg et al, Adv. Mater. 2006, 18, 3179-3183 Q.D. Ling et al, Progr. Polym. Sci. 2008, 33, 917-978 R. Bez et al, Proc. of the IEEE 2003, 91, 4, 489-502 S. Kolliopoulou et al, Microel. Eng. 2004, 73-74, 725-729 R.C.G. Naber et al, Nat. Mater. 2005, 4, 243-248 P. Heremans et al, Appl. Phys. Lett. 2009, 95, 103311 J. Kang et al, J. Am. Chem. Soc., 2008, 130 (37), 12273–12275 K. Myny et al, Appl. Phys. Lett. 2006, 88, 222103  K. Asadi et al, Nature Materials 2008, 7, 547 Forbes, free patents onl. 2005, 10/775908 H.E. Katz et al, Appl. Phys. 2002, 91, 1572–6 Cyferz, Wikipedia 2007, Flash_cell_structure Cyferz, Wikipedia 2008, 1T_FeRAM_cell_structure Cyferz, Wikipedia 2007, SONOS_cell_structure