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A 0.18 μm CMOS Multilayer And Low Resistive Load Architecture Dedicated for LoC Applications Mohamed Amine Miled, Graduate Student Member, IEEE and Mohamad Sawan, Fellow, IEEE Polystim Neurotechnologies Laboratory, Department of Electrical Engineering ´ Ecole Polytechnique Montreal, Qu´ ebec, Canada [email protected] Abstract— The main challenge of building appropriate bio- electronic devices dedicated to point-of-care treatment is im- plementing miniaturized, real-time and on-line monitoring, and low-power consumption systems. We propose such miniaturized device featuring a fully automated system that can open a new era for real-time health monitoring using a label-free technique. The proposed device, based on dielectrophoresis (DEP) techniques, can be extended to numerous other methods such as magnetophoresis, fluorescence or antibody marking. Artificial cerebrospinal fluid and deionized water with particle diameter varying from 0.5 μm to 4.1 μm were used to test the prototype. This first low-voltage DEP-Based completely integrated device was able to separate different particles based on their DEP crossover frequency below 1.25 MHz using a very low-supply voltage (2.4 V) where the crossover frequency reflects the change of DEP effect from attraction to repulsion. I. I NTRODUCTION Fully integrated Lab-on-chip (LoC) is taking more atten- tions recently for a rapid point-of-care clinical diagnostic [1]. The main objective behind a fully integrated LoC is to reduce sample preparation and on-line monitoring of all biological processes on chip such as DNA extraction and hybridization, PCR amplification in a microarray [1]. Then, LoC integration requires miniaturized microfluidic and microelectronic chips. Unlike CMOS, microfluidic technologies were not initially op- timized for small devices. However recent technologies such as 3D laser engraving or hot embossing lead to new microfluidic microfabrication techniques allowing higher LoC integration with more advanced features [2]–[4]. Indeed, laser offers a wide range of configurations to design different microfluidic devices. More particularly, in the case of transparent materiel, changing the beam focus of the laser allows designing 3D microfluidic architecture. Also, hot embossing is another ap- proach to design microfluidic chips using molds. Through this technique with the high accuracy mold fabrication, it is possible to make sub micro scale structures. The advantage of having such small devices implies the ability to use low voltage CMOS chips to control liquid flow, particle displacement and cell motion in the micro- channels. Consequently, several microelectronic chips were designed for different applications for LoC. For example, Manaresi et al, proposed a fully integrated chip to control particle displacement with dielectrophoresis (DEP). Authors could successfully generate an electrical field cage to capture particles using DEP in addition to other applications [5], [6]. (a) (b) (c) Fig. 1: Electrical field propagation in a dielectrophoretic microfluidic channel: (a) without in-channel top electrode and (b) with in-channel top electrode using indium tin oxide; (c) Sensing operation of the proposed LoC: The enabled electrodes detect the variation of the capacitance in the top Fully integrated LoCs are also used in digital microfluidic. Although it is still a concept, and real applications in this field are not clear, this is a promising approach [7]. Section II mainly describes the theoretical background of the capacitive sensing and dielectrophoretic manipulation. Then our proposed design is introduced in section III. Finally experimental results are presented in section IV. II. BACKGROUND Capacitive sensing is used in different applications such as monitoring bacteria growth or cell motion. Our objective in this project is to measure the concentration of neurotrans- mitters; we are particularly interested in gamma-aminobutyric acid (GABA), dopamine and glutamate neurotransmitters as they are the major neurotransmitters involved in epilepsy, Parkinson among other neurodegenerative diseases. In this paper we designed a LoC based on capacitive sensing and DEP manipulation for neurotransmitter manipulation and sensing. We used planar electrode for both sensing and manipulation as the chip is fabricated with Sensonit technology from Micralyne (AB, Canada). Both manipulation and detection LoC concepts are described in Fig. 1. The proposed theoretical study is limited to two coplanar metal strips as shown in Fig. 2. Then, as the electrodes are fabricated by metal deposition on glass substrate, the global measured capacitance contains three major components which are the liquid, adhesive and substrate capacitances as defined in Eq. 1 where ε 0 is the vacuum dielectric constant [8]–[10]. C i = ε 0 ε i F (k i )w, i =1, 2, 3 (1) 978-1-4799-0620-8/13/$31.00 ©2013 IEEE

Transcript of [IEEE 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS) - Paris, France...

Page 1: [IEEE 2013 IEEE 11th International New Circuits and Systems Conference (NEWCAS) - Paris, France (2013.06.16-2013.06.19)] 2013 IEEE 11th International New Circuits and Systems Conference

A 0.18 µm CMOS Multilayer And Low ResistiveLoad Architecture Dedicated for LoC Applications

Mohamed Amine Miled, Graduate Student Member, IEEE and Mohamad Sawan, Fellow, IEEEPolystim Neurotechnologies Laboratory, Department of Electrical Engineering

Ecole Polytechnique Montreal, Quebec, [email protected]

Abstract— The main challenge of building appropriate bio-electronic devices dedicated to point-of-care treatment is im-plementing miniaturized, real-time and on-line monitoring, andlow-power consumption systems. We propose such miniaturizeddevice featuring a fully automated system that can open anew era for real-time health monitoring using a label-freetechnique. The proposed device, based on dielectrophoresis (DEP)techniques, can be extended to numerous other methods suchas magnetophoresis, fluorescence or antibody marking. Artificialcerebrospinal fluid and deionized water with particle diametervarying from 0.5 µm to 4.1 µm were used to test the prototype.This first low-voltage DEP-Based completely integrated devicewas able to separate different particles based on their DEPcrossover frequency below 1.25 MHz using a very low-supplyvoltage (2.4 V) where the crossover frequency reflects the changeof DEP effect from attraction to repulsion.

I. INTRODUCTION

Fully integrated Lab-on-chip (LoC) is taking more atten-tions recently for a rapid point-of-care clinical diagnostic [1].The main objective behind a fully integrated LoC is to reducesample preparation and on-line monitoring of all biologicalprocesses on chip such as DNA extraction and hybridization,PCR amplification in a microarray [1]. Then, LoC integrationrequires miniaturized microfluidic and microelectronic chips.Unlike CMOS, microfluidic technologies were not initially op-timized for small devices. However recent technologies such as3D laser engraving or hot embossing lead to new microfluidicmicrofabrication techniques allowing higher LoC integrationwith more advanced features [2]–[4]. Indeed, laser offers awide range of configurations to design different microfluidicdevices. More particularly, in the case of transparent materiel,changing the beam focus of the laser allows designing 3Dmicrofluidic architecture. Also, hot embossing is another ap-proach to design microfluidic chips using molds. Throughthis technique with the high accuracy mold fabrication, it ispossible to make sub micro scale structures.

The advantage of having such small devices implies theability to use low voltage CMOS chips to control liquidflow, particle displacement and cell motion in the micro-channels. Consequently, several microelectronic chips weredesigned for different applications for LoC. For example,Manaresi et al, proposed a fully integrated chip to controlparticle displacement with dielectrophoresis (DEP). Authorscould successfully generate an electrical field cage to captureparticles using DEP in addition to other applications [5], [6].

(a) (b) (c)

Fig. 1: Electrical field propagation in a dielectrophoreticmicrofluidic channel: (a) without in-channel top electrode and(b) with in-channel top electrode using indium tin oxide;(c) Sensing operation of the proposed LoC: The enabledelectrodes detect the variation of the capacitance in the top

Fully integrated LoCs are also used in digital microfluidic.Although it is still a concept, and real applications in thisfield are not clear, this is a promising approach [7].

Section II mainly describes the theoretical background ofthe capacitive sensing and dielectrophoretic manipulation.Then our proposed design is introduced in section III. Finallyexperimental results are presented in section IV.

II. BACKGROUND

Capacitive sensing is used in different applications suchas monitoring bacteria growth or cell motion. Our objectivein this project is to measure the concentration of neurotrans-mitters; we are particularly interested in gamma-aminobutyricacid (GABA), dopamine and glutamate neurotransmitters asthey are the major neurotransmitters involved in epilepsy,Parkinson among other neurodegenerative diseases. In thispaper we designed a LoC based on capacitive sensing and DEPmanipulation for neurotransmitter manipulation and sensing.We used planar electrode for both sensing and manipulation asthe chip is fabricated with Sensonit technology from Micralyne(AB, Canada). Both manipulation and detection LoC conceptsare described in Fig. 1.

The proposed theoretical study is limited to two coplanarmetal strips as shown in Fig. 2. Then, as the electrodes arefabricated by metal deposition on glass substrate, the globalmeasured capacitance contains three major components whichare the liquid, adhesive and substrate capacitances as definedin Eq. 1 where ε0 is the vacuum dielectric constant [8]–[10].

Ci = ε0εiF (ki)w, i = 1, 2, 3 (1)

978-1-4799-0620-8/13/$31.00 ©2013 IEEE

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In the case of particle manipulation, considering a small spherical particle placed into an electrical field and the micro-channel as a cube, as shown in Fig. \reffig:Fig1, it can be easily demonstrated that DEP forces $\overrightarrowF_particle$ depend on the applied signal amplitudes (A), phase $\phi$ and frequency (f) \cite6163390. !!!!!!!!!!!!

Substrate

Adhesive layer

Microelectrodes Micro-channel

l s

Fig. 2: Simplified in-channel electrodes design, where l ands are the outer edge-to-edge electrode distance and the inter-electrode space respectively

where F (ki) is the value of an elliptical integral as definedin [10], C2 and C3 are capacitances which depend on thedielectric constants ε2 and ε3 of the adhesive layer andsubstrate respectively. Then, they are considered as constants.By cons, the capacitance C1 depends on the relative dielectricconstant of the medium. The simplified equation of C1 can bewritten as follows which is a simplified form of Eq. 2 whileconsidering air as medium.

C1 = 0.5ε02

πln(4

l

s) (2)

Consequently if l >> s the medium dielectric constantchanges can not be detected easily. Thus in our design l = swhere l = 10 µm.

In the case of DEP particle manipulation, we consider asmall spherical particle placed into an electrical field and themicro-channel as a cube, as shown in Fig. 1. it can be easilydemonstrated that DEP forces depend on the applied signalamplitudes, phase and frequency [11].

III. PROPOSED LOC DESIGN

The developed LoC concept is proposed to monitor neu-rotransmitter concentrations in micro-channels in order tobe manipulated in a closed environment instead of usingimplantable metallic electrodes as conventional techniques.This method avoids electrode-tissue contact degradation andelectrode failure as shown in previous works [11].

This work presents a fully integrated Lab-on-Chip for DEP-based cell manipulation and capacitive sensing system. Theproposed LoC handles all necessary operations for cell manip-ulation such as mixing, separating, as well as concentrationsensing. The actual manipulation part is based on DEP asit is an efficient label free technique. Different electrodearchitectures are designed in a microfluidic chip. The elec-trode control is achieved through two different CMOS chips.First chip includes an advanced DEP signal generation withcontrolled frequency and phase shift [11]. A second chip isused to dispatch all signals through 64 electrodes controlledindividually. Both chips are wire bonded on a 15 mm x 15mm PCBs where discrete components are placed to controlsignal amplitude. Furthermore, a new FPGA generation IglooNano from Microsemi (CA, USA) is assembled (by flip-chip)to another PCB layer to monitor the CMOS chip to handlethe Bluetooth communication between computer user interface

Labview (National Instruments). These signals were also monitored with an oscilloscope to assure that the correct values were supplied to the system. Fig. 4 presents an example of particle separation handled by the proposed LoC.

!!!!

!

Fig. 3. fc range as a function of particle diameter for each implemented electrode architecture.

Fig. 2. LoC levels and interaction between its different components

Fig. 4. Captured images of 0.22 um diameter polystyrene spheres (dyed green) showing their frequency-dependent DEP behaviour under AC signals in the U-shaped electrode configuration. (a) pDEP: particles collect at the electrode surfaces at frequencies higher than 1.4 MHz (b) pDEP-nDEP transition: particles settle at the electrode surfaced and in the interelectrodes space at frequencies ranging from 1.2 to 1.4 MHz (c) nDEP: particles are trapped in the inter-electrodes space at frequencies lower than 1.2 MHz.

(a) (b) (c)

(d) (e) (f)

(g)

(h)

Fig. 1. LoC levels: (a) FPGA based PCB to control (b), (c) the CMOS dispatching signal level toward (d), (h) the microfluidic chip. Generated signals are provided by (e), (f) another CMOS chip powered by (g) a variable power supply.

[1] Miled, M.; Sawan, M. Dielectrophoresis-Based Integrated Lab-on-Chip for Nano and Micro-Particles Manipulation and Capacitive Detection. IEEE Trans. Biomed. Circuits and Systems, 2012, 6, 120 –132.

[2] Miled, M.A.; Massicotte, G.; Sawan, M. Low-voltage lab-on-chip for micro and nanoparticles manipulation and detection: experimental results. Analog Integrated Circuits and Signal Processing Journal, 2012, pp. 1 –11.

Layer 1

Layer 2

Layer 3

Layer 4

Layer 5

Layer 5b

Layer 6

Layer 5c

Layer 7

Fig. 3: LoC levels and interaction between its different com-ponents

TABLE I: Description of different layers of the proposed LoC

Feature Used equation Input parameter

Layer 1 Microfluidic Fluidic manipulationLayer 2 CMOS Signal dispatchingLayer 3 CMOS Signal generation and sensing systemLayer 4 PCB-FPGA CMOS chip control, configuration,

Data acquisition system, Power supplycontrol

Layer 5 PCB-Bluetooth Wireless communicationLayer 6 PCB-DACs Power supply configurationLayer 7 Micro-pump Liquid sampling system

and the LoC. Fig. 3 shows the different components of theproposed LoC. The objective is to build a fully automatedsystem in a miniaturized platform. The actual dimensions arelimited by the microfluidic chip whose dimensions are 15 mmx 15 mm. The proposed LoC includes 7 layers detailed in Fig.3 and Table. I.

Although the proposed device is encapsulated in one pack-age, it is composed of several independent modules, includingtwo custom CMOS chips, the microfluidic chip, the elec-trode array control modules, and the power management andcommunication units. The presented system is intended tobe an autonomously operated bio-implant. It contains a selfcell motion-controlling module monitored by a LabVIEWinterface. In addition, the introduced modular architecturedevice can be extended to other types of manipulation.

Fig. 4a shows the diagram of the first CMOS chip whichgenerates DEP signals through an embedded digital modulethen an analog signal processing module (ASPM) converts

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On-chip DAC output with offset

(Current)

Off-chip programmable positive power supply

(Vpos)

Off-chip programmable negative power supply

(Vneg)

Converted DAC output without offset (voltage)

Vsat1

Vsat2

Max. 60x amplificationMax. 1.25 MHz

Min. Rload 500 Ω Max. Cload 2 pF

Microfluidic architecture with:

1.8 ml of DWMax. 25 ul of

ACSF

1:1

Row

dec

oder

Line decoder

Anal

og si

gnal

s

Reprogrammable 8x8 bidirectional electrode array

0.18 um 2nd CMOS Chip Microfluidic

Buffered output

Buffered output from 1st

CMOS Chip

(a)

On-chip DAC output with offset

(Current)

Off-chip programmable positive power supply

(Vpos)

Off-chip programmable negative power supply

(Vneg)

Converted DAC output without offset (voltage)

Vsat1

Vsat2

Max. 60x amplificationMax. 1.25 MHz

Min. Rload 500 Ω Max. Cload 2 pF

Microfluidic architecture with:

1.8 ml of DWMax. 25 ul of

ACSF

1:1

Row

dec

oder

Line decoder

Anal

og si

gnal

s

Reprogrammable 8x8 bidirectional electrode array

0.18 um 2nd CMOS Chip Microfluidic

Buffered output

Buffered output from 1st

CMOS Chip

(b)

Fig. 4: Device circuit diagram including 0.18 µm CMOS chipsand microfluidic architecture

received data to DEP signals. Thus, the ASPM generates 4different DEP signals with frequency and phase shift mon-itoring block. To minimize offset mismatch between DEPsignals, power supplies (Vpos and Vneg) of current mirror inthe input stage of ASPM are balanced so that it has close to0 V dc output voltage, where dc output voltage is VposVsat1”.Vsat1 and Vsat2 are fixed by the circuit design and cannotbe modified. Consequently reducing signal offsets minimizessignal saturation after amplification stage. Amplitude of ap-plied signals is 2.4 Vpp to manipulate particles with sizevarying between 0.5 µm and 4.1 µm. Each signal can driveup to 16 electrodes and provides a maximum of 60 mA. Afirst low-frequency clock (< 4 MHz) is used to load set-updata in dedicated registers and it synchronizes the device andcomputer together. A second high-frequency clock (25 MHz)is used for DEP signal generations. Once data are sent tothe chip, the clock can be disabled reducing device powerconsumption.

Fig. 4b illustrates the circuit diagram of the second CMOSchip used to dispatch all signals through 8 × 8 bidirectionalelectrodes controlled individually using a labVIEW interface.All electrode states are saved on-chip; consequently chip-controlling clock is turned off and each electrode is controlledby 8 bits (3 bits for horizontal position, 3 bits for verticalposition and 2 bits for electrode state). Both described CMOSChips are wire bounded on a 15 mm × 15 mm PCBs. Apower-supply module is also integrated in the device and it isset in order to remove signal offsets by balancing the negativeand positive supply voltages with a sensitivity of 13 mV and topower up current to voltage converters and amplifiers in the

0 0.2 0.4 0.6 0.8

1 1.2 1.4 1.6 1.8

0 500 1000 1500 2000 2500

Am

plitu

de (V

)

Load resistance (Ω)

"Input"

"Output"

Fig. 5: Effect of resistive load on the output signal amplitudeof CMOS chip

0

10

20

30

40

50

60

70

80

90

100

0 5 10 15

Out

put S

igna

l Atte

nuat

ion(

%)

Frequency (MHz)

34,5 pF

70 pF

101,9 pF

216,1 pF

423,1 pF

599,3 pF

801,2 pF

893,6 pF

1001 pF

2004,1 pF

Fig. 6: Effect of capacitive load on the output signal amplitudeand frequency dispatched by CMOS chips.

manipulation chip. Another 3.3 V supply powers up all theother modules. Furthermore, a low-power FPGA (Igloo Nano)is assembled to another PCB layer in order to control, througha Serial-to-Parallel Interface (SPI), both CMOS chips as wellas the power-supply module, and to handle the Bluetoothcommunication interface between LabVIEW and the wholeLoC. For in-vitro tests, a high precision micro-syringe pump(PhD Ultra, Harvard Apparatus) is used to control liquidflow. Finally, two commercially available 5 mm diameter 3V batteries power-up the system. The 15 mm × 15 mmdimensions of the overall device are limited by the microfluidicstructure fabricated by Micralyne technology.

IV. EXPERIMENTAL RESULTS

Figs. 5 and 6 show that each electrode can drive a resis-tive and capacitive load of 1 kΩ and 423 pF respectively,with amplitude attenuation less than 10%. Observed signalattenuation is under 10% for signal frequencies below 2 MHzwhen the load capacitance is varying between 34 pF and423 pF. The output signal attenuation versus load resistance(Rload) is under 10% when Rload is below 1 kΩ. However, the

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(a) (b)

Fig. 7: Microelectronic chips of LoC : (a) System monitoringCMOS chip including DEP signal generation and sensing, (b)Microelectrode array control 0.18 µm CMOS chip

0

200

400

600

800

1000

1200

1400

1600

0 0.5 1 1.5 2 2.5

fc (k

Hz)

Particle Diameter (µm)

Octagonal electrode configuration

Square-shaped mixing electrodes

U-shaped electrodes

Fig. 8: Frequency-based particle separation using the proposedLoC prototype with DEP [12]

attenuation still remains less than 37% when Rload is between0.5 kΩ and 1 kΩ.

Fig. 8 shows obtained experimental results using artificialmicrospheres and deionized water (DW). The sensing systemis tested with different liquid concentrations and results arepublished in [11], [12]. Experiments with three differentsizes of polystyrene carboxylate-modified microspheres witha high negative charge are performed. Spherical particles withdiameters of 2.04 µm, 0.97 µm and 0.21 µm are obtainedfrom Bangs laboratories Inc, USA. The motion of particlesis observed using a microscope (PM5, Karl Suss). The beadsolutions are injected at a constant rate of 1 µl/min in themicrochannel.

As ACSF has a high conductivity (Rload << 0.5 kΩ), abuffer solution of DW was injected to increase Rload. Efficientparticle separation is achieved with 1.8 ml of DW with 25 µmof ACSF. Achieved experiments show encouraging particle

separation within ACSF for the fully integrated, assembledand packaged LoC using 2.4 V DEP.

V. CONCLUSION

In this paper a first generation of a complete and fullyautonomous LoC device was presented for low-resistive andhigh-capacitive load in the range of 500 Ω and 423 pFrespectively. The presented device is dedicated for particleseparation based on frequency segregation. It covers a wide-frequency range until 1.2 MHz for 3.3 V DEP-based particlemanipulation. Successful, DEP separation was achieved usingparticle with diameter ranging from 0.5 µm to 4.1 µm.

ACKNOWLEDGEMENT

The authors acknowledge the financial support from NSERCand Canada Research Chair in Smart Medical Devices, and aregrateful for the design and simulation tools supplied by CMCMicrosystems. The authors thank also My Sandra Ly for herhelp in the experimental measurements and Laurent Moudenfor device packaging in LASEM.

REFERENCES

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[5] N. Manaresi, A. Romani, G. Medoro, L. Altomare, A. Leonardi,M. Tartagni, and R. Guerrieri, “A cmos chip for individual cell ma-nipulation and detection,” IEEE J. Solid-State Circuits, vol. 38, no. 12,pp. 2297–2305, Dec. 2003.

[6] H. Dadgour and K. Banerjee, “Hybrid nems-cmos integrated circuits:A novel strategy for energy-efficient designs,” Computers Digital Tech-niques, IET, vol. 3, no. 6, pp. 593 –608, Nov. 2009.

[7] T.-Y. Ho, K. Chakrabarty, and P. Pop, “Digital microfluidic biochips:Recent research and emerging challenges,” in Proc. of the 9th Int. Conf.Hardware/Software Codesign and System Synthesis (CODES+ISSS),,Oct. 2011, pp. 335 –343.

[8] S. Gevorgian, H. Berg, H. Jacobsson, and T. Lewin, “Application notes- basic parameters of coplanar-strip waveguides on multilayer dielec-tric/semiconductor substrates, part 1: high permittivity superstrates,”IEEE Microw. Mag. (USA), vol. 4, no. 2, pp. 60 – 70, Jun. 2003.

[9] ——, “Basic parameters of coplanar-strip waveguides on multilayer di-electric/semiconductor substrates. part 2: Low permittivity superstrates,”IEEE Microw. Mag., vol. 4, no. 3, pp. 59 – 78, Sep. 2003.

[10] O. Vendik, S. Zubko, and M. Nikol’skii, “Modeling and calculation ofthe capacitance of a planar capacitor containing a ferroelectric thin film,”Tech. Phys. (USA), vol. 44, no. 4, pp. 349 – 55, Apr. 1999.

[11] M. Miled and M. Sawan, “Dielectrophoresis-based integrated lab-on-chip for nano and micro-particles manipulation and capacitive detection,”IEEE Trans. Biomed. Circuits. Syst., vol. 6, no. 2, pp. 120 –132, Apr.2012.

[12] M. A. Miled, G. Massicotte, and M. Sawan, “Low-voltage lab-on-chipfor micro and nanoparticles manipulation and detection: experimentalresults,” Analog Integrated Circuits and Signal Processing, vol. 73, no. 3,pp. 1– 11, Dec. 2012.