IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10 ... · IEEE JOURNAL OF SOLID-STATE CIRCUITS,...

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016 2287 A 2.89 μW Dry-Electrode Enabled Clockless Wireless ECG SoC for Wearable Applications Xiaoyang Zhang, Zhe Zhang, Yongfu Li, Changrong Liu, Yong Xin Guo, and Yong Lian Abstract— This paper presents a fully integrated wireless electrocardiogram (ECG) SoC implemented in asynchronous architecture, which does not require system clock as well as off-chip antenna. Several low power techniques are proposed to minimize power consumption. At the system level, a newly introduced event-driven system architecture facilitates the asyn- chronous implementation, thus removes the system clock leading to a true ECG-on-chip solution. A DC-coupled analog front-end is introduced together with a baseline stabilizer to boost the input impedance to 3.6 G and mitigate the electrode offset, which is less sensitive to motion artefact and contact impedance imbal- ance, making it well suited for dry-electrode based applications. Level-crossing analog-to-digital converter (LC-ADC) is employed to take the advantage of burst nature of ECG signal leading to at least 5 times reduction in sampling points compared to Nyquist sampling. A digitally implemented impulse-radio ultra-wideband transmitter is seamlessly integrated with LC-ADC and an on-chip antenna for wireless communications. Implemented in 0.13 μm CMOS technology, the ECG-on-chip consumes 2.89 μW under 1.2 V supply while transmitting the raw ECG data, which attains one order of magnitude lower than the current state-of-the-art designs. The fully integrated ECG SoC requires no external clocks and off-chip antenna, making it a good candidate for low cost and disposable wireless ECG patches, such as epidermal electronics. Index Terms— Electrocardiogram (ECG), dry-electrode, high input impedance IA, DC-coupled IA, event-driven, level-crossing ADC, asynchronous, clockless, impulse-radio, wearable biomed- ical sensor, epidermal electronics. I. I NTRODUCTION C ARDIOVASCULAR disease (CVD) is a global public health problem, affecting millions of patients and associated with significant mortality, morbidity, and healthcare expenditure. Statistics from the World Health Manuscript received February 8, 2016; revised April 20, 2016; accepted June 6, 2016. Date of publication July 29, 2016; date of current version September 30, 2016. This work was supported in part by the National Research Foundation, Prime Minister’s Office, Singapore under the grant NRF-CRP8-2011-01 and the Natural Sciences and Engineering Research Council of Canada Discovery Grants. This paper was approved by Guest Editor Noriyuki Miura. X. Zhang, Z. Zhang, Y. Li, and Y. X. Guo are with the National University of Singapore, Singapore, 117576 (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). C. Liu is with the School of Electronic and Information Engineering, Soochow University, Jiangsu, 215006, China (e-mail: [email protected]). Y. Lian is with the Department of Electrical Engineering and Computer Science, Lassonde School of Engineering, York University, Toronto, M3J 1P3, Canada (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JSSC.2016.2582863 Organization (WHO) show that 17.5 million people died from CVDs in the year of 2012 [1]. The direct cost of CVDs exceeds $380 billion in USA alone in 2015 [2]. According to WHO, CVD patients are on the rise, highlighting the urgent need for an effective care system to manage and support CVD patients. One of the effective tools for monitoring heart condition is the ECG (electrocardiogram). With the advancement of wearable technologies and Big Data analytics, it is possible to create an effective CVD management system that benefits the CVD patients and those at high cardiovascular risks. There are notable research efforts in the development of ECG chips for wearable sensors in the past 10 years. For ECG analog front-end (AFE), several low-power designs [3], [4] have shown decent performance with low power consump- tion, which are promising for wearable ECG sensors using wet electrodes. As the input impedance is relatively low for AC-coupled [3] or chopper stabilization amplifier [4], those designs are not suitable for dry-electrode. This is because the contact impedance and interference of dry-electrode are much larger than that of Ag/AgCl based wet-electrode according to the study [5]. It is possible to boost the input impedance in the chopper amplifier to mitigate the large contact impedance of dry-electrode at the cost of high power consumption [6]. The straightforward way of obtaining high input impedance is to use DC-coupled amplifier while managing the large electrode- offset caused by skin-electrode interface through compensation schemes, such as the off-chip feedback loop implemented in [7]. So far there is no perfect low power solution for ECG analog front-end design that is capable of dealing with issues caused by skin-electrode interface, i.e., electrode polarization. In this paper, we propose a DC-coupled analog front-end to maximize input impedance and introduce a baseline stabiliza- tion mechanism to deal with electrode-offset. Meanwhile, motion artefact (or contact potential) remains one of the most challenging issues in the design of wearable sensor. It is caused by the fluctuation in the skin potential due to stretching, deformation, and pressing on the skin. The amplitude of motion artefact could be as high as 10 times of ECG signal, which seriously affects the system dynamic range. Furthermore, the contact impedance between skin and electrode plays a crucial role in signal quality. It could selectively attenuate ECG signal in different frequencies due to its frequency dependency. Such behavior has adverse effects on low frequency components, such as P-wave, T-wave, and S-T segment. P, T, S-T are important features in ECG, 0018-9200 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

Transcript of IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10 ... · IEEE JOURNAL OF SOLID-STATE CIRCUITS,...

Page 1: IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10 ... · IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016 2287 A2.89μW Dry-Electrode Enabled Clockless Wireless

IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016 2287

A 2.89 μW Dry-Electrode EnabledClockless Wireless ECG SoC

for Wearable ApplicationsXiaoyang Zhang, Zhe Zhang, Yongfu Li, Changrong Liu, Yong Xin Guo, and Yong Lian

Abstract— This paper presents a fully integrated wirelesselectrocardiogram (ECG) SoC implemented in asynchronousarchitecture, which does not require system clock as well asoff-chip antenna. Several low power techniques are proposedto minimize power consumption. At the system level, a newlyintroduced event-driven system architecture facilitates the asyn-chronous implementation, thus removes the system clock leadingto a true ECG-on-chip solution. A DC-coupled analog front-endis introduced together with a baseline stabilizer to boost the inputimpedance to 3.6 G� and mitigate the electrode offset, which isless sensitive to motion artefact and contact impedance imbal-ance, making it well suited for dry-electrode based applications.Level-crossing analog-to-digital converter (LC-ADC) is employedto take the advantage of burst nature of ECG signal leading to atleast 5 times reduction in sampling points compared to Nyquistsampling. A digitally implemented impulse-radio ultra-widebandtransmitter is seamlessly integrated with LC-ADC and an on-chipantenna for wireless communications. Implemented in 0.13 μmCMOS technology, the ECG-on-chip consumes 2.89 μW under1.2 V supply while transmitting the raw ECG data, which attainsone order of magnitude lower than the current state-of-the-artdesigns. The fully integrated ECG SoC requires no externalclocks and off-chip antenna, making it a good candidate for lowcost and disposable wireless ECG patches, such as epidermalelectronics.

Index Terms— Electrocardiogram (ECG), dry-electrode, highinput impedance IA, DC-coupled IA, event-driven, level-crossingADC, asynchronous, clockless, impulse-radio, wearable biomed-ical sensor, epidermal electronics.

I. INTRODUCTION

CARDIOVASCULAR disease (CVD) is a globalpublic health problem, affecting millions of patients

and associated with significant mortality, morbidity, andhealthcare expenditure. Statistics from the World Health

Manuscript received February 8, 2016; revised April 20, 2016; acceptedJune 6, 2016. Date of publication July 29, 2016; date of current versionSeptember 30, 2016. This work was supported in part by the NationalResearch Foundation, Prime Minister’s Office, Singapore under the grantNRF-CRP8-2011-01 and the Natural Sciences and Engineering ResearchCouncil of Canada Discovery Grants. This paper was approved by GuestEditor Noriyuki Miura.

X. Zhang, Z. Zhang, Y. Li, and Y. X. Guo are with the National University ofSingapore, Singapore, 117576 (e-mail: [email protected]; [email protected];[email protected]; [email protected]).

C. Liu is with the School of Electronic and Information Engineering,Soochow University, Jiangsu, 215006, China (e-mail: [email protected]).

Y. Lian is with the Department of Electrical Engineering and ComputerScience, Lassonde School of Engineering, York University, Toronto, M3J 1P3,Canada (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/JSSC.2016.2582863

Organization (WHO) show that 17.5 million people died fromCVDs in the year of 2012 [1]. The direct cost of CVDs exceeds$380 billion in USA alone in 2015 [2]. According to WHO,CVD patients are on the rise, highlighting the urgent need foran effective care system to manage and support CVD patients.One of the effective tools for monitoring heart conditionis the ECG (electrocardiogram). With the advancement ofwearable technologies and Big Data analytics, it is possibleto create an effective CVD management system that benefitsthe CVD patients and those at high cardiovascular risks.

There are notable research efforts in the development ofECG chips for wearable sensors in the past 10 years. For ECGanalog front-end (AFE), several low-power designs [3], [4]have shown decent performance with low power consump-tion, which are promising for wearable ECG sensors usingwet electrodes. As the input impedance is relatively low forAC-coupled [3] or chopper stabilization amplifier [4], thosedesigns are not suitable for dry-electrode. This is because thecontact impedance and interference of dry-electrode are muchlarger than that of Ag/AgCl based wet-electrode according tothe study [5]. It is possible to boost the input impedance in thechopper amplifier to mitigate the large contact impedance ofdry-electrode at the cost of high power consumption [6]. Thestraightforward way of obtaining high input impedance is touse DC-coupled amplifier while managing the large electrode-offset caused by skin-electrode interface through compensationschemes, such as the off-chip feedback loop implementedin [7]. So far there is no perfect low power solution for ECGanalog front-end design that is capable of dealing with issuescaused by skin-electrode interface, i.e., electrode polarization.In this paper, we propose a DC-coupled analog front-end tomaximize input impedance and introduce a baseline stabiliza-tion mechanism to deal with electrode-offset.

Meanwhile, motion artefact (or contact potential) remainsone of the most challenging issues in the design of wearablesensor. It is caused by the fluctuation in the skin potentialdue to stretching, deformation, and pressing on the skin. Theamplitude of motion artefact could be as high as 10 timesof ECG signal, which seriously affects the system dynamicrange. Furthermore, the contact impedance between skin andelectrode plays a crucial role in signal quality. It couldselectively attenuate ECG signal in different frequencies dueto its frequency dependency. Such behavior has adverse effectson low frequency components, such as P-wave, T-wave,and S-T segment. P, T, S-T are important features in ECG,

0018-9200 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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Fig. 1. Block diagram of a typical wireless biomedical sensor.

distorting them may lead to wrong diagnosis. In fact, changesin S-T segment may signal a heart attack (myocardial infarc-tion). Thus, being directly connected to the body, the per-formance of AFE is crucial to the signal quality. First, thenoise of the whole sensor is often limited by the instru-mentation amplifier (IA) at the first stage. AFE with highernoise floor could distort the small signals in ECG, such asP-wave. Thus, a reasonable noise floor is required for theAFE. Second, the AFE should be able to reject the electrodeoffset effectively to avoid amplifier saturation. IEC 60601 Part2-47 sets the minimum requirement of handling +/-300 mVelectrode offset. AC-coupled amplifiers [3] and the chopperstabilized amplifiers [4] are the most common solutions foroffset suppression. Third, high input impedance is necessaryfor mitigating the effects from motion artefact and contactimpedance [8]. Unfortunately, few designs could achieve theimpedance requirement without power overhead or compro-mise in noise and input dynamic range. The DC-coupledAFE in [7] has very high input impedance, but it requiresoff-chip digital-to-analog converter (DAC) feedback for offsetcancellation. Input impedance boost technique gives T� inputimpedance, but the gain is unity and the power consumption ishigh [9]. A power-efficient active electrode using one PMOStransistor is analyzed in [10], but it has limited input rangeand deteriorated common-mode reject ratio due to mismatch.

For ECG SoC, continuous effort is made to lower thepower consumption in order to meet the energy constraint ofwearable wireless sensors [11]–[14]. Over the years, the poweris reduced from several milliwatts [11] to few microwatts [14].Most of these designs follow the traditional signal processingflow for a wearable wireless sensor, as shown in Fig. 1, whichconsists of an analog front-end (AFE), an analog-to-digitalconverter (ADC), a microcontroller (MCU) and/or digitalsignal processing unit, a memory block, a wireless transceiver,and a power management unit. In such architecture, the powerreduction comes from four areas: 1) lowering supply voltage;2) minimizing data rate through feature extraction or datacompression; 3) duty-cycling transmitter with the help of on-chip memory; and 4) employing impulse radio UWB (ultra-wideband) transmitter for better power efficiency. A good

example of applying above low power strategies is the wirelessSoC for ExG applications [12]. The chip consumes 19 μW onaverage for transmitting heart rate information, which is theresult of feature extraction and heavy duty cycling of transmit-ter. Without feature extraction, the chip consumes 397 μW fortransmitting raw ECG data. The design in [13] utilizes multiplevoltage domains for power saving, especially for leakagepower. The leakage power is reduced by more than 3 timeswhen the supply voltage is lowered to 0.25 V for memoryblocks. By allocating different voltages to different functionblocks, the 3-lead wireless ECG SoC in [13] consumes only74.8 μW for transmitting raw ECG data and 17.4 μW fortransmitting heart rate. A more recent design demonstrates thebenefits of using asymmetric radio and impulse radio UWBtransmitter for sensor applications [14]. Biomedical sensorsnormally communicate in an asymmetric pattern betweensensor and gateway. Exploring this asymmetric communicationpattern and combining with a UWB transmitter, the chipconsumes only 6.45 μW for sending motion (accelerometer)information. This design attains the lowest power based onsynchronous architecture. The question is whether there isroom for further improvement in power.

In this paper, we present an alternative system architecture.First reported in [15], the proposed system utilizes the sparsecharacteristic in the ECG signals to minimize the data rateresulting significant savings in power. The architecture is basedon event-driven signal processing flow, which removes theneed for system clock making it a full asynchronous system.The proposed sensor contains a DC-coupled analog front-end, a level-crossing analog-to-information converter [16], animpulse-radio ultra-wideband (IR-UWB) transmitter (TX) andon-chip antenna. The DC-coupled AFE significantly improvesthe input impedance and signal quality, without the needof active impedance boosting feedback loops as in [17].Additionally, the proposed AFE is suitable for both wetand dry electrodes. The event-driven analog-to-informationconverter generates a delta-modulated output, which is fed toa 3–5 GHz IR-UWB TX with an on-chip antenna for wirelesstransmission. Implemented in 0.13 μm CMOS technology, thetotal power consumption for raw ECG signal transmission is2.89 μW, which is an order of magnitude lower than the state-of-the-art designs [12], [13]. Without any external components,e.g., clock, filters and off-chip antenna, the chip is a perfectcandidate for low-cost disposable wireless ECG patches.

The paper is organized as follows. Section II presents thesystem architecture of the SoC, and briefly introduces theevent-driven concept. The circuit implementation details foreach block are revealed in Section III. Chip measurementresults are discussed in Section IV. The concluding remarksare given in Section V.

II. SYSTEM ARCHITECTURE

The commonly used system architecture follows a tra-ditional signal flow, resulting in five essential blocks, ananalog front-end, an analog-to-digital converter at the middle,followed by a synchronous digital block for signal process-ing/control, a radio frequency block for wireless communica-tion, and a power management unit, as shown in Fig. 1. Such

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ZHANG et al.: A 2.89 μW DRY-ELECTRODE ENABLED CLOCKLESS WIRELESS ECG SoC FOR WEARABLE APPLICATIONS 2289

architecture is not optimized for power consumption. The mainissue is the fixed clock frequency used for data acquisition,signal processing tasks, and handshaking, i.e., Nyquist fre-quency which is at least twice the bandwidth of the inputsignal. Fixing sampling at the Nyquist frequency guaranteesthe recovery of highest frequency components in the signalbandwidth; but it wastes energy and transmission resourceswhen low-frequency signals are dominant in the input. Bio-medical signals, such as ECG, EEG, EMG, and PPG, hasthe low frequency components dominated within the signalbandwidth. Hence, a sampling scheme that favors low fre-quency components is mostly welcome in energy constraintbiomedical sensors.

Continuous-in-time and discrete-in-amplitude (CTDA) sig-nal processing or CT-DSP (continuous-time digital signalprocessing) is a new concept in signal processing, whichwas reported in 2003 [18]. The CTDA signal brings featuresthat are not available in traditional analog and digital sig-nals [19], [20]. The uniqueness of CTDA signal allows it tocombine the advantages of both the analog and the digital sig-nals. The discrete-in-amplitude of CTDA signal differentiatesitself from analog signal, which leads to quantized amplitudeallowing signal processing that involves only 0s and 1s.The continuous-in-time feature eliminates the aliasing errorthat occurs in traditional analog-to-digital converter (ADC).Furthermore, the sampling of CTDA signal based on level-crossing ADC (LC-ADC) creates a data-stream whose sam-pling rate varies depending on the activities, i.e., low samplingrate for slowly varying and inactive portions of the input signaland high for rapid changes in the input. This adaptive samplingrate makes it well suited for burst-type waveforms with longperiods of silence such as ECG. Thus, CTDA based systemarchitecture has the potential for ultra low power solutions forbiomedical sensors. A good example is a CTDA-based ECGsignal processor that consumes only 220 nW for both analog-to-information conversion and QRS (heart rate) detection at300 mV supply as reported in [16].

The wireless transceiver is an essential part of a wirelesssensor. However, its power consumption dominates the powerbudget of a sensor. Recent wireless ECG SoCs use heavy duty-cycling to minimize the power of transmitter at the cost ofadditional memory. Under the CTDA signal flow, duty-cyclingis a built-in feature as its data rate depends on the activity ofsignal. Combining LC-ADC and impulse radio UWB, it ispossible to build an asynchronous system without the need ofan external clock [15], which reduces power further.

There are several ways to implement a CTDA system. Theevent-driven approach based on the LC-ADC is the most pop-ular one. LC-ADC generates samples based on the activitiesin the input. In other words, it takes the statistical propertiesof an input into consideration. A sample is generated onlyif a significant change occurs in the input. This is done bydetecting the input crossing a predefined set of evenly-spacedlevels in amplitude. This way, slow varying signals naturallyresult in sparse samples, which lead to lower dynamic powerdissipation. During silent periods of the input, the system waitsfor a change in the signal while dissipating no dynamic power.In addition to power saving, LC-ADC generates much less data

Fig. 2. System architecture of the event-driven wireless ECG sensor.

points compared to Nyquist sampling. Studies show that theaverage sampling rate for ECG signals taken from MIT-BIHdatabase is 67 Hz compared to 360 Hz Nyquist sampling ratedused in MIT-BIH database. With adaptive LC-ADC samplingscheme, the data rate can be further reduced [21].

In this paper, we proposed an asynchronous event-drivensystem architecture for the ECG sensor, as shown in Fig. 2.The system consists of a DC-coupled AFE, an LC-ADC, a1B2B pulse encoder, and an IR-UWB transmitter. The ECGsignals are captured by electrodes and amplified by the low-noise AFE. The output of AFE is then digitized by a level-crossing ADC with 32 quantization levels to generate twodelta-modulated pulse trains, REQ and DIR. REQ indicatesan event occurrence in the input and DIR represents thesignal direction, i.e., the rise or fall of input voltage. As theUWB transmitter only accepts single pulse train, a 1-bit to2-bit (1B2B) encoder is used to combine REQ and DIR intoone pulse train for sending through the IR-UWB transmitter.An on-chip antenna is included on the chip to minimize theoff-chip components.

III. CIRCUIT IMPLEMENTATION

A. DC-Input Front-End

The proposed DC-coupled AFE architecture is similar tothe classical 3-opamp based instrumentation amplifier (IA) asshown in Fig. 3(a). It keeps the nice feature of high inputimpedance in 3-Opamp IA while addressing the drawbacksin the classical 3-opamp IA in terms of noise performance,limited gain, and high power consumption. The inputs VIN+and VIN− from electrodes are directly connected to the gateof the transistors in the two IAs. Fig. 3(b) shows the internalcircuit for the amplifier used in IA stage. Without choppers orlarge input capacitors connected to the input, the parasitic Cpbecomes the main factor affecting the input impedance, lead-ing to G� impedance in ECG frequencies [7].

One of the challenges in DC-coupled AFE is to handlethe electrode offset, which manifests in the form of inputDC offset. To interface with various types of electrodes andskin conditions, the AFE should be able to deal with largeDC offset of at least +/- 300 mV. Otherwise, the amplifier

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Fig. 3. (a) DC-coupled ECG front-end with baseline stabilizer; (b) theamplifier in IA stage; (c) the amplifier in PGA stage.

could be saturated and can block the ECG signal completely.It is possible to employ a dedicated feedback loop to cancelthe input offset according to the amplifier output [7], butthe feedback circuits would increase the system power andchip area, and affect the noise performance. Moreover, anyadditional feedback path connected to the input port is likelyto deteriorate the input impedance. To address these issues,we introduce three techniques to minimize the effects of inputoffsets, without significantly affecting the input impedance.

The first technique is to set and stabilize the input DC levelthrough a resistor, which is connected from the input port tothe circuit input common-mode shielding voltage Vsh, markedas R0 in Fig. 3(a). To avoid loading the input directly, the resis-tance of R0 must be in the range of G�. As it is impracticalto integrate large resistors directly on chip, the symmetricalpseudo-resistor shown in the upper part of Fig. 3(a) is used.The pseudo-resistor includes two diode-connected PMOS tran-sistors, both biased in subthreshold region. A larger R0 valueincreases the input resistance directly. However, setting theresistance too high would compromise the input DC settlingtime, which is determined by the RC time constant fromR0 and parasitic input capacitance Cp. The parasitic capac-itance Cp is mainly from the large input-pair transistors of theamplifier, as well as the pseudo-resistor R0 itself. Compared toother biasing approaches such as resistive divider in [7], onlyone diode-connected transistor shows up in the input path andcontributes to the input parasitic Cp. We choose the shieldingvoltage to be close to the system common-mode VCM. It is also

possible to tune the input shielding voltage Vsh to maximizethe offset suppression according to the ECG signal level.

The second technique is to increase the gain in the ECGfrequency band, while lowering the gain at DC. Referring toshaded IA stage in Fig. 3(a), ignoring R0, the transfer functionfrom ECG input VIN−/IN+ to the IA output V0−/0+ is given by

V0

VI N= jω · 50R1C1 + 1

jω · R1C1 + 1(1)

where 50 is the capacitor ratio in the IA stage which deter-mines the amplifier gain within the ECG frequency. At DC,i.e., setting ω = 0, the amplifier gain equals to one. For higherfrequencies when ωR1C1 � 1, the gain is close to 50. A highgain of 50 is necessary for the first stage in order to reducethe input-referred noise while maintaining low power and lowdistortion. With DC gain of 1 and AC gain of 50, the DC offsetis attenuated with the reference to ECG signal. Note that theωR1C1 shall be much larger than one even at 0.5 Hz, so thatthe information in low frequency band, such as S-T segment,is not attenuated causing false diagnosis [22]. Increasing C1would affect the chip area negatively. Therefore thick-oxidetransistors for pseudo-resistor implementation of R1 is used,which provides over 100 times higher resistance compared tousing normal threshold transistors [13].

The third technique is to remove the remaining input offsetin the PGA stage. The gain difference of 50 (or 34 dBattenuation) from IA stage alone is not sufficient to rejectthe input offsets while amplifying the ECG to full scale.Therefore, the PGA stage gain is made tuneable. It usescapacitive-coupling architecture with 4 possible gain settingsselected through external control bits. The gain is tuned from1.5 to 12 by changing the C2 capacitor ratio, varying from thehighest 12:1 to the lowest 12:8. Note the pseudo-resistor R2 inthis stage also adopts thick-oxide PMOS to reduce the high-pass cutoff frequency. The PGA input is AC-coupled to blockthe residual DC offset completely.

Similar to AC-coupled IAs, the common-mode rejectioncapability of the proposed design relies on the capacitor ratiomatching between the positive and negative input branch.Putting two IAs close to each other in the layout wouldbenefit the CMRR and improve the readout signal quality. Themismatch between pseudo-resistors affects the low-frequencyCMRR below the high-pass corner, which is less severe forthe ECG application.

B. Baseline Stabilizer

During normal cases when the electrodes are placed firmlyon the subject, the input offset is fully removed at the PGAoutput. For unexpected use cases such as lead off or elec-trode reattachment, the ECG baseline may temporarily driftaway from the common mode to a larger extent, resulting inclipped ECG waveforms. Under such a circumstance, resettingthe PGA is necessary, i.e., shorting the pseudo-resistors R2and quickly settles the PGA output to common-mode VCM.Without the reset, the recovery time from sudden change ofbaseline could be very long due to the low high-pass cutofffrequency of less than 0.5 Hz. The reset is performed by thebaseline stabilizer, as shown in Fig. 4. It monitors the input

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ZHANG et al.: A 2.89 μW DRY-ELECTRODE ENABLED CLOCKLESS WIRELESS ECG SoC FOR WEARABLE APPLICATIONS 2291

Fig. 4. Baseline stabilizer to minimize the ECG clipping due to outputsaturation.

Fig. 5. The 5-bit level-crossing ADC design.

Fig. 6. The asynchronous comparator in the ADC.

voltages of PGA and performs the reset once input saturationis detected. Two comparators with large built-in hysteresiscontinuously track the PGA’s input voltage (V1+ and V1−).The comparators are unbalanced, in which the two transistorsin the input pair are of different sizes. Therefore, only whenthe input is much higher than VCM, the comparator outputwill turn high. This avoids generating an extra reference fortriggering, which does not need to be accurate.

Under normal conditions, the input voltages V1+ and V1−are close to the common-mode VCM because of the close-loop feedback. Whenever the PGA output is saturated, theinput voltages V1+ and V1− drift apart from the common-mode VCM, and toggles the comparators. The following XOR

Fig. 7. 1B2B pulse encoder for Delta modulation.

Fig. 8. The schematic of the IR-UWB transmitter.

then generates on-chip reset signal for PGA by shorting thePGA input and output, which brings the baseline to thecommon-mode voltage. To avoid repetitive resetting, two largecapacitors Coff1 and Coff2 are connected at the comparatoroutputs, which avoid unnecessary resets in case of momentaryclipped QRS complex while the baseline is still within thenormal range. As illustrated in Fig. 4, the accelerated baselinerecovery minimizes ECG data loss due to saturation, makingthe sensor suitable for autonomous monitoring without manu-ally resetting it from time to time. Without it, the ECG baselinewould take much longer time to recover because of the largetime constant from high-pass corner.

C. Level-Crossing ADC

Reducing sampling frequency is an effective way of powersaving in wireless sensors as it generates less data pointsfor transmission. The proposed event-driven system digitizesthe ECG signal using the level-crossing sampling (LCS)scheme [16], which is highly effective in minimizing ECGsampling points. This is because a significant part of the ECGtrace is of very small variations, and LC-ADC generates fewsamples in these parts. Thus, a 5-bit LC-ADC is adopted inthis design, which has an equivalent resolution of an 8-bitNyquist ADC [19], [21].

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Fig. 9. Microphotograph of the fabricated chip.

TABLE I

PERFORMANCE COMPARISON OF ECG WIRELESS SoC

The LC-ADC samples the ECG signal adaptively based oninput activities, with the diagram given in Fig. 5. The AFEoutput VA is continuously monitored by the two asynchronouscomparators CH and CL. Whenever VA voltage increasesor decreases by one quantization level, a sample is gener-ated representing the change. The ADC produces two delta-modulated outputs, DIR and REQ. DIR indicates the inputvoltage change direction, and REQ represents one LC event.Due to the burst-type feature of ECG signals, the number ofLC samples is around 20% of Nyquist-based systems, whicheffectively reduces the output data rate as well as the dynamicpower. Fig. 6 shows the comparator used in the event-drivenADC. Since the ADC samples based on level-crossing eventsinstead of periodical clock, asynchronous comparators are

Fig. 10. Input-referred noise of the analog front-end.

Fig. 11. Output spectrum of the front-end and ADC.

necessary for input level monitoring. The first stage of theADC, as shaded, is a self-biased differential amplifier [23].It accepts rail-to-rail input and improves the signal dynamicrange. This differential input stage is also insensitive to thesupply and input common-mode voltage variations [16]. Thesecond stage uses an inverter to generate full-scale output andfurther improve the open-loop gain.

D. 1B2B Pulse Encoder

The output of the LC-ADC is delta-modulated into 2 bits,DIR and REQ [24]. An illustration of the ADC outputs isgiven in Fig. 7. DIR indicates the signal change direction,and each pulse at REQ output represents one level-crossingevent [16]. The 2-bit outputs completely convey the inputsignal variation up to the designed resolution. In order totransmit the ECG signals, further modulation is required toavoid synchronization issue between DIR and REQ. A pulseencoder, 1B2B, combines 2 outputs into one pulse stream.

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Fig. 12. Chip measurement setup.

Fig. 13. ECG signal reconstructed from wireless transmission.

As shown in Fig. 7, when DIR is low, the 1B2B encoderoutputs the REQ pulse. When DIR is asserted, each signalpulse at REQ is replaced by 2 pulses, i.e., the REQ pulsefollowed by a new pulse at the distance of 400 ns to indicate ahigh of DIR and a transition of REQ. To avoid mis-interpretionof 2 consecutive pulses generated as 2 separate events in ECGsignal, the interval �tenc between the 2 pulses must be muchless than the minimal possible REQ pulse intervals. In thisdesign, the ADC quantization level N is 32. Suppose themaximum frequency fmax from the ECG front-end is 250 Hz,the worst-case pulse interval �tRE Q for REQ is given by

�tRE Q = 1

2π fmax · N= 20μs (2)

By controlling the �tenc at about 400 ns, much less than�tRE Q , the chance of misinterpretation at the receiver sideis minimized.

Without the system clock to align the signals, the delta-modulated outputs DIR and REQ need to be encoded intoa single bit before sending out through IR-UWB transmitter.

Fig. 14. UWB TX output in (a) time domain and (b) frequency domain

The encoding is performed by the 1B2B encoder, whichcombines 2 pulse trains from the LC-ADC to a single pulsetrain. Fig. 7 illustrates the pulse encoding process as well asthe encoder circuit. When DIR is low, the encoder generates1 narrow pulse representing a FALL event. When DIR turns tohigh, the encoder outputs 2 narrow pulses with 400 ns interval,indicating a RISE event. The 400 ns delay generated by thebuffer is selected to be much less than the interval of any twoECG events. It ensures the receiver is able to differentiatesingle 2B pulse from 2 consecutive samples representing2 ECG level-crossing samples.

E. UWB Transmitter

Carrier based narrow-band communication systems are notsuitable for CTDA signals because they require clock forhandshaking. To take advantage of the event-driven nature

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Fig. 15. UWB TX power consumption vs. data rate.

and the integrated antenna, we choose the 3–5 GHz IR-UWBtransmitter as shown in Fig. 8. The link budget is estimatedbased on the communication requirements. Since IR-UWBsignal is pulse-based covering a bandwidth of several GHz,the link budget could be calculated in terms of transmitted andreceived pulse energy. However, the power spectrum densityof IR-UWB varies across a large bandwidth. It is difficult tocalculate the pulse energy by integrating the power spectrumdensity over the ultra-wide bandwidth. We could only estimatethe transmitted pulse energy from the time-domain simulationwaveform of the transmitter output, EpTX = 0.6 pJ. In thesimulation, the transmission distance is set as 1 cm. Thepath loss is calculated as PL = 5 dB based on the channelmodel in [25]. To achieve a total error rate of 10 −3 inthe on-off keying (OOK) UWB demodulation, the requiredEb/N0 is 18 dB [26]. The noise figure of the non-coherentreceiver is estimated as 20 dB due to the nonlinear receiverarchitecture [27]. The minimum required receiver input pulseenergy can be calculated as EpRX = 20 aJ based on the noisefigure and required Eb/N0. Assuming the receiving antennahas a gain of GaRX=6dB, transmitting on-chip antenna has again GaTX =-40 dB and the implementation loss is IL = 6 db,the link margin is calculated as:

M = 10log10(E pT X/E pR X ) − P L − I L

+ GaT X + Ga R X = 6 d B (3)

The schematic of IR-UWB transmitter is shown in Fig. 8.It consists of a 2 mm × 2.5 mm on-chip coplanar waveguide-fed monopole antenna and a digitally implemented pulsegenerator utilizing digital edge-combining technique. It gen-erate a mono-pulse whenever there is a rising edge signalfrom 1B2B encoder. Mono-pulse minimizes the hardwarecost and it is manageable to meet the Federal Communica-tions Commission (FCC) spectrum mask with low data rate.A cascade amplifier with optimized on-chip inductor is usedto drive the on-chip antenna. The pulse width is controlleddigitally (D0–D3) by varying the load capacitance of the

Fig. 16. On-chip antenna characteristics (a) Simulated and measured inputmatching (b) Radiation pattern when �= 0 and �= 90 at 4 GHz.

Fig. 17. Dry electrodes used and chest lead position.

inverter. The transmitter is activated only if encoded datapulses are received from the ADC. In other word, if the inputdoes not change, the power of the TX is determined by theleakage current. The heavy duty-cycling of the transmittersignificantly reduces the power consumption. This topology

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Fig. 18. ECG captured during subject walking and stretching chest muscles.

simplifies existing architectures while achieving low-leakageand high output voltage swing.

In conclusion, the CTDA signal generated by the LC-ADCmakes the impulse-radio (IR) UWB an ideal candidate forwireless transmission. The IR-UWB is able to seamlessly con-nect to the asynchronous event-driven front-end without dedi-cated effort on modulation and synchronization. The IR-UWBtransmitter consumes only the leakage power when no pulse issent. This characteristics enables ultra-low transmitter powerconsumption at below 1.5 μW and system power consumptionat below 3 μW.

IV. MEASUREMENT RESULTS

The chip was fabricated in a standard 0.13 μm CMOS tech-nology and the die photomicrograph is shown in Fig. 9, withmost area occupied by the on-chip antenna. The entire sensoroperates under 1.2 V supply voltage. Table I summarizes thechip measurement results and comparisons with prior arts.The entire SoC consumes 2.89 μW under 1.2 V supply whiletransmitting raw ECG data, which is one order of magnitudelower than the state-of-the-art designs.

The noise performance of the analog front-end ampli-fier is shown in Fig. 10. The front-end input-referred noiseis 3.06 μVrms, integrated from 0.5 Hz to 150 Hz. The inputimpedance is over 3.6 G�. Under a 10 Hz sinusoid testingsignal input, the spectrum of the signal reconstructed fromADC output DIR and REQ is shown in Fig. 11. The entirefront-end including the ADC achieves 42.2 dB signal-to-noiseratio (SNR).

Fig. 12 shows the environment and setup of the transmittermeasurement. The system is placed in an anechoic chamberto shield the chip from the strong wireless interference. Thetransmitted IR-UWB pulse is received by a custom-designedUWB printed circuit board (PCB) antenna, filtered by a band-pass filter and amplified by an commercial low noise amplifier.A custom-designed non-coherent IR-UWB receiver is used toreceive and demodulate the IR-UWB signals to baseband. Therecovered ECG signal demodulated by the receiver is shownin Fig. 13.

The measured stand-alone transmitter’s output is shownin Fig. 14(a). The output swing is 600 mV with a 50 � load.As shown in Fig. 14(b), the transmitter achieves FCC compli-ance at the data rate of 100 kbps. The total power consumptionof the IR-UWB TX is 1.46 μW at 100 kbps. The powerconsumption of the IR-UWB TX vs the data rate is plotted

in Fig. 15. When the data rate falls below 1000 kbps, the trans-mitter power is predominantly consumed by circuit leakage.When the data rate increases beyond 1000 kbps, the transmitterpower scales linearly with data rate and is predominantlyconsumed by the pulse generator.

The de-embedded measurement of the on-chip antenna isshown in Fig. 16(a). There is difference between simulatedand measured reflection coefficients and the measured centerresonant frequency is lower than simulated. The reasons are asfollows: 1) The size of the antenna’s ground plane has an effecton the resonant frequency. The ground plane thus extends thecurrent path lower than the resonant frequency [28]. 2) Theon-chip antenna is designed using the EM simulation tool.The process data is imported to the EM simulation tool basedon the foundry design manual. The process data may not beaccurate. 3) There might be dummy fills and other non-idealeffects in the chip manufacturing process which cannot bemodelled in the design phase. The measured results show thatthe measured |S11| is less than 10 dB across the entire 3–5 GHzUWB band, and the frequency shift can be avoided by furtheroptimization by taking the connected circuit into consideration.The simulated radiation pattern in Fig. 16(b) indicates anomnidirectional pattern with a peak realized gain of 37.3 dBiat 4 GHz.

To demonstrate the new capabilities attained by the newDC-coupled AFE, we capture ECG signals using dry elec-trodes on human subject. Fig. 17 shows the dry electrodes andillustrates how the dry electrodes were used in our experiment.The electrode is formed by a 2-layer FR4 PCB, with thebottom metal layer exposed as an electrode. The outer ringis used to shield the electrode and it is biased close to thecircuit common mode, sets the skin potential which effectivelyreduces the skin-electrode offset and accelerate the ECGbaseline settling.

In our experiment, the test subject walks in normal paceand occasionally stretches his chest muscle and an exampleof a 20 second ECG record is shown in Fig. 18. Thanks tothe baseline stabilizer proposed, there is very minimum ECGbaseline drift despite body movement. Furthermore, the muscleresponse will only evoke the electromyography (EMG) signal,as shaded in Fig. 18. The ECG signal in Fig. 19(a) is capturedwhen the subject is doing moderate exercise. The baselinesare stable and all vital waves are easily identifiable. No signalclipping occurs. With over 3.6 G� measured input impedanceat low frequency range, the captured ECG signal is much less

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Fig. 19. Captured ECG under different scenarios: (a) using dry electrodeson chest during exercise; (b) from left arm.

affected by motion artifacts. To illustrate the sensitivity of theDC-coupled AFE, we measure ECG signal from left arm only.Two electrodes are placed on one arm at 4 cm apart. Theresult is given in Fig. 19(b). Note that even though the peak-to-peak voltage is only 0.2 mV, the heart beat peaks as wellas important features are still identifiable, which shows theexcellent performance of the proposed AFE. It is noticeablethat power line noises are kept very low in ECG recordingsin Figs. 18 and 19. This is mainly due to high input impedancethat suppresses the power noise interferences.

V. CONCLUSION

We have presented in this paper a fully-integrated wirelessECG SoC for wearable ECG sensors. The DC-coupled AFEwith 3.6 G� input impedance improves the signal quality andreduces the motion artifacts. The newly introduced baselinestabilizer corrects the DC drift caused by DC-coupled inputand avoids prolonged saturation. The level-crossing ADCminimizes the number of samples, removes system clock, andfacilitates asynchronous implementation with the help of theIR-UWB transmitter. The entire sensor consumes 2.89 μWwhile transmitting the raw ECG data. The highly integratedECG chip does not require any external clocks, antennas, orwet electrodes, which makes it a promising candidate for costeffective wireless ECG patches.

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[14] A. Klinefelter et al., “A 6.45 μW self-powered IoT SoC with integratedenergy-harvesting power management and ULP asymmetric radios,”in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers,Feb. 2015, pp. 1–3.

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[22] G. D. Clifford, F. Azuaje, and P. McSharry, Advanced Methods And Toolsfor ECG Data Analysis, 1st ed. Norwood, MA, USA: Artech House,Sep. 2006.

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[28] Y. F. Weng, S. W. Cheung, and T. I. Yuk, “Effects of ground-plane sizeon planar UWB monopole antenna,” in Proc. IEEE Region 10 Conf.(TENCON), Nov. 2010, pp. 422–425.

[29] F. Zhang, J. Holleman, and B. P. Otis, “Design of ultra-low powerbiopotential amplifiers for biosignal acquisition applications,” IEEETrans. Biomed. Circuits Syst., vol. 6, no. 4, pp. 344–355, Aug. 2012.

Xiaoyang Zhang (S’09–M’15) received theB.Sc. degree in microelectronics from PekingUniversity, Beijing, China, in 2009, and thePh.D. degree in electrical engineering from theNational University of Singapore, Singapore,in 2015.

His research interests include low-powerbiomedical sensors and wearable computing.

Zhe Zhang (S’09) received the B.S. degree inphysics from Peking University, Beijing, China,in 2008, the M.S. degree in electrical engineeringfrom the University of Texas at Dallas, Richardson,TX, USA, in 2009, and the Ph.D. degree in electricalengineering from the National University of Singa-pore, Singapore, in 2015.

His current research interests include low-powerwireless circuits, integrated power converters, andanalog-to-digital converters.

Yongfu Li (S’09–M’15) received the B.Eng.and the Ph.D. degrees in electrical and eomput-ing engineering from the National University ofSingapore (NUS), Singapore, in 2009 and 2014,respectively.

He was a research engineer with NUS from2013 to 2014. Since August 2014, he has beenwith GLOBALFOUNDRIES working as a design-to-manufacturing (DFM) computer-aided design(CAD) development engineer. His research interestsinclude analog/mixed signal circuits, data converters,

power converters, and DFM CAD.

Changrong Liu (S’12–M’16) was born in Jiangsu,China, in 1986. He received the B.E. degree inelectronic information science and technology, theM.E. degree in radio physics, and the Ph.D. degreein radio physics, all from the University of Elec-tronic Science and Technology of China (UESTC),Chengdu, China, in 2008, 2011, and 2015, respec-tively.

From March 2010 to March 2011, he was aVisiting Student in the Department of Electricaland Computer Engineering, National University of

Singapore (NUS), Singapore, and from August 2012 to August 2014, he wasa Visiting Scholar at NUS. In August 2015, he joined Soochow University,Jiangsu, China, as an Assistant Professor. His main research interests includeLTCC-based millimeter-wave antenna array design, circularly polarized beam-steering antenna array, and implantable antennas for biomedical applications.

Yong-Xin Guo (SM’05) received the B.Eng. andM.Eng. degrees in electronic engineering fromNanjing University of Science and Technology,Nanjing, China, in 1992 and 1995, respectively, andthe Ph.D. degree in electronic engineering from theCity University of Hong Kong, Hong Kong, China,in 2001.

Dr. Guo was with the Institute for InfocommResearch, Singapore, as a Research Scientist fromSeptember 2001 to January 2009. He joined theDepartment of Electrical and Computer Engineer-

ing (ECE), National University of Singapore (NUS) as an Assistant Professorin February 2009 and was promoted as a tenured Associate Professorin January 2013. He is the Director of the Center for Microwave andRadio Frequency at the Department of ECE of NUS. Concurrently, he is aSenior Investigator at the National University of Singapore Suzhou ResearchInstitute (NUSRI) in Suzhou, China, and Director of the Center of AdvancedMicroelectronic Devices at NUSRI. He has authored or coauthored 178international journal papers and 189 international conference papers. Thus far,his publications have been cited by others more than 2086 times and the H-index is 28 (source: Scopus). He holds 7 granted/filed patents in the U.S. andChina. His current research interests include implantable/wearable antennas,on-chip antennas and antennas in package, microstrip antennas for wirelesscommunications, RF energy harvesting and wireless power for biomedicalapplications and IoTs, MMIC modeling and design. He has graduated 7 Ph.D.students at NUS.

Dr. Guo is the General Chair for the 2017 International Applied Computa-tional Electromagnetics Society (ACES) Symposium, August 2017, Suzhou,China. He was General Chair for the 2015 IEEE MTT-S InternationalMicrowave Workshop Series on Advanced Materials and Processes for RFand THz Applications (IMWS-AMP 2015), Suzhou, China, and the IEEEMTT-S International Microwave Workshop Series 2013 (IMWS2013) on “RFand Wireless Technologies for biomedical and Healthcare Applications” inSingapore. He served as a Technical Program Committee (TPC) co-chair forthe IEEE International Symposium on Radio Frequency Integration Technol-ogy (RFIT2009). He has been a TPC member and session chair for numerousother conferences and workshops. He is serving as an Associate Editorfor the IEEE Antennas and Wireless Propagation Letters, IET Microwaves,Antennas & Propagation, and Electronics Letters. He was a recipient of theYoung Investigator Award 2009 from the National University of Singapore.He received the 2013 Raj Mittra Travel Grant Senior Researcher Award.He received the Best Poster Award at the 2014 International Conferenceon Wearable and Implantable Body Sensor Networks (BSN 2014), Zurich,Switzerland. He was a co-recipient of the Design Contest Award at the 20thInternational Symposium on Low Power Electronics and design (ISLPED),Rome, Italy, July 2015. His Ph.D. students have received Best Student PaperAwards from IEEE MTT-S IMWS-Bio 2015 in Taiwan, IEEE iWEM 2013in Hong Kong, 2011 National Microwave and Millimeter-Wave Conferenceat Qingdao, China, and IEEE ICMMT 2010 in Chengdu, China.

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Yong Lian (M’90–SM’99–F’09) received theB.Sc. degree from the College of Economics andManagement, Shanghai Jiao Tong University, Shang-hai, China, in 1984, and the Ph.D. degree in elec-trical engineering from the National University ofSingapore (NUS), Singapore, in 1994.

He spent nine years in industry and joined NUSin 1996. He was appointed as the first Provost’sChair Professor in the Department of Electrical andComputer Engineering of NUS in 2011. Currently,he is a Professor in the Department of Electrical

Engineering and Computer Science of the Lassonde School of Engineering,York University, Toronto, ON, Canada. His research interests include biomed-ical circuits and systems and signal processing.

Dr. Lian has received many awards including the IEEE Circuits andSystems Society’s Guillemin-Cauer Award (1996), IEEE CommunicationsSociety Multimedia Communications Best Paper Award (2008), Institution ofEngineers Singapore Prestigious Engineering Achievement Award (2011), HuaYuan Association/Tan Kah Kee International Society Outstanding ContributionAward (2013), Chen-Ning Franklin Yang Award in Science and Technologyfor New Immigrant (2014), and Design Contest Award in 20th InternationalSymposium on Low Power Electronics and Design (ISLPED2015). As aneducator, he received the University Annual Teaching Excellent Award intwo consecutive academic years from 2008 to 2010 and many other teachingawards from the Faculty of Engineering. Under his guidance, his studentshave received many awards including the Best Student Paper Award in ICME2007, winner of 47th DAC/ISSCC Student Design Contest in 2010, and BestDesign Award in A-SSCC 2013 Student Design Contest.

Dr. Lian is the President-Elect of the IEEE Circuits and Systems (CAS)Society, and a Steering Committee Member of the IEEE TRANSACTIONS ON

BIOMEDICAL CIRCUITS AND SYSTEMS. He was the Editor-in-Chief of theIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS

for two terms from 2010 to 2013. He was the Guest Editor for eight specialissues of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR

PAPERS, IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS,and Journal of Circuits, Systems, and Signal Processing. He was the VicePresident for Publications of the IEEE CAS Society from 2013 to 2015, VicePresident for the Asia Pacific Region of the IEEE CAS Society from 2007to 2008, AdComm Member of the IEEE Biometrics Council from 2008 to2009, CAS Society Representative to the BioTechnology Council from 2007 to2009, Chair of the BioCAS Technical Committee of the IEEE CAS Societyfrom 2007 to 2009, Chair of DSP Technical Committee of the IEEE CASSociety from 2010 to 2011, Member of the IEEE Medal for Innovations inHealthcare Technology Committee from 2010 to 2012, and a DistinguishedLecturer of the IEEE CAS Society from 2004 to 2005. He is the Founder ofthe International Conference on Green Circuits and Systems, the Asia PacificConference on Postgraduate Research in Microelectronics and Electronics,and the IEEE Biomedical Circuits and Systems Conference. He is a Fellowof the Academy of Engineering Singapore.