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LT1950
11950fa
Wide Input Range: 3V to 25V Programmable Volt-Second Clamp Output Power Levels from 25W to 500W Auxiliary Boost Converter Provides 10V Gate Drive
from VIN as Low as 3V Programmable Operating Frequency (100kHz to
500kHz) with One External Resistor Programmable Slope Compensation Programmable Leading Edge Blanking ±2% Internal 1.23V Reference Accurate Shutdown Pin Threshold with
Programmable Hysteresis 60ns Current Sense Delay 2.5V Auxiliary Reference Output Synchronizable to an External Clock up to 1.5 • fOSC Current Mode Control Small 16-Pin SSOP Package
Telecom Power Supplies Automotive Power Supplies Portable Electronic Equipment Isolated and Nonisolated DC/DC Converters
Single Switch PWMController with Auxiliary
Boost Converter
, LTC and LT are registered trademarks of Linear Technology Corporation.
SLOPE
VREF
BOOST
ROSC
BLANK
SYNC
GND
FB
VIN
VIN2
VSEC
SHDN
GATE
ISENSE
PGND
COMP
LT1950
1950 TA01a
0.1µF
249k
4.99k 4.7k0.022µF
1µF
470k
18k
10VBIAS
100k
VINMBRB20200 47µH
47µF
VOUT26V5A
0.015Ω
Si7450
2.5V
PA0581
Efficiency vs Load Current
LOAD CURRENT (A)0.5
EFFI
CIEN
CY (%
)
95
90
85
80
75
704.5
1950 TA01b
1.5 2.5 3.5 5.5
VIN = 48V
VIN = 36V
VIN = 72V
36V to 72V DC to 26V/5A (Single Switch) Forward Converter
The LT®1950 is a wide input range, forward, boost, flybackand SEPIC controller that drives an N-channel powerMOSFET with few external components required.
A resistor programmable duty cycle clamp can be used togenerate a volt-second clamp for forward converter appli-cations. An internal boost switcher is available for creatinga separate supply for the output gate driver, allowing 10Vgate drive from input voltages as low as 3V. The LT1950’soperating frequency can be set with an external resistorover a 100kHz to 500kHz range and a SYNC pin allows thepart to be synchronized to an external clock. Additionalprogrammability exists for leading edge blanking andslope compensation.
A fast current sense comparator achieves 60ns currentsense delay and the error amplifier is a true voltage modeerror amplifier, allowing a wide range of compensationnetworks. An accurate shutdown pin with programmablehysteresis is available for undervoltage lockout and shut-down. The LT1950 is available in a small 16-Pin SSOPpackage.
APPLICATIO SU
FEATURES DESCRIPTIO
U
TYPICAL APPLICATIO
U
LT1950
21950fa
ORDER PARTNUMBER
GN PART MARKING
TJMAX = 125°C, θJA = 110°C/W, θJC (PIN 8) = 30°C/W
1950E1950I
LT1950EGNLT1950IGN
ABSOLUTE AXI U RATI GS
W WW U
PACKAGE/ORDER I FOR ATIOU UW
(Note 1)
ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwisespecified.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
TOP VIEW
GN PACKAGE16-LEAD NARROW PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
COMP
FB
ROSC
SYNC
SLOPE
VREF
SHDN
GND
VSEC
VIN
BOOST
PGND
GATE
VIN2
ISENSE
BLANK
PARAMETER CONDITIONS MIN TYP MAX UNITS
PWM Controller
Operating Input Voltage IVREF = 0µA 3.0 25 V
Minimum Start-Up Voltage IVREF = 0µA 2.6 3.0 V
VIN Quiescent Current IVREF = 0µA, FB = 1V, ISENSE = 0.2V 2.3 3.0 mA
VIN Shutdown Current SHDN = 0V 5 20 µA
Shutdown Threshold 3V < VIN < 25V 1.261 1.32 1.379 V
Shutdown Pin Current SHDN = 70mV Above Threshold –7 –10 –13 µA
Shutdown Pin Current Hysteresis SHDN = 100mV Below Threshold 4 7 10 µA
VIN2 Quiescent Current I(VREF) = 0µA, FB = 1V, ISENSE = 0.2V 1.7 2.5 mA
VIN2 Shutdown Current SHDN = 0V, VIN2 = 2.7V (Boost Diode from VIN = 3V) 500 700 µA
VREF (External Output)
Output Voltage IVREF = 0µA 2.425 2.500 2.575 V
Line Regulation IVREF = 0µA, 3V < VIN < 25V 1 5 mV
Load Regulation 0µA < IVREF < 2.5mA 1 5 mV
Oscillator
Frequency: fOSC ROSC = 249k, FB = 1V 170 200 230 kHz
Minimum Programmable fOSC ROSC = 499k 85 100 115 kHz
Maximum Programmable fOSC ROSC = 90.9k 440 500 560 kHz
SYNC Input Resistance 20 kΩ
SYNC Switching Threshold 1.5 2.2 V
SYNC Frequency/fOSC (ROSC = 249k, fOSC =200kHz), FB = 1V (Note 7) 1.25 1.5
fOSC Line Reg 3V < VIN < 25V 0.05 0.15 %/V
9.5V < VIN2 < 25V 0.05 0.25 %/V
VROSC 1 V
BOOST ....................................................... –0.3V to 35VVIN, VIN2, SHDN ......................................... –0.3V to 25VFB, SYNC, VSEC ........................................... –0.3V to 6VCOMP, BLANK .......................................... –0.3V to 3.5VSLOPE ...................................................... –0.3V to 2.5VISENSE ......................................................... –0.3V to 1VROSC .................................................................... –50µAVREF .................................................................... –10mAOperating Junction Temperature RangeLT1950EGN/LT1950IGN (Notes 2, 5) ... –40°C to 125°CStorage Temperature Range ..................–65°C to 150°CLead Temperature (Soldering, 10 sec).................. 300°C
LT1950
31950fa
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS
The denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwisespecified.
Error Amplifier
FB Reference Voltage 3V < VIN < 25V, VOL + 0.2V < COMP < VOH – 0.2 1.205 1.230 1.254 V
FB Input Bias Current FB = FB Reference Voltage –75 –200 nA
Open Loop Voltage Gain VOL + 0.2V < COMP < VOH – 0.2 65 85 dB
Unity Gain Bandwidth (Note 6) 3 MHz
COMP Source Current FB = 1V, COMP = 1.6V –0.3 –1.1 –1.8 mA
COMP Sink Current FB = 1.4V, COMP = 1.6V 8 13 mA
COMP High Level: VOH FB = 1V, ICOMP = – 250µA 2.5 V
COMP Active Threshold Start of GATE Switching (Duty Cycle > 0%) 1.0 V
COMP Low Level: VOL FB = 1.4V, ICOMP = 250µA 0.15 V
Current Sense
ISENSE Maximum Threshold Duty Cycle < 10%, COMP = VOH 90 100 110 mV
ISENSE Input Bias Current COMP = 2.5V, ISENSE = ISENSE Max Threshold –125 –170 –250 µA
Default Blanking Time FB = 1V, COMP = 2V, ISENSE = 75mV 110 ns
Adjustable Blanking Time FB = 1V, COMP = 2V, ISENSE = 75mV 290 nsBLANK = 75k to Ground
Blanking Override Voltage– BLANK = Open, COMP = 2.5V (Note 4) 15 25 40 mVISENSE Maximum Threshold
Turn-Off Delay to Gate COMP = 2V 60 ns
Slope Compensation (Note 4) ISENSE Max Threshold (DC < 10%) – (DC = 80%) (Note 4)Default, RSLOPE = ∞ 14 mV2x Default, RSLOPE = 8k 28 mV3x Default, RSLOPE = 3.3k 42 mV
Internal Switcher
Boost Switch ILIMIT VIN2 = 8V, 3V < VIN < 10V 70 125 180 mA
Boost Switch Off Time VIN2 = 8V, 3V < VIN < 10V 250 500 1000 ns
VIN2: Boost Disable 3V < VIN < 10V 9.5 11.0 11.75 V
VIN2: Boost Disable Hysteresis 3V < VIN < 10V –1.0 V
VIN2: Gate Enable 3V < VIN < 10V, FB = 1V (Note 4) 7.0 8.2 9.27 V
VIN2: Gate Enable Hysteresis 3V < VIN < 10V, FB = 1V (Note 4) –0.6 V
GATE Driver Output
GATE Rise Time FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) 50 ns
GATE Fall Time FB = 1V, VIN2 = 12V, CL = 1nF (Notes 3, 6) 30 ns
GATE Clamp Voltage IGATE = 0µA, COMP = 2.5V, FB = 6V 11.5 13 14.5 V
GATE Low Level IGATE = 20mA 0.25 0.4 VIGATE = 200mA 1.2 1.75 V
GATE High Level IGATE = –20mA, VIN2 = 12V, COMP = 2.5V, FB = 6V 10 VIGATE = –200mA, VIN2 = 12V, COMP = 2.5V, FB = 6V 9.75 V
Maximum Duty Cycle FB = 1V, fOSC = 200kHz 90 95 97 %
LT1950
41950fa
TEMPERATURE (°C)–50
FB V
OLTA
GE (V
)
1.26
1.25
1.24
1.23
1.22
1.21
1.2025 75
1950 G01
–25 0 50 100 125TEMPERATURE (°C)
–50
FREQ
UENC
Y (k
Hz)
1950 • G02
0 50 100
240
230
220
210
200
190
180
170
160–25 25 75 125
TEMPERATURE (°C)–50
V IN
SHUT
DOW
N I Q
(µA)
1950 • G03
0 50 100
16
14
12
10
8
6
4
2
0–25 25 75 125
SHDN = 0V
TEMPERATURE (°C)–50
SHUT
DOW
N TH
RESH
OLD
(V)
1950 • G04
0 50 100
1.45
1.40
1.35
1.30
1.25
1.20–25 25 75 125
TEMPERATURE (°C)–50
MAX
IMUM
I SEN
SE T
HRES
HOLD
(mV)
125
120
115
110
105
100
95
90
85
80
750 50 75
1950 G05
–25 25 100 125
I SEN
SE C
URRE
NT (µ
A)
270
250
230
210
190
170
150
130
110
90
TEMPERATURE (°C)–50 0 50 75
1950 G06
–25 25 100 125
PARAMETER CONDITIONS MIN TYP MAX UNITS
Maximum Duty Cycle Clamp VSEC = 1.4V, FB = 1V, COMP = VOH 63 75 87 %
VSEC Input Bias Current 0V < VSEC < 2.8V –0.3 –1.0 µA
Note 1: Absolute Maximum Ratings are those values beyond which the lifeof a device may be impaired.Note 2: The LT1950EGN is guaranteed to meet performance specificationsfrom 0°C to 125°C operating junction temperature. Specifications over the–40°C to 125°C operating junction temperature range are assured bydesign, characterization and correlation with statistical process controls.The LT1950IGN is guaranteed over the full –40°C to 125°C operatingjunction temperature range.Note 3: Rise and Fall times are between 10% and 90% levels.
FB Voltage vs TemperatureSwitching Frequency vsTemperature VIN Shutdown IQ vs Temperature
Shutdown Threshold vsTemperature
Maximum ISENSE Threshold vsTemperature
ISENSE Pin Current vsTemperature
ELECTRICAL CHARACTERISTICS
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Note 4: Guaranteed by correlation to static test.Note 5: This IC includes overtemperature protection that is intended toprotect the device during momentary overload conditions. Junctiontemperature will exceed 125°C when overtemperature protection is active.Continuous operation above the specified maximum operating junctiontemperature may impair device reliability.Note 6: Guaranteed but not tested.Note 7: Maximum recommended SYNC frequency = 500kHz.
The denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are at TA = 25°C. COMP = open, FB = 1.4V, ROSC = 249k, SYNC = 0V, SLOPE = open, VREF= 0.1µF, SHDN = VIN, BLANK = 0V, ISENSE = 0V, VIN2 = 15V, GATE = 1nF, BOOST = open, VIN = 15V, VSEC = 0V, unless otherwisespecified.
LT1950
51950fa
TEMPERATURE (°C)–50
SHDN
CUR
RENT
HYS
TERE
SIS
(µA)
100
1950 G11
0 50
11
10
9
8
7
6
5
4
3–25 25 75 125
GATE CAPACITANCE (pF)0
GATE
RIS
E/FA
LL T
IME
(ns)
125
100
75
50
25
04000
1950 G12
1000 2000 3000 5000
tr
tf
TEMPERATURE (°C)–50
MIN
IMUM
VIN
STA
RT-U
P VO
LTAG
E (V
)
100
1950 G08
0 50
3.00
2.75
2.50
2.25
2.00–25 25 75 125
TEMPERATURE (°C)–50
BLAN
K OV
ERRI
DE T
HRES
HOLD
–I
SENS
E M
AXIM
UM T
HRES
HOLD
(mV)
40
35
30
25
20
15
1025 75
1950 G07
–25 0 50 100 125TEMPERATURE (°C)
–50
V IN
I Q (m
A)
100
1950 G09
0 50
3.1
2.9
2.7
2.5
2.3
2.1
1.9
1.7
1.5–25 25 75 125
14
12
10
8
6
4
2
0
SHDN
INPU
T CU
RREN
T*(–
1) (µ
A)
TEMPERATURE (°C)–50 25 75
1950 G10
–25 0 50 100 125
SHDN = SHDN THRESHOLD + 70mV
SHDN = SHDN THRESHOLD – 100mV
V IN2
GAT
E EN
ABLE
(V)
9.2
8.7
8.2
7.7
7.2
TEMPERATURE (°C)–50 25 75
1950 G13
–25 0 50 100 125
GATE DISABLE
GATE ENABLE
HYSTERESIS
TEMPERATURE (°C)–50
V IN2
BOO
ST D
ISAB
LE (V
)
1950 G14
0 50 100
13.0
12.5
12.0
11.5
11.0
10.5
10.0
9.5
9.0–25 25 75 125
BOOST DISABLE
BOOST RE-ENABLE
HYSTERESIS
BOOS
T SW
ITCH
I LIM
IT (m
A)
250
200
150
100
50
TEMPERATURE (°C)–50 25 75
1950 G15
–25 0 50 100 125
TA = 25°C
BLANK Override Threshold –ISENSE Maximum Threshold vsTemperature
Minimum VIN Start-Up Voltage vsTemperature (VIN2 Boosted) VIN IQ vs Temperature
SHDN Input Current *(–1) vsTemperature
SHDN Current Hysteresis vsTemperature
GATE Rise/Fall Time vsGATE Capacitance
VIN2: BOOST Disablevs Temperature
BOOST Switch ILIMIT vsTemperature
VIN2: GATE Enablevs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1950
61950fa
COMP (Pin 1): The COMP pin is the output of the erroramplifier. The error amplifier is a true op amp which allowsthe use of an RC network to be connected between theComp and FB pins to compensate the feedback loop foroptimum transient response. The peak switch current inthe external MOSFET will be proportional to the voltage onthe COMP pin. Typical operating voltage range for this pinis 1V to 2.5V.
FB (Pin 2): The FB pin is the inverting input to the erroramplifier. The output voltage is set with a resistor divider.The error amplifier adjusts the peak switch current tomaintain the FB pin voltage at the value of the internalreference voltage of 1.23V.
ROSC (Pin 3): A resistor from the ROSC pin to groundprograms the operating frequency of the LT1950. Operat-ing frequency range is 100kHz to 500kHz. Nominal voltageon the ROSC pin is 1V.
SYNC (Pin 4): The SYNC pin is used to synchronize theinternal oscillator to an external clock signal. The pin isdirectly logic compatible and can be driven with any signalwith a duty cycle of 10% to 90%. If the SYNC function isnot used the pin can be left open circuit or connected toground.
TYPICAL PERFOR A CE CHARACTERISTICS
UW
UUU
PI FU CTIO SSLOPE (Pin 5): The SLOPE pin is used to adjust theamount of slope compensation. Leaving the pin opencircuit results in a default level of slope compensation. Theamount of slope compensation can be adjusted above thisdefault level by connecting a resistor from the SLOPE pinto the VREF pin.
VREF (Pin 6): The VREF pin is the output of an internal 2.5Vreference. This pin is capable of sourcing up to 2.5mA forexternal use. It is recommended that the VREF pin isbypassed to ground with a 0.1µF ceramic capacitor.
SHDN (Pin 7): The SHDN pin is used to put the device intoa low power shutdown state. In shutdown the VIN supplycurrent drops to 5µA. The SHDN pin has an accuratethreshold of 1.32V which can be used to program anundervoltage lockout threshold. Input current levels onthe SHDN pin can be used to program hysteresis into theundervoltage lockout levels.
GND (Pin 8): The GND pin is the analog ground for theinternal circuitry of the LT1950. Sensitive circuitry such asthe feedback divider, frequency setting resistor, referencebypass capacitor should be tied directly to this pin. See theApplications Information section for recommendationson ground connections.
BOOST Switch Off Time vsTemperature
Maximum Duty Cycle vsVSEC Voltage
GATE Clamp Voltage vsTemperature
VSEC VOLTAGE (V)
MAX
IMUM
DUT
Y CY
CLE
(%)
100
90
80
70
60
50
40
30
1950 G17
0.8 1.2 1.6 2.0 2.4 2.8 3.2
TEMPERATURE (°C)–50
GATE
CLA
MP
VOLT
AGE
(V)
100
1950 G18
0 50
16
15
14
13
12
11
10–25 25 75 125
MAX DUTY CYCLE = (105/VSEC)%1.25V < VSEC < 2.8VTA = 25°C
BOOS
T SW
ITCH
OFF
TIM
E (n
s)
700
600
500
400
300
TEMPERATURE (°C)–50 25 75
1950 G16
–25 0 50 100 125
LT1950
71950fa
BLANK (Pin 9): The BLANK pin is used to adjust theleading edge blanking period of the current sense amplifierduring FET turn-on. Shorting the BLANK pin to groundprovides a default blanking period of approximately 110ns.A resistor from the BLANK pin to ground increases theblanking period up to 290ns for RBLANK = 75k.
ISENSE (Pin 10): The ISENSE pin is the current sense inputfor the control loop. Connect this pin to the sense resistorin the source of the external power MOSFET.
VIN2 (Pin 11): The VIN2 pin is the supply pin for theMOSFET gate drive circuit. Power can be supplied to thispin by an external supply such as VIN, and must exceed 8V(the undervoltage lockout threshold for the gate driversupply). For low VIN supply voltages an internal boostregulator can be used to generate as much as 11V at theVIN2 pin. This allows the LT1950 to run with VIN supplyvoltages down to 3V while still supplying enough gatedrive for standard level MOSFETs.
GATE (PIN 12): The GATE pin is the output of a high currentgate drive circuit used to drive an external MOSFET. Theoutput is actively clamped to a max voltage of 13V if VIN2is supplied by a high voltage.
PGND (Pin 13): This is the ground connection for the highcurrent gate driver stage. See the Applications Informa-tion section for recommendations on ground connec-tions.
UUU
PI FU CTIO SBOOST (Pin 14): The BOOST pin is the NPN collectoroutput of the internal boost converter which can be usedto generate an 11V supply for the MOSFET gate drivercircuit. The boost converter runs with a fixed off-time of0.5µs and a current limit of 125mA. The converter runsuntil the VIN2 voltage exceeds 11V and then turns off untilthe VIN2 voltage drops below 10V. If the VIN2 voltage issupplied externally, the BOOST pin should be shorted toground or left open.
VIN (Pin 15): The VIN pin is the main supply pin for theLT1950. This pin must be closely bypassed to ground. IfVIN2 is generated using the BOOST pin then the LT1950will be fully functional, internal VREF will be active and thegate output will be enabled with a VIN voltage as low as 3V.An internal undervoltage lockout threshold exists at ap-proximately 2.6V on the VIN pin. Undervoltage lockoutvoltages greater than 3V can be programmed using avoltage divider on the SHDN pin.
VSEC (Pin 16): The VSEC pin is used to program themaximum duty cycle of the gate driver circuit. The maxi-mum duty cycle will be equal to (105/VSEC)% for VSECbetween 1.4V and 2.8V. This is a useful function to limit theflyback voltage in a forward converter. If the maximumduty cycle function is not used then the VSEC pin should betied to ground.
LT1950
81950fa
The LT1950 is a constant frequency, current mode con-troller for DC/DC forward, boost, flyback and SEPIC con-verter applications. The Block Diagram in Figure 1 showsall of the key functions of the IC.
In normal operation, a VIN voltage as low as 3V allows aninternal switcher at the BOOST pin to generate a separate
BLOCK DIAGRA
W
OPERATIOU
Figure 1. LT1950 Block Diagram
–
+
–
+
–
+
–+
– +– +
VREF = INTERNAL +EXTERNALSUPPLY
VIN2
2.5V(SOURCE 2.5mAEXTERNALLY)
1.23V
(VIN) (2.6V)U/V LOCKOUT
(VIN2) (8V)U/V LOCKOUT
(100-500)khz
(105/VSEC)%
OSC
(TYPICAL 200kHz)
7
15 16 14
12
13
116
4
3
5
10
81 92
SHDN
SYNC
ROSC
SLOPE
1.32V
1.23V
MAX DCCLAMP
SLOPE COMPRAMP
S Q
R
BLANKING
FB COMP GND BLANK
VREFVIN VSEC BOOST VIN2
SWITCHING PREREGULATOR
FIXED OFF TIME
(125mA CURRENT LIMIT)
PGND
DISABLE
–
+
CURRENTSENSE
CMP
BLANKINGOVERRIDECMP
GATE
PGND
ISENSE
±1ADRIVER
13V
ENABLE
11V
8V
1950 BD
3µA
–
+ERROR AMPLIFIERVOLTAGE GAIN = 85dB
125mV
0mV – >100mV
11V supply at VIN2 using a small surface mount externalinductor, diode and capacitor. Since VIN2 supplies theoutput driver of the IC, this architecture achieves highGATE drive for an external N-channel power MOSFET eventhough VIN voltage is very low. High GATE drive capabilityreduces MOSFET RDS(ON) for improved efficiency,
LT1950
91950fa
increases the range of MOSFETs that can be selected andallows applications requiring high gate drive with a largeswing in VIN voltage. When VIN2 exceeds 8V, the GATEoutput driver is enabled. The GATE switches between 0Vand VIN2 at a constant frequency set by a resistor from theROSC pin to ground. When VIN2 reaches 11V, the internalswitcher at the BOOST pin is disabled to save power andonly re-enabled when VIN2 drops below 10V. The internalboost switcher runs in burst mode operation, asynchro-nous to the main oscillator. If low VIN operation with highGATE drive is not required, the BOOST pin is left open andthe VIN2 pin shorted to VIN. With VIN2 shorted to VIN theminimum operational VIN voltage will increase from 3V to8V (required at VIN2 to enable the GATE output driver). ForGATE turn on, a PWM latch is set at the start of each mainoscillator cycle. For GATE turn off, the PWM latch is resetwhen either the current sense comparator is tripped, themaximum duty cycle is reached, or the BLANK overridethreshold is exceeded.
A resistor divider from the application’s output voltagegenerates a voltage at the FB pin that is compared to theinternal 1.23V reference by the error amplifier. The erroramplifier output (COMP) defines the input threshold(ISENSE) of the current sense comparator. Maximum ISENSEvoltage is clamped to 100mV. By connecting ISENSE to asense resistor in series with the source of the externalMOSFET, the peak switch current is controlled by COMP.An increase in output load current causing the outputvoltage to fall, will cause COMP to rise, increasing ISENSEthreshold, increasing the current delivered to the output.
This current mode technique means that the error ampli-fier commands current to be delivered to the output ratherthan voltage. This makes frequency compensation easierand provides faster loop response to output load tran-sients.
The current mode architecture requires slope compensa-tion to be added to the current sensing loop to preventsubharmonic oscillations which can occur for duty cyclesabove 50%. Unlike most current mode converters whichhave a slope compensation ramp that is fixed internally,placing a constraint on inductor value and operatingfrequency, the LT1950 has externally adjustable slope
OPERATIOU
compensation. A default level of slope compensation isachieved with the SLOPE pin open. Increased slope com-pensation can be programmed by reducing the value ofresistance inserted between the SLOPE pin and VREF pin.
A SYNC pin allows the LT1950 main oscillator to besynchronized to an external clock . To avoid loss of slopecompensation during synchronization, the free runningmain oscillator frequency should be programmed to ap-proximately 80% of the external clock frequency.
The LT1950 can be placed into shutdown mode when theSHDN pin drops below an accurate 1.32V threshold. Thisthreshold can be used to program undervoltage lockout(UVLO) at VIN for current limited or high source resistancesupplies. SHDN pin current hysteresis also exists to allowexternal programming of UVLO voltage hysteresis. WhenVIN and VIN2 exceed internally set UVLO thresholds of 2.6Vand 6.8V, the VREF output becomes active. The VREF outputis a 2.5V reference supplying the majority of LT1950control circuitry and capable of sourcing up to 2.5mA forexternal use.
To prevent noise in the system causing premature turn offof the external MOSFET the LT1950 has leading edgeblanking. This means the current sense comparator out-put is ignored during MOSFET turn on and for an extendedperiod after turn on. The extended blanking period isadjusted by inserting a resistor from the BLANK pin toground. A short to ground defines a minimum defaultblanking period. Increased resistance from the BLANK pinto ground will increase blanking duration. Fault conditionscausing ISENSE to exceed 125mV will override blankingand reduce the ISENSE to GATE delay to 60ns.
For applications requiring maximum duty cycle clamping,the VSEC pin reduces duty cycle for increased voltage onthe pin. The VSEC pin provides a volt-second clamp criticalin forward converter applications.
Maximum duty cycle follows (105/VSEC)% for VSEC volt-ages between 1.4V to 2.8V. If unused, the VSEC pin shouldbe shorted to ground, leaving the natural maximum dutycycle of the part to be typically 95% for 200kHz operation.
LT1950
101950fa
APPLICATIO S I FOR ATIO
WU UU
LT1950 Input Supplies, VREF Output and GATE Enable
VIN is the main input supply for the LT1950. VIN2 is theinput supply for the LT1950 output driver. VIN2 can beprovided by shorting the VIN2 pin to the VIN pin or bygenerating VIN2 using the BOOST pin. Waveforms of VIN,VIN2, VREF and GATE switching are shown in Figures 2 and3. Figure 2 represents low VIN operation with VIN2 gener-ated using the B00ST pin. Figure 3 represents VIN = VIN2operation with the BOOST pin open circuit or shorted toground.
Low VIN Operation
The LT1950 can be configured to provide a minimum of10V GATE drive for an external N-channel MOSFET fromVIN voltages as low as 3V, if the BOOST pin is used togenerate a second supply at the VIN2 pin (see Figure 2 andApplications Information “ Generating VIN2 Supply UsingBOOST Pin”). The advantage of this configuration is that alower RDS(ON) is achieved for the external N-channelMOSFET, improving efficiency, versus a controller run-ning at 3V input without boosted gate drive. In addition,typical controllers running at low input voltages have thelimitation of only being able to use logic level MOSFETs.The LT1950 allows a greater range of usable MOSFETs.This versatility allows optimization of the overall powersupply performance and allows applications which wouldotherwise not be possible without a more complex topol-ogy. Figure 2 shows that for VIN above 2V, the internalswitcher at the BOOST pin is enabled. This switch gener-ates the VIN2 supply. As VIN2 ramps up above theundervoltage lockout threshold of 6.8V the 2.5V referenceVREF becomes active and powers up internal controlcircuitry. When VIN2 exceeds approximately 8V, the gatedriver is enabled. VIN2 is regulated between 10V and 11V,providing a supply to the LT1950 output driver to ensurea minimum of 10V drive at the GATE pin.
Figure 2. Low VIN Operation
Figure 3. VIN = VIN2 Operation
12
8
4
0
VIN
50µs/DIV
BOOST
VIN2
VIN
LT1950
L1
D1
C1
MIN3V
4
3
2
1
0
VREF
1950 F02
GATE
VIN2
BOOST
VIN2
10.28.56.85.13.4
5.0
2.5
0
10
5
0
VIN = VIN2
VREF
GATE
10µs/DIV
BOOST
VIN2
VIN
LT1950
TYPICAL START-UP INPUT>8.2V
C1
*
*BOOST PIN CAN BE LEFT OPEN OR
SHORTED TO GROUND
1950 F03
BOOST
VIN2
VIN = VIN2 Operation
If low VIN operation is not required below approximately8V on VIN the LT1950 can be configured to run without theuse of the BOOST pin by shorting the VIN2 pin to the VINpin. Figure 3 shows that both VIN and VIN2 must nowexceed 6.8V to activate the 2.5V VREF output and mustexceed approximately 8V to enable the output driver(GATE pin).
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Shutdown and Undervoltage Lockout
Figure 4 shows how to program undervoltage lockout(UVLO) for the VIN supply. Typically, UVLO is used insituations where the input supply is current limited, or hasa relatively high source resistance. A switching regulatordraws constant power from the source, hence sourcecurrent increases as source voltage drops. This looks likea negative load resistance to the source and can cause thesource to current limit or latch low under low sourcevoltage conditions. An internally set undervoltage lockout(UVLO) threshold prevents the regulator from operating atsource voltages where these problems might occur. Aninternal comparator will force the part into shutdownbelow the minimum VIN of 2.6V. This feature can be usedto prevent excessive discharge of battery-operated sys-tems. Alternatively, UVLO threshold is adjustable. Theshutdown threshold voltage of the SHDN pin is 1.32V.Forcing the SHDN pin below this 1.32V threshold causesVREF to be disabled and stops switching at the GATE pin.If the SHDN pin is left open circuit, a permanent 3µA flowsout of the pin to ensure that the pin defaults high to allownormal operation. Voltages above the 1.32V thresholdcause an extra 7µA to be sourced out of the pin, providingcurrent hysteresis. This can be used to set voltage hyster-esis of the UVLO threshold using the following equations:
RV V
A
RV
V VR
A
H L
H
17
21 32
1 321
3
=µ
=
+ µ
–
.( – . )
VH = Turn on thresholdVL = Turn off threshold
Example: switching should not start until the input isabove 11V and is to stop if the input falls below 9V.
VH = 11VVL = 9V
RV V
Ak
RV
V Vk
Ak
111 9
7286
21 32
11 1 32286
336
=µ
=
=
+ µ
=
–
.( – . )
Keep the connections from the resistors to the SHDN pinshort and make sure that the interplane or surface capaci-tance to the switching nodes are minimized. If high resis-tance values are used, the SHDN pin should be bypassedwith a 1nF capacitor to prevent coupling problems fromthe switch node.
Figure 4. Undervoltage Lockout
3µA 7µA1.32V
GND
VREF
VIN
R1
R2C1
+
1950 F04
LT1950
Generating VIN2 Supply Using BOOST Pin
The LT1950’s BOOST pin is used to provide a “boosted”11V supply at the VIN2 pin for VIN voltages as low as 3V.Since VIN2 supplies the output driver for the GATE pin ofthe IC, it is advantageous to generate a boosted VIN2. Thisarchitecture achieves high GATE drive for an external
LT1950
121950fa
N-channel power MOSFET even though VIN voltage is verylow. High GATE drive voltage reduces MOSFET RDS(ON),improves efficiency and increases the range of MOSFETsthat can be selected. A small switching regulator at theBOOST pin, with fixed current limit and fixed off time,generates the VIN2 supply. With an external inductorconnected between the BOOST pin and VIN (see Figure 5),the BOOST pin will draw current until approximately125mA is reached, turn off for 0.5µs and then turn back on.The cycle is repeated for as long as the switcher is enabled.By using a diode connected from BOOST to VIN2 and acapacitor from VIN2 to ground, energy from the externalinductor is transferred to the VIN2 capacitor during the off-time of the internal switcher. An auxiliary boost converteris realized providing a supply to the VIN2 pin. The typicalinductor current, VIN2 voltage and BOOST pin voltagewaveforms are shown in Figure 5. When VIN2 reaches 11V,the internal switcher is disabled. Since VIN2 supplies theoutput driver of the LT1950, switching at the GATE pin willeventually discharge the VIN2 capacitor until VIN2 reachesa lower level of approximately 10V. At this level the internalswitcher is re-enabled and switches until VIN2 returns to
APPLICATIO S I FOR ATIO
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Figure 6. Oscillator Frequency (fOSC) vs ROSC
ROSC (kΩ)50
FREQ
UENC
Y (k
Hz)
400 450 500
1950 F06
100 150 250200 300 350
500
450
400
350
300
250
200
150
100
11V. This hysteretic (burst mode) operation for the inter-nal switcher minimizes power dissipation from VIN.
The VREF output is a 2.5V reference supplying most of theLT1950 control circuitry. It is available for external usewith maximum current capability of 2.5mA. The pin shouldbe bypassed to ground using a 0.1µF capacitor. Internalundervoltage lockout thresholds for VIN and VIN2 of ap-proximately 2.6V and 6.8V respectively must be exceededbefore VREF becomes active.
Programming Oscillator Frequency
The oscillator frequency of the LT1950 is programmedusing an external resistor connected between the ROSC pinand ground. Figure 6 shows typical fOSC vs ROSC resistorvalues. The LT1950 is programmable for a free-runningoscillator frequency in the range of 100kHz to 500kHz.
Stray capacitance and potential noise pickup on the ROSCpin should be minimized by placing the ROSC resistor asclose as possible to the ROSC pin and keeping the area ofthe ROSC node as small as possible. The ground side of theROSC resistor should be returned directly to the GND(analog ground) pin.
Figure 5. VIN2 Generation Using the BOOST Pin
BOOST
VIN2
VIN
LT1950
L1
D1
C1
MIN3V
5µs/DIV
12
10
0.25
0
0.25
0
15
0
(V)
(V)
(A)
(A)
1950 F05
BOOST
VIN2
ID1
IL1
BOOST
VIN2
LT1950
131950fa
Synchronizing
The SYNC pin is used to synchronize the LT1950 mainoscillator to an external clock. The SYNC pin can be drivendirectly from a logic level output, requiring lessthan 0.8V for a logic level low and greater than 2.2V for alogic level high. Duty cycle must be between 10% and90%. When synchronizing the part, slope compensationwill be reduced by approximately SYNC f/fOSC. If thereduction of slope compensation affects performance,RSLOPE can be reduced to increase slope compensationand reestablish correct operation. If unused, the pin is leftopen or shorted to ground. If left open, be aware that theinternal pin resistance is 20k and board layout should bechecked to avoid noise coupling to the pin.
SLOPE COMPENSATION
Programmability
The LT1950 allows its default level of slope compensationto be easily increased by use of a single resistor connectedbetween the SLOPE pin and the VREF pin. The ability toadjust slope compensation allows the designer to tailor hisapplication for a wider inductor value range as well as tooptimize the loop bandwidth. A resistor, RSLOPE, con-nected between the SLOPE pin and VREF increases theLT1950 slope compensation from its default level to ashigh as 3X of default. The curves in Figure 7 show thetypical ISENSE maximum threshold vs duty cycle for vari-ous values of RSLOPE. It can be seen that slope compensa-tion subtracts from the maximum ISENSE threshold as dutycycle increases from 0%. For example, with RSLOPE open,ISENSE max threshold is 100mV at low duty cycle, but fallsto approximately 86mV at 80% duty cycle. This must beaccounted for when designing a converter to operate up toa maximum load current and over a given duty cycle range.The application and inductor value will define theminimum amount of slope compensation. Refer to the
APPLICATIO S I FOR ATIO
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Electrical Characteristics for 1X, 2X and 3X default slopecompensation vs RSLOPE.
Requirement in Current Mode Converters/Advantageof Adjustability
The LT1950 uses a current mode architecture to providefast response to load transients and to ease frequencycompensation requirements. Current mode switching regu-lators which operate with duty cycles above 50% and havecontinuous inductor current, must add slope compensa-tion to their current sensing loop to prevent subharmonicoscillations. (For more information on slope compensa-tion see Application Note 19). Typical current mode switch-ing regulators have a fixed internal slope compensation.This can place constraints on the value of the inductor. Iftoo large an inductor is used, the fixed internal slopecompensation will be greater than needed, causing opera-tion to approach voltage mode. If too small an inductor isused, the fixed internal slope compensation will be toosmall, resulting in subharmonic oscillations. The LT1950increases the range of usable inductor values by allowingslope compensation to be adjusted externally.
Figure 7. ISENSE Maximum Threshold vs Duty Cycle
DUTY CYCLE (%)0
I SEN
SE M
AX T
HRES
HOLD
(mV)
1950 F07
20 60 80
100
90
80
70
60
50
40
30
2040 100
RSLOPE = OPEN
RSLOPE = 8k
RSLOPE = 3.3k
LT1950
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Programming Leading Edge Blank Time
For PWM controllers driving external MOSFETs, noise canbe generated during GATE rise time due to various para-sitic effects. This noise can disturb the input to the currentsense comparator (ISENSE) and cause premature turn-offof the external MOSFET. The LT1950 provides program-mable leading edge blanking of the current sense com-parator to avoid this effect.
Blanking is provided in 2 phases: The first phase is duringGATE rise time. GATE rise times vary depending onMOSFET type. For this reason the LT1950 automaticallyblanks the current comparator output until the “leadingedge” of the GATE is detected. This occurs when the GATEvoltage has risen within 0.5V of the output driver supply(VIN2) or has reached its clamp level of 13V. The secondphase of blanking starts immediately after “leading edge”has been detected. This phase is programmable using aresistor (RBLANK) from the BLANK pin to ground. Typicalvalues for this portion of the blanking period are 110ns atRBLANK = 0Ω up to 290ns at RBLANK = 75k. Figure 8 showsblanking vs RBLANK. Blanking duration can be approxi-mated as:
BLANKING EXTENDEDR
knsBLANK( ) •= +
⎛
⎝⎜
⎞
⎠⎟110 60
25
Figure 8. Blanking Timing Diagram
1950 F04
RBLANK = 0Ω 0Ω < RBLANK < = 75k 60ns
(AUTOMATIC)LEADING
EDGEBLANKING
(DEFAULT)
EXTENDEDBLANKING
(PROGRAMMABLE)
EXTENDEDBLANKING
CURRENTSENSEDELAY
GATE
BLANKING
0 Xns (X + 110)ns [X + 110 + (60 • RBLANK/25k)]ns
Programming Volt-Second Clamp
The VSEC pin is used to provide an adaptive maximum dutycycle clamp for sophisticated control of the simplestforward converter topology (single primary-side switch).This adaptive maximum duty cycle clamp allows the use ofthe smallest transformers, MOSFETs and output rectifiersby addressing the biggest concern in single switch for-ward converter topologies - transformer reset. The sec-tion “Application Circuits-Forward Converter Applications”covers transformer reset requirements and highlights theadvantages of the LT1950 adaptive maximum duty cycleclamp. The programmable maximum duty cycle clamp iscontrolled by the voltage on the VSEC pin. As voltage on theVSEC pin increases within a specified range, maximumduty cycle decreases. By deriving VSEC pin voltage fromthe system input supply, a volt-second clamp is realized.Maximum GATE output duty cycle follows a 1/X relation-ship given by (105/VSEC)%. (see Maximum Duty Cycle vsVSEC Voltage graph in the Typical Performance Character-istics section). For example, if the minimum input supplyfor a forward converter application is 36V, the VSEC pin canbe programmed with a maximum duty cycle of 75% at1.4V. A movement of input voltage to 72V will lift the VSECpin to 2.8V, resulting in a maximum duty cycle of 37.5%.As the section on Forward Converter Applications willshow, transformer reset requirements are met with the
LT1950
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APPLICATIO S I FOR ATIO
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ability of the VSEC pin to follow input voltage and controlmaximum switch duty cycle.
Forward Converter Applications
The LT1950 provides sophisticated control of the simplestforward converter topology (single primary switch, see Q1Figure 11). A significant problem in a single switch for-ward converter topology is transformer reset. Optimumtransformer utilization requires maximum duty cycles.Unfortunately as duty cycles increase the transformerreset time decreases and reset voltages increase. Thisincreases the voltage requirements and stress on bothtransformer and switch. The LT1950 incorporates anadaptive maximum duty cycle clamp which controls maxi-mum switch duty cycle based on system input voltage.The adaptive clamp allows the converter to operate at upto 75% duty cycle, allowing 25% of the switching periodfor resetting the transformer. This results in greaterutilization of MOSFET, transformer and output rectifiercomponents. The VSEC pin can be programmed fromsystem input to adaptively control maximum duty cycle(see Applications Information “Programming Volt-Sec-ond Clamp” and the Maximum Duty Cycle vs VSEC Voltagegraph in the Typical Performance Characteristics section).
Figure 9. LT1950-Based Synchronous ForwardConverter Efficiency vs Load Current
LOAD CURRENT (A)0
EFFI
CIEN
CY (%
)
100
95
90
85
80
75
705 10 15 20
1950 F09
VIN = 48VVOUT = 3.3VfOSC = 235kHz
POWERMODULE
VOUT(100mV/DIV)
LT1950VOUT
(100mV/DIV)
500µs/DIV 1950 F10
Figure 10. Output Voltage Transient Responseto Load Steps (0A to 3.3A) LT1950 (Trace1)vs Power Module (Trace 2)
94% Efficient 3.3V, 20A Synchronous ForwardConverter
The synchronous forward converter in Figure 11 is basedon the LT1950 and uses MOSFETs as synchronous outputrectifiers to provide an efficient 3.3V, 20A isolated outputfrom 48V input. The output rectifiers are driven by theLTC1698 which also serves as an error amplifier andoptocoupler driver. Efficiency and transient responseare shown in Figures 9 and 10. Peak efficiencies of 94%and ultra-fast transient response are superior to presentlyavailable power modules. In addition, the circuit in Figure 11is an all-ceramic capacitor solution providing low outputripple voltage and improved reliability. The LT1950-basedconverter can be used to replace power module convertersat a much lower cost. The LT1950 solution benefits fromthermal conduction of the system board resulting inhigher efficiencies and lower rise in component tempera-tures. The 7mm height allows dense packaging and thecircuit can be easily adjusted to provide an output voltagefrom 1.23V to 15V. In addition, higher currents are achiev-able by simple scaling of power components. The LT1950-based solution in Figure 11 is a powerful topology forreplacement of a wide range of power modules.
LT1950
161950fa
Figure 11. 36V to 72V Input to 3.3V at 20A Synchronous Forward Converter
COMP
FB
ROSC
SYNC
SLOPE
VREF
SHDN
GND
VSEC
VIN
BOOST
PGND
GATE
VIN2
ISENSE
BLANK
LT19501
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD
CG
PGND
GND
OPTO
VCOMP
MARG
VFB=1.233V
FG
SYNC
VAUX
ICOMP
+ISNS
–ISNS
PWTOK
OVP
LTC16981
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
R4, 18k
R17, 210k
R14.7k
C10.1µF
C310nF
+VIN
+VIN
+VIN
–VINCOMP
UVCU11µF
R1827k
CS
10VBIAS 10VBIAS
10VBIAS
COMP
U4HCPL-M453
0.1µFC64.7µF
D3BAT760
R24.7k
100k100kR3
4.7k
UV
10VBIAS
Q4BC847BF
6
5
4
1
2
3
SYNC
FG
CG
7VBIAS
+V01
R141.2k
R162.8k
R154.7k
C9, 33nF
1µFX5R
R13270Ω
0.1µFR9470k
8
7
2
1
6
5
4
3
U2ALTC1693-1
U2BLTC1693-1
T1STG-0313W
Q2Si73802×
Q1Si4490 FG
Q3Si73802×
CG
L1C.PI-1365-1R2
C01100µFX5R4×
+V013.3V20A
SYNC
220pF 560Ω
T2
R7255Ω
D1BAS516
CS
RS0.015Ω
C41000pF
47Ω
D2BAT760
CIN2.2µF100VX5R
36VTO 72VINPUT
R618k
R5470k
APPLICATIO S I FOR ATIO
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LT1950
171950fa
SLOPE
VREF
ROSC
BLANK
SYNC
FB
COMP
VIN
VIN2
VSEC
SHDN
GATE
ISENSE
GND
PGND
LT19505
6
3
9
4
2
1
15
11
16
7
12
10
8
13
210k
27k
6.8k
0.1µF
+VIN
+VIN
–VIN
T1PA0581
+VOUT
CIN2.2µF100VX5R
36VTO 72VINPUT
10VBIAS
470k
18k
232k
24.9k
47µF
Si7450
+
–
330R
470pF18k
1µF 1µF
47k
4
3
5
2
1
8.2V
22k
U2LT1009
U3LT1797 FMMT625
OC1
1950 F13
47µH
0.015
MBR20200CT
Figure 13. 36V to 72V Input to 26V at 5A Nonsynchronous Forward Converter
LOAD CURRENT (A)1
EFFI
CIEN
CY (%
)
5
1950 F12
2 3 4
94
93
92
91
90
89
88
87
86
85
84
VIN = 48VVOUT = 26VfOSC = 235kHz
Figure 12. LT1950-Based NonsynchronousForward Converter Efficiency vs LoadCurrent (Figure 13 Circuit)
High Efficiency, Isolated 26V 5A Output,Nonsynchronous Forward Converter
Figure 13 illustrates a nonsynchronous forward converterbased on the LT1950 to provide a highly efficient, 26V 5Aisolated output from 48V input. The LT1950-based con-verter using a single switch topology and utilizing theLT1950s adaptive maximum duty cycle clamp is a simpleand highly optimized solution. Peak efficiencies of 92.8%(Figure 12) are achievable. Transformer and inductor arestandard components. The quarter brick sized DC/DCconverter (2.3" by 1.45") delivers over 125W and is only0.4" high. The 26V converter can be used as a “front line”(isolating) converter in telecom systems with multipleoutputs.
APPLICATIO S I FOR ATIO
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Figure 14. 4V to 36V Input, 12V/1.5A Automotive SEPIC Converter
COMP
FB
ROSC
SYNC
SLOPE
VREF
SHDN
GND
VSEC
VIN
BOOST
PGND
GATE
VIN2
ISENSE
BLANK
LT19501
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
R4133k
R100.010Ω
R318k
R516.2k
R771.5k
C12200pF
C510µF50V
VIN
VIN4V TO 36V
+VOUT
CIN10µF50VTDK
COUT47µF, 16VX5R, TDK×4
+VOUT12V, 1.5A
C20.1µF
C60.01µF
C34.7µF16V
C44.7µF16V
R847k
R9, 47Ω
R635.7k
R110.5k
R21.21k
3.3V BIAS
Q1Si7456
D2BAS516
L14.7µH
L2*
L3*
D1MBRD660CT
*L2, L3 (COUPLED INDUCTORS) VP5-0155
LT1950
191950fa
PACKAGE DESCRIPTIO
U
GN Package16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
GN16 (SSOP) 0502
1 2 3 4 5 6 7 8
.229 – .244(5.817 – 6.198)
.150 – .157**(3.810 – 3.988)
16 15 14 13
.189 – .196*(4.801 – 4.978)
12 11 10 9
.016 – .050(0.406 – 1.270)
.015 ± .004(0.38 ± 0.10)
× 45°
0° – 8° TYP.007 – .0098(0.178 – 0.249)
.053 – .068(1.351 – 1.727)
.008 – .012(0.203 – 0.305)
.004 – .0098(0.102 – 0.249)
.0250(0.635)
BSC
.009(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 TYP.0165 ± .0015
.045 ±.005
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES(MILLIMETERS)
NOTE:1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1950
201950fa
Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7417(408) 432-1900 FAX: (408) 434-0507 www.linear.com © LINEAR TECHNOLOGY CORPORATION 2003
LT/TP 0504 1K REV A • PRINTED IN USA
RELATED PARTSPART NUMBER DESCRIPTION COMMENTS
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LT1681/LT3781 Dual Transistor Synchronous Forward Controller Operation Up to 72V Maximum
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LT1725 General Purpose Isolated Flyback Controller No Optoisolator Required, Accurate Regulation Without User Trims,50kHz to 250kHz Switching Frequency, SSOP-16 Package
LTC1871 Wide Input Range, No RSENSETM Controller Operation as Low as 2.5V Input, Boost, Flyback, SEPIC
LT1910 Protected High Side MOSFET Driver 8V to 48V Supply Range, Protected –15V to 60V Supply Transient
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No RSENSE is a trademark of Linear Technology Corporation.