50MHz to 1000MHz High-Linearity, Serial/Parallel ... · The MAX2066 high-linearity digital...

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General Description The MAX2066 high-linearity digital variable-gain amplifi- er (VGA) is a monolithic SiGe BiCMOS attenuator and amplifier designed to interface with 50Ω systems oper- ating in the 50MHz to 1000MHz frequency range (See the Typical Application Circuit). The digital attenuator is controlled as a slave peripheral using either the SPI™- compatible interface or a parallel bus with 31dB total adjustment range in 1dB steps. An added feature allows “rapid-fire” gain selection between each of four steps, preprogrammed by the user through the SPI- compatible interface. The 2-pin control allows the user to quickly access any one of four customized attenua- tion states without reprogramming the SPI bus. Because each stage has its own RF input and RF output, this component can be configured to either optimize NF (amplifier configured first), or OIP3 (amplifier last). The device’s performance features include 22dB amplifier gain (amplifier only), 5.2dB NF at maximum gain (includes attenuator insertion loss), and a high OIP3 level of +42.4dBm. Each of these features makes the MAX2066 an ideal VGA for numerous receiver and transmitter applications. In addition, the MAX2066 operates from a single +5V supply with full performance, or a single +3.3V supply with slightly reduced performance, and has an adjustable bias to trade current consumption for linearity performance. This device is available in a compact 40- pin thin QFN package (6mm x 6mm) with an exposed pad. Electrical performance is guaranteed over the extended temperature range (T C = -40°C to +85°C). Applications IF and RF Gain Stages Cellular Band WCDMA and cdma2000 ® Base Stations GSM 850/GSM 900 EDGE Base Stations WiMAX and LTE Base Stations and Customer Premise Equipment Fixed Broadband Wireless Access Wireless Local Loop Military Systems Video-on-Demand (VOD) and DOCSIS ® - Compliant EDGE QAM Modulation Cable Modem Termination Systems (CMTS) RFID Handheld and Portal Readers Features 50MHz to 1000MHz RF Frequency Range Pin-Compatible Family Includes MAX2065 (Analog/Digital VGA) MAX2067 (Analog VGA) 20.5dB (typ) Maximum Gain 0.4dB Gain Flatness Over 100MHz Bandwidth 31dB Gain Range Supports Four “Rapid-Fire” Preprogrammed Attenuator States Quickly Access Any One of Four Customized Attenuation States Without Reprogramming the SPI Bus Ideal for Fast-Attack, High-Level Blocker Protection Prevents ADC Overdrive Condition Excellent Linearity (Configured with Amplifier Last) +42.4dBm OIP3 +65dBm OIP2 +19dBm Output 1dB Compression Point -68dBc HD2 -88dBc HD3 5.2dB Typical Noise Figure (NF) Fast, 25ns Digital Switching Very Low Digital VGA Amplitude Overshoot/ Undershoot Single +5V Supply (Optional +3.3V Operation) External Current-Setting Resistors Provide Option for Operating Device in Reduced-Power/ Reduced-Performance Mode MAX2066 50MHz to 1000MHz High-Linearity, Serial/Parallel-Controlled Digital VGA ________________________________________________________________ Maxim Integrated Products 1 Ordering Information 19-4057; Rev 0; 3/08 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. +Denotes a lead-free package. *EP = Exposed pad. T = Tape and reel. cdma2000 is a registered trademark of Telecommunications Industry Association. DOCSIS and CableLabs are registered trademarks of Cable Television Laboratories, Inc. (CableLabs®). PART TEMP RANGE PIN- PACKAGE MAX2066ETL+ -40°C to +85°C 40 Thin QFN-EP* MAX2066ETL+T -40°C to +85°C 40 Thin QFN-EP* SPI is a trademark of Motorola, Inc. Pin Configuration appears at end of data sheet.

Transcript of 50MHz to 1000MHz High-Linearity, Serial/Parallel ... · The MAX2066 high-linearity digital...

Page 1: 50MHz to 1000MHz High-Linearity, Serial/Parallel ... · The MAX2066 high-linearity digital variable-gain amplifi-er (VGA) is a monolithic SiGe BiCMOS attenuator and amplifier designed

General DescriptionThe MAX2066 high-linearity digital variable-gain amplifi-er (VGA) is a monolithic SiGe BiCMOS attenuator andamplifier designed to interface with 50Ω systems oper-ating in the 50MHz to 1000MHz frequency range (Seethe Typical Application Circuit). The digital attenuator iscontrolled as a slave peripheral using either the SPI™-compatible interface or a parallel bus with 31dB totaladjustment range in 1dB steps. An added featureallows “rapid-fire” gain selection between each of foursteps, preprogrammed by the user through the SPI-compatible interface. The 2-pin control allows the userto quickly access any one of four customized attenua-tion states without reprogramming the SPI bus.

Because each stage has its own RF input and RF output,this component can be configured to either optimize NF(amplifier configured first), or OIP3 (amplifier last). Thedevice’s performance features include 22dB amplifiergain (amplifier only), 5.2dB NF at maximum gain (includesattenuator insertion loss), and a high OIP3 level of+42.4dBm. Each of these features makes the MAX2066an ideal VGA for numerous receiver and transmitterapplications.

In addition, the MAX2066 operates from a single +5Vsupply with full performance, or a single +3.3V supplywith slightly reduced performance, and has anadjustable bias to trade current consumption for linearityperformance. This device is available in a compact 40-pin thin QFN package (6mm x 6mm) with an exposedpad. Electrical performance is guaranteed over theextended temperature range (TC = -40°C to +85°C).

ApplicationsIF and RF Gain StagesCellular Band WCDMA and cdma2000® BaseStationsGSM 850/GSM 900 EDGE Base StationsWiMAX and LTE Base Stations and CustomerPremise EquipmentFixed Broadband Wireless AccessWireless Local LoopMilitary SystemsVideo-on-Demand (VOD) and DOCSIS®-Compliant EDGE QAM ModulationCable Modem Termination Systems (CMTS)RFID Handheld and Portal Readers

Features♦ 50MHz to 1000MHz RF Frequency Range

♦ Pin-Compatible Family IncludesMAX2065 (Analog/Digital VGA)MAX2067 (Analog VGA)

♦ 20.5dB (typ) Maximum Gain

♦ 0.4dB Gain Flatness Over 100MHz Bandwidth

♦ 31dB Gain Range

♦ Supports Four “Rapid-Fire” PreprogrammedAttenuator States

Quickly Access Any One of Four Customized Attenuation States Without Reprogramming the SPI Bus

Ideal for Fast-Attack, High-Level Blocker ProtectionPrevents ADC Overdrive Condition

♦ Excellent Linearity (Configured with AmplifierLast)

+42.4dBm OIP3+65dBm OIP2+19dBm Output 1dB Compression Point-68dBc HD2-88dBc HD3

♦ 5.2dB Typical Noise Figure (NF)

♦ Fast, 25ns Digital Switching

♦ Very Low Digital VGA Amplitude Overshoot/Undershoot

♦ Single +5V Supply (Optional +3.3V Operation)

♦ External Current-Setting Resistors Provide Optionfor Operating Device in Reduced-Power/Reduced-Performance Mode

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________________________________________________________________ Maxim Integrated Products 1

Ordering Information

19-4057; Rev 0; 3/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,or visit Maxim’s website at www.maxim-ic.com.

+Denotes a lead-free package.*EP = Exposed pad.T = Tape and reel.

cdma2000 is a registered trademark of TelecommunicationsIndustry Association.

DOCSIS and CableLabs are registered trademarks of CableTelevision Laboratories, Inc. (CableLabs®).

PART TEMP RANGEPIN-PACKAGE

MAX2066ETL+ -40°C to +85°C 40 Thin QFN-EP*

MAX2066ETL+T -40°C to +85°C 40 Thin QFN-EP*

SPI is a trademark of Motorola, Inc.

Pin Configuration appears at end of data sheet.

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ABSOLUTE MAXIMUM RATINGS

+3.3V SUPPLY DC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, high-current (HC) mode, VCC = VDD = +3.0V to +3.6V, TC = -40°C to +85°C. Typical values are at VCC =VDD = +3.3V and TC = +25°C, unless otherwise noted.)

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functionaloperation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure toabsolute maximum rating conditions for extended periods may affect device reliability.

Note 1: Based on junction temperature TJ = TC + (θJC x VCC x ICC). This formula can be used when the temperature of the exposedpad is known while the device is soldered down to a printed-circuit board (PCB). See the Applications Information sectionfor details. The junction temperature must not exceed +150°C.

Note 2: Junction temperature TJ = TA + (θJA x VCC x ICC). This formula can be used when the ambient temperature of the PCB isknown. The junction temperature must not exceed +150°C.

Note 3: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a 4-layerboard. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.

Note 4: TC is the temperature on the exposed pad of the package. TA is the ambient temperature of the device and PCB.

VCC_ to GND ........................................................-0.3V to +5.5VVDD_LOGIC, DATA, CS, CLK,

SER/PAR..............................................-0.3V to (VCC_ + 0.3V)STATE_A, STATE_B, D0–D4 ....................-0.3V to (VCC_ + 0.3V)AMP_IN, AMP_OUT .................................-0.3V to (VCC_ + 0.3V)ATTEN_IN, ATTEN_OUT........................................-1.2V to +1.2VRSET to GND.........................................................-0.3V to +1.2VRF Input Power (ATTEN_IN, ATTEN_OUT).....................+20dBm

RF Input Power (AMP_IN)...............................................+18dBmContinuous Power Dissipation (Note 1) ...............................6.5WθJA (Notes 2, 3)..............................................................+38°C/WθJC (Note 3) ...................................................................+10°C/WOperating Temperature Range (Note 4) .....TC = -40°C to +85°CMaximum Junction Temperature .....................................+150°CStorage Temperature Range .............................-65°C to +150°CLead Temperature (soldering, 10s) .................................+300°C

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage VCC (Note 5) 3.0 3.3 3.6 V

Supply Current ICC 58 80 mA

LOGIC INPUTS (DATA, CS, CLK, SER/PAR, STATE_A, STATE_B, D0–D4)

Input High Voltage VIH 2 V

Input Low Voltage VIL 0.8 V

+5V SUPPLY DC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, VCC = VDD = +4.75V to +5.25V, TC = -40°C to +85°C. Typical values are at VCC = VDD = +5V andTC = +25°C, unless otherwise noted.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Supply Voltage VCC 4.75 5 5.25 V

Low-current (LC) mode 70 90Supply Current ICC

High-current (HC) mode 121 144mA

LOGIC INPUTS (DATA, CS, CLK, SER/PAR, STATE_A, STATE_B, D0–D4)

Input High Voltage VIH 3 V

Input Low Voltage VIL 0.8 V

Input Current Logic-High IIH -1 +1 µA

Input Current Logic-Low IIL -1 +1 µA

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+5V SUPPLY AC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, VCC = VDD = +4.75 to +5.25V, HC mode with attenuator set for maximum gain, 50MHz ≤ fRF ≤ 1000MHz,TC = -40°C to +85°C. Typical values are at VCC = VDD = +5.0V, HC mode, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unlessotherwise noted.) (Note 6)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RF Frequency Range fRF (Notes 5, 7) 50 1000 MHz

200MHz 20.5

350MHz, TC = +25°C 18.6 19.9 21.1

450MHz 19.5

750MHz 18.1

Small-Signal Gain G

900MHz 17.4

dB

Gain Variation vs. Temperature -0.004 dB/°C

Gain Flatness vs. FrequencyAny 100MHz frequency band from 50MHzto 500MHz

0.4 dB

200MHz 5.2

350MHz, TC = +25°C (Note 5) 5.5 6.6

450MHz 5.6

750MHz 6.2

Noise Figure NF

900MHz 6.4

dB

Total Attenuation Range 31 dB

Output Second-Order InterceptPoint

OIP2 POUT = 0dBm/tone, Δf = 1MHz, f1 + f2 65 dBm

200MHz 42.4

350MHz 40.4

450MHz 39.5

750MHz 37.3

POUT = 0dBm/tone,H C m od e, Δ f = 1M H z

900MHz 36.2

200MHz 40

350MHz 38

450MHz 37

750MHz 35

Output Third-Order InterceptPoint

OIP3

POUT = 0dBm/tone,LC mode, Δf = 1MHz

900MHz 33

dBm

+3.3V SUPPLY AC ELECTRICAL CHARACTERISTICS(Typical Application Circuit, VCC = VDD = +3.0V to +3.6V, TC = -40°C to +85°C. Typical values are at VCC = VDD = +3.3V, HC modewith attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless otherwise noted.) (Note 6)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

RF Frequency Range fRF (Notes 5, 7) 50 1000 MHz

Small-Signal Gain G 20 dB

Output Third-Order InterceptPoint

OIP3 POUT = 0dBm/tone, maximum gain setting 38 dBm

Noise Figure NF Maximum gain setting 5.6 dB

Total Attenuation Range 31 dB

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+5V SUPPLY AC ELECTRICAL CHARACTERISTICS (continued)(Typical Application Circuit, VCC = VDD = +4.75 to +5.25V, HC mode with attenuator set for maximum gain, 50MHz ≤ fRF ≤ 1000MHz,TC = -40°C to +85°C. Typical values are at VCC = VDD = +5.0V, HC mode, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unlessotherwise noted.) (Note 6)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Output -1dB Compression Point P1dB fRF = 350MHz, TC = +25°C (Note 5, 8) 17 18.7 dBm

Second HarmonicPOUT = +3dBm, fIN = 200MHz, TC = +25°C(Note 5)

-60 -68 dBc

Third HarmonicPOUT = +3dBm, fIN = 200MHz, TC = +25°C(Note 5)

-72 -88 dBc

Group Delay Includes EV kit PCB trace delay 0.8 ns

Input Return Loss 50Ω source, maximum gain setting 23 dB

Output Return Loss 50Ω load, maximum gain setting 18 dB

DIGITAL ATTENUATOR

Insertion Loss 2.5 dB

Input Second-Order InterceptPoint

IIP2PRF1 = 0dBm, PRF2 = 0dBm, Δf = 1MHz,f1 + f2

52 dBm

Input Third-Order Intercept Point IIP3 PRF1 = 0dBm, PRF2 = 0dBm, Δf = 1MHz 41 dBm

Attenuation Range 31.2 dB

Step Size 1 dB

Relative Step Accuracy 0.2 dB

Absolute Step Accuracy 0.45 dB

0dB to 16dB 4.8

24dB 8Insertion Phase Step fRF = 170MHz

31dB 10.8

d eg r ees

ET = 15ns 1.0Amplitude Overshoot/Undershoot

Between any twostates ET = 40ns 0.05

dB

31dB to 0dB 25Switching Speed

RF settled to within±0.1dB 0dB to 31dB 21

ns

Input Return Loss 50Ω source, maximum gain setting 19 dB

Output Return Loss 50Ω load, maximum gain setting 19 dB

SERIAL PERIPHERAL INTERFACE (SPI)

Maximum Clock Speed fCLK 20 MHz

Data-to-Clock Setup Time tCS 2 ns

Data-to-Clock Hold Time tCH 2.5 ns

Clock-to-CS Setup Time tES 3 ns

CS Positive Pulse Width tEW 7 ns

CS Setup Time tEWS 3.5 ns

Clock Pulse Width tCW 5 ns

Note 5: Guaranteed by design and characterization.Note 6: All limits include external component losses. Output measurements are performed at RF output port of the Typical

Application Circuit.Note 7: Operating outside this range is possible, but with degraded performance of some parameters.Note 8: It is advisable not to continuously operate the VGA RF input above +15dBm.

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GAIN vs. RF FREQUENCY

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RF FREQUENCY (MHz)

GAIN

(dB)

850450 650250

16

17

18

20

19

21

22

23

1550 1050

TC = +25°C

TC = -40°C

TC = +85°C

GAIN vs. RF FREQUENCY

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RF FREQUENCY (MHz)

GAIN

(dB)

850450 650250

16

17

18

20

19

21

22

23

1550 1050

VCC = 4.75V, 5.00V, 5.25V

ATTENUATOR RELATIVEERROR vs. RF FREQUENCY

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RF FREQUENCY (MHz)

RELA

TIVE

ERR

OR (d

B)

850450 650250

-0.50

0

0.50

1.00

-0.75

-0.25

0.25

0.75

-1.0050 1050

INPUT MATCH OVER ATTENUATORSETTING vs. RF FREQUENCY

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RF FREQUENCY (MHz)

INPU

T M

ATCH

(dB)

850450 650250

-30

-20

-10

0

-50

-40

50 1050

0dB1dB

31dB 4dB 2dB

8dB

16dB

OUTPUT MATCH OVER ATTENUATORSETTING vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OUTP

UT M

ATCH

(dB)

850450 650250

-15

-10

-5

0

-30

-25

-20

50 1050

0dB, 1dB, 2dB, 4dB

16dB, 31dB

8dB

REVERSE ISOLATION OVER ATTENUATORSETTING vs. RF FREQUENCY

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RF FREQUENCY (MHz)

REVE

RSE

ISOL

ATIO

N (d

B)

850450 650250

-50

-40

-30

-70

-60

50 1050

ATTENUATOR 0dB

ATTENUATOR 31dB

SUPPLY CURRENT vs. SUPPLY VOLTAGE

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VCC (V)

SUPP

LY C

URRE

NT (m

A)

5.1255.0004.875

110

120

130

140

150

1004.750 5.250

TC = +85°C

TC = +25°C

TC = -40°C

GAIN OVER ATTENUATOR SETTINGvs. RF FREQUENCY

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RF FREQUENCY (MHz)

GAIN

(dB)

850450 650250

-15

5

15

25

-2550 1050

ATTENUATOR ABSOLUTEERROR vs. RF FREQUENCY

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RF FREQUENCY (MHz)

ABSO

LUTE

ERR

OR (d

B)

850450 650250

-0.50

0

0.50

1.00

-0.75

-0.25

0.25

0.75

-2.00

-1.25-1.50

-1.75

-1.00

50 1050

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Typical Operating Characteristics(VCC = VDD = +5.0V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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OUTPUT IP3 vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

45

50

55

40

35

3050 450 850 1050650250

VCC = 4.75V

VCC = 5.25V

VCC = 5.00V

POUT = 0dBm/TONE

OUTPUT IP3 vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

45

50

55

40

35

3050 450 850 1050650250

TC = -40°C

TC = +85°C

TC = +25°C

POUT = 0dBm/TONE

OUTPUT P1dB vs. RF FREQUENCYM

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c14

RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

19

20

21

18

17

16

1550 450 850 1050650250

VCC = 4.75V

VCC = 5.25V

VCC = 5.00V

NOISE FIGURE vs. RF FREQUENCY

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RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

850 1050650450

7

8

9

6

5

4

3

250 250

VCC = 4.75V, 5.00V, 5.25V

ATTENUATOR PHASE CHANGEBETWEEN STATES vs. RF FREQUENCY

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RF FREQUENCY (MHz)

S21

PHAS

E CH

ANGE

(DEG

)

850450 650250

40

50

60

-10

30

20

10

0

50 1050

POSITIVE PHASE = ELECTRICALLY SHORTERREFERENCED TO HIGH GAIN STATE

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NOISE FIGURE vs. RF FREQUENCY

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RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

850450 650250

7

8

9

6

5

4

3

250 1050

TC = +25°C

TC = -40°C

TC = +85°C

OUTPUT P1dB vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

19

20

21

18

17

16

1550 450 850 1050650250

TC = +85°C

TC = +25°C

TC = -40°C

OUTPUT IP3 vs. ATTENUATOR STATE

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ATTENUATOR STATE (dB)

OUTP

UT IP

3 (d

Bm)

43

44

45

42

41

400 12 20 28 32244 168

TC = -40°C, +25°C, +85°C, LSB, USB

POUT = 0dBm/TONEfRF = 200MHz

2nd HARMONIC vs. RF FREQUENCYM

AX20

66 to

c18

RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

60

70

80

50

4050 450 850 1050650250

TC = +85°C

TC = +25°C

TC = -40°C

POUT = 3dBm

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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OIP2 vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OIP2

(dBm

)

250 450 650 850

75

55

70

65

60

40

50

45

50 1050

VCC = 4.75V

VCC = 5.00V

POUT = 0dBm/TONE

VCC = 5.25V

3rd HARMONIC vs. RF FREQUENCY

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RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

250 450 650 850

110

70

100

90

80

6050 1050

VCC = 4.75V VCC = 5.00V

VCC = 5.25VPOUT = 3dBm

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2nd HARMONIC vs. RF FREQUENCY

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RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

250 450 650 850

80

50

70

60

4050 1050

VCC = 5.25V POUT = 3dBm

VCC = 4.75VVCC = 5.00V

2nd HARMONIC vs. ATTENUATOR STATE

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ATTENUATOR STATE (dB)

2nd

HARM

ONIC

(dBc

)

71

68

66

70

69

67

650 8 16 24 3212 20 284

TC = -40°C

TC = +25°C

POUT = 3dBmfRF = 200MHz

TC = +85°C

3rd HARMONIC vs. RF FREQUENCY

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RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

110

80

60

100

90

70

50 450 850 1050650250

TC = +25°C

TC = +85°C

POUT = 3dBm

TC = -40°C

3rd HARMONIC vs. ATTENUATOR STATEM

AX20

66 to

c23

ATTENUATOR STATE (dB)

3rd

HARM

ONIC

(dBc

)

100

80

95

90

85

70

75

0 8 16 24 324 12 20 28

TC = -40°C

TC = +25°C

TC = +85°C POUT = 3dBmfRF = 200MHz

OIP2 vs. RF FREQUENCY

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RF FREQUENCY (MHz)

OIP2

(dBm

)

250 450 650 850

75

55

70

65

60

40

50

45

50 1050

TC = +25°C

TC = +85°C

TC = -40°C

POUT = 0dBm/TONE

OIP2 vs. ATTENUATOR STATE

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ATTENUATOR STATE (dB)

OIP2

(dBm

)

68

60

66

64

62

580 8 16 24 324 12 20 28

TC = +25°CTC = +85°C

TC = -40°C POUT = 0dBm/TONEfRF = 200MHz

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

8 _______________________________________________________________________________________

GAIN vs. RF FREQUENCY(ATTENUATOR ONLY)

RF FREQUENCY (MHz)

GAIN

(dB)

250 450 650 850

0

-4

-5

-1

-2

-3

50 1050

VCC = 4.75V, 5.00V, 5.25V

MAX

2066

toc2

8

GAIN vs. RF FREQUENCY(ATTENUATOR ONLY)

MAX

2066

toc2

7

RF FREQUENCY (MHz)

GAIN

(dB)

0

-4

-1

-2

-3

-550 450 850 1050650250

TC = +25°C

TC = +85°C

TC = -40°C

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, digital attenuator only, maximum gain, PIN = -20dBm and TC = +25°C, unless otherwise noted.)

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OUTPUT MATCH OVER ATTENUATOR SETTINGvs. RF FREQUENCY (LOW-CURRENT MODE)

RF FREQUENCY (MHz)

OUTP

UT M

ATCH

(dB)

1050650250

0

-30

-5

-15

-20

-10

-25

50 450 850

16dB, 31dB

8dB

0dB, 1dB, 2dB, 4dB

MAX

2066

toc3

3

INPUT MATCH OVER ATTENUATOR SETTINGvs. RF FREQUENCY (LOW-CURRENT MODE)

MAX

2066

toc3

2

RF FREQUENCY (MHz)

INPU

T M

ATCH

(dB)

850450 650250

-30

-20

-10

0

-50

-40

50 1050

0dB

1dB

31dB

4dB 2dB

8dB

16dB

GAIN vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

GAIN

(dB)

250 450 650 850

23

19

15

22

21

20

16

18

17

50 1050

VCC = 4.75V, 5.00V, 5.25V

MAX

2066

toc3

1

GAIN vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

GAIN

(dB)

23

15

21

19

17

22

20

18

16

50 450 850 1050650250

TC = -40°C

TC = +85°C

TC = +25°C

MAX

2066

toc3

0

SUPPLY CURRENT vs. SUPPLY VOLTAGE(LOW-CURRENT MODE)

VCC (V)

SUPP

LY C

URRE

NT (m

A)

4.875 5.000 5.125

85

55

75

65

4.750 5.250

TC = -40°C

TC = +85°C

TC = +25°C

MAX

2066

toc2

9

50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

_______________________________________________________________________________________ 9

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, LC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

NOISE FIGURE vs. RF FREQUENCY(LOW-CURRENT MODE)

MAX

2066

toc3

4

RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

850450 650250

4

5

6

8

7

9

10

11

3

250 1050

TC = +25°C

TC = -40°C

TC = +85°C

NOISE FIGURE vs. RF FREQUENCY(LOW-CURRENT MODE)

MAX

2066

toc3

5

RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

850450 650250

2

3

4

6

5

7

8

9

150 1050

VCC = 4.75V, 5.00V, 5.25V

OUTPUT P1dB vs. RF FREQUENCY(LOW-CURRENT MODE)

MAX

2066

toc3

6

RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

850450 650250

16

17

18

15

14

1350 1050

TC = +25°C

TC = -40°C

TC = +85°C

OUTPUT P1dB vs. RF FREQUENCY(LOW-CURRENT MODE)

MAX

2066

toc3

7

RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

850450 650250

16

17

18

15

14

1350 1050

VCC = 5.00V

VCC = 5.25V

VCC = 4.75V

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

10 ______________________________________________________________________________________

3rd HARMONIC vs. ATTENUATOR STATE(LOW-CURRENT MODE)

ATTENUATOR STATE (dB)

3rd

HARM

ONIC

(dBc

)

32

90

75

85

80

0 8 2816 24204 12

POUT = 3dBmfRF = 200MHz

MAX

2066

toc4

6

TC = -40°C

TC = +25°CTC = +85°C

OUTPUT IP3 vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

1050650250

45

25

30

35

40

50 450 850

POUT = 0dBm/TONE

TC = -40°C

TC = +85°C

TC = +25°C

MAX

2066

toc3

8

OUTPUT IP3 vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

1050650250

45

25

40

35

30

50 450 850

VCC = 4.75V

VCC = 5.25V

POUT = 0dBm/TONE

VCC = 5.00V MAX

2066

toc3

9

OUTPUT IP3 vs. ATTENUATOR STATE(LOW-CURRENT MODE)

MAX

2066

toc4

0

ATTENUATOR STATE (dB)

OUTP

UT IP

3 (d

Bm)

41

43

45

39

37

350 12 20 28 32244 168

TC = +85°C LSB

TC = -40°C LSB TC = -40°C USB

POUT = 0dBm/TONEfRF = 200MHz

TC = +25°C USB

TC = +25°C LSB

TC = +85°C USB

2nd HARMONIC vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

1050650250

80

40

70

60

50

50 450 850

POUT = 3dBm

TC = -40°C

TC = +25°C

TC = +85°C

MAX

2066

toc4

1

2nd HARMONIC vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

1050650250

80

40

70

60

50

50 450 850

POUT = 3dBm

VCC = 5.00V

VCC = 5.25V

VCC = 4.75V

MAX

2066

toc4

2

2nd HARMONIC vs. ATTENUATOR STATE(LOW-CURRENT MODE)

MAX

2066

toc4

3

ATTENUATOR STATE (dB)

2nd

HARM

ONIC

(dBc

)

71

72

73

70

69

68

670 12 20 28 32244 168

POUT = 3dBmfRF = 200MHz

TC = +25°C

TC = +85°CTC = -40°C

3rd HARMONIC vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

250 450 650 850 1050

110

60

90

100

80

70

50

POUT = 3dBm

MAX

2066

toc4

4

TC = -40°C

TC = +25°C

TC = +85°C

3rd HARMONIC vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

1050650250

110

60

100

90

80

70

50 450 850

POUT = 3dBm

VCC = 5.00V

VCC = 5.25V

VCC = 4.75V

MAX

2066

toc4

5

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, LC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

______________________________________________________________________________________ 11

Typical Operating Characteristics (continued)(VCC = VDD = +5.0V, LC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

OIP2 vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

OIP2

(dBm

)

1050650250

75

40

70

65

60

55

50

45

50 450 850

MAX

2066

toc4

7

TC = -40°C

POUT = 0dBm/TONE

TC = +85°C

TC = +25°C

OIP2 vs. RF FREQUENCY(LOW-CURRENT MODE)

RF FREQUENCY (MHz)

OIP2

(dBm

)

1050650250

75

40

70

65

60

55

50

45

50 450 850

MAX

2066

toc4

8

POUT = 0dBm/TONE

VCC = 5.00V

VCC = 4.75V

VCC = 5.25V

OIP2 vs. ATTENUATOR STATE(LOW-CURRENT MODE)

MAX

2066

toc4

9

ATTENUATOR STATE (dB)

OIP2

(dBm

)

66

68

70

64

62

600 12 20 28 32244 168

POUT = 0dBm/TONEfRF = 200MHz

TC = +25°C

TC = -40°C

TC = +85°C

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

12 ______________________________________________________________________________________

NOISE FIGURE vs. RF FREQUENCY

RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

250 450 650 850 1050

9

8

2

7

6

5

4

3

50

MAX

2066

toc5

5

TC = +85°CVCC = 3.3V

TC = +25°C

TC = -40°C

NOISE FIGURE vs. RF FREQUENCY

RF FREQUENCY (MHz)

NOIS

E FI

GURE

(dB)

250 450 650 850

9

7

3

2

8

6

5

4

50 1050

MAX

2066

toc5

6

VCC = 3.6V

VCC = 3.3VVCC = 3.0V

OUTPUT P1dB vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

250 450 650 850 1050

17

16

9

10

15

14

12

13

11

50

MAX

2066

toc5

7

TC = -40°CTC = +25°C

TC = +85°C

VCC = 3.3V

OUTPUT P1dB vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTP

UT P

1dB

(dBm

)

250 450 650 850 1050

17

16

9

10

15

14

12

13

11

50

MAX

2066

toc5

8

VCC = 3.3V

VCC = 3.6V

VCC = 3.0V

SUPPLY CURRENT vs. SUPPLY VOLTAGE

VCC (V)

SUPP

LY C

URRE

NT (m

A)

3.603.453.303.15

80

70

40

60

50

3.00

MAX

2066

toc5

0

TC = +25°C

TC = +85°C

TC = -40°C

GAIN vs. RF FREQUENCY

RF FREQUENCY (MHz)

GAIN

(dB)

1050650250

23

15

22

21

20

19

18

17

16

50 450 850

MAX

2066

toc5

1

TC = -40°C

VCC = 3.3V

TC = +85°C

TC = +25°C

GAIN vs. RF FREQUENCY

RF FREQUENCY (MHz)

GAIN

(dB)

1050650250

23

15

22

21

20

19

18

17

16

50 450 850

MAX

2066

toc5

2

VCC = 3.6V

VCC = 3.3V

VCC = 3.0V

INPUT MATCH OVER ATTENUATORSETTING vs. RF FREQUENCY

MAX

2066

toc5

3

RF FREQUENCY (MHz)

INPU

T M

ATCH

(dB)

850450 650250

-30

-20

-10

0

-50

-40

50 1050

0dB1dB

VCC = 3.3V

31dB 4dB2dB

8dB16dB

OUTPUT MATCH OVER ATTENUATORSETTING vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTP

UT M

ATCH

(dB)

250 450 650 850 1050

0

-5

-30

-10

-15

-20

-25

50

MAX

2066

toc5

4

VCC = 3.3V

0dB, 1dB, 2dB, 4dB

8dB16dB, 31dB

Typical Operating Characteristics (continued)(VCC = VDD = +3.3V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

______________________________________________________________________________________ 13

2nd HARMONIC vs. ATTENUATOR STATE

ATTENUATOR STATE (dB)

2nd

HARM

ONIC

(dBc

)

4 8 12 2016 24 28 32

70

50

65

60

55

0

MAX

2066

toc6

4

TC = +85°C

TC = -40°C

TC = +25°C

VCC = 3.3VfRF = 200MHzPOUT = 3dBm

3rd HARMONIC vs. RF FREQUENCY

RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

1050650250

110

50

100

80

60

90

70

50 450 850

MAX

2066

toc6

5

TC = +85°C

TC = -40°C

TC = +25°C

VCC = 3.3VPOUT = 3dBm

3rd HARMONIC vs. RF FREQUENCY

RF FREQUENCY (MHz)

3rd

HARM

ONIC

(dBc

)

250 450 650 850 1050

110

50

100

90

80

70

60

50

MAX

2066

toc6

6

VCC = 3.3V

VCC = 3.0V

POUT = 3dBm

VCC = 3.6V

OUTPUT IP3 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

250 450 650 850 1050

50

45

20

40

35

30

25

50

MAX

2066

toc5

9

TC = +25°C

TC = +85°C

TC = -40°C

VCC = 3.3VPOUT = 0dBm/TONE

OUTPUT IP3 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OUTP

UT IP

3 (d

Bm)

1050650250

50

45

40

20

35

30

25

50 450 850

MAX

2066

toc6

0

VCC = 3.3V

VCC = 3.6V

VCC = 3.0V

POUT = 0dBm/TONE

OUTPUT IP3 vs. ATTENUATOR STATE

MAX

2066

toc6

1

ATTENUATOR STATE (dB)

OUTP

UT IP

3 (d

Bm)

38

39

40

37

36

35

340 12 20 28 32244 168

TC = +85°C LSB

VCC = 3.3VfRF = 200MHz

POUT = 0dBm/TONE

TC = +25°C USB

TC = -40°C USB

TC = +25°C LSB

TC = +85°C USB

TC = -40°C LSB

2nd HARMONIC vs. RF FREQUENCY

RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

250 450 650 850 1050

80

30

70

60

50

40

50

MAX

2066

toc6

2

TC = -40°C

VCC = 3.3VPOUT = 3dBm

TC = +85°CTC = +25°C

2nd HARMONIC vs. RF FREQUENCY

RF FREQUENCY (MHz)

2nd

HARM

ONIC

(dBc

)

250 450 650 850 1050

80

30

70

60

50

40

50

MAX

2066

toc6

3

VCC = 3.0V

VCC = 3.3VVCC = 3.6V

POUT = 3dBm

Typical Operating Characteristics (continued)(VCC = VDD = +3.3V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

14 ______________________________________________________________________________________

3rd HARMONIC vs. ATTENUATOR STATE

ATTENUATOR STATE (dB)

3rd

HARM

ONIC

(dBc

)

32

85

70

80

75

0 8 16 24 284 12 20

MAX

2066

toc6

7TC = +25°C TC = +85°C

TC = -40°C

VCC = 3.3VfRF = 200MHzPOUT = 3dBm

OIP2 vs. RF FREQUENCY

RF FREQUENCY (MHz)OI

P2 (d

Bm)

1050650250

70

30

60

50

40

50 450 850

MAX

2068

toc6

8

TC = +25°C

TC = +85°C

TC = -40°C

VCC = 3.3VPOUT = 0dBm/TONE

OIP2 vs. RF FREQUENCY

RF FREQUENCY (MHz)

OIP2

(dBm

)

1050650250

70

30

60

50

40

50 450 850

MAX

2066

toc6

9

VCC = 3.3V

POUT = 0dBm/TONE

VCC = 3.6V

VCC = 3.0V

OIP2 vs. ATTENUATOR STATE

ATTENUATOR STATE (dB)

OIP2

(dBm

)

322416 20 28124 8

70

30

60

50

40

0

MAX

2066

toc7

0

TC = +25°C

TC = +85°CVCC = 3.3V

fRF = 200MHzPOUT = 0dBm/TONE

TC = -40°C

Typical Operating Characteristics (continued)(VCC = VDD = +3.3V, HC mode, digital attenuator set for maximum gain, PIN = -20dBm, fRF = 200MHz, and TC = +25°C, unless oth-erwise noted.)

Page 15: 50MHz to 1000MHz High-Linearity, Serial/Parallel ... · The MAX2066 high-linearity digital variable-gain amplifi-er (VGA) is a monolithic SiGe BiCMOS attenuator and amplifier designed

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

______________________________________________________________________________________ 15

Pin DescriptionPIN NAME DESCRIPTION

1, 16, 19, 22,24–28, 30,31, 33–36

GND Ground

2, 3, 32,37–40

GND Ground. See the Pin-Compatibility Considerations section.

4 DATA SPI Data Digital Input

5 CLK SPI Clock Digital Input

6 CS SPI Chip-Select Digital Input

7 VDD_LOGICDigital Logic Supply Input. Connect to the digital logic power supply, VDD. Bypass to GND with a10nF capacitor as close as possible to the pin.

8 SER/PARDigital Attenuator SPI or Parallel Control Selection Logic Input. Logic 0 = parallel control,Logic 1 = serial control.

9 STATE_A Digital Attenuator Preprogrammed Attenuation State Logic Input

State A State B Digital Attenuator

Logic = 0 Logic = 0 Preprogrammed State 1

Logic = 1 Logic = 0 Preprogrammed State 2

Logic = 0 Logic = 1 Preprogrammed State 3

10 STATE_B

Logic = 1 Logic = 1 Preprogrammed State 4

11 D4 16dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.

12 D3 8dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.

13 D2 4dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.

14 D1 2dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.

15 D0 1dB Attenuator Logic Input. Logic 0 = disable, Logic 1 = enable.

17 AMP_OUT Driver Amplifier Output (50Ω). See the Typical Application Circuit for details.

18 RSET Driver Amplifier Bias Setting. See the External Bias section.

20 AMP_IN Driver Amplifier Input (50Ω). See the Typical Application Circuit for details.

21 VC C _AMPDriver Amplifier Supply Voltage Input. Connect to the VCC power supply. Bypass to GND with1000pF and 10nF capacitors as close as possible to the pin with the smaller value capacitorcloser to the part.

23 ATTEN_OUT5-Bit Digital Attenuator Output (50Ω). Internally matched to 50Ω. Requires an external DCblocking capacitor.

29 ATTEN_IN5-Bit Digital Attenuator Input (50Ω). Internally matched to 50Ω. Requires an external DC blockingcapacitor.

— EPE xp osed P ad . Inter nal l y connected to GN D . C onnect E P to GN D for p r op er RF p er for m ance and enhanced ther m al d i ssi p ati on.

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50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

16 ______________________________________________________________________________________

Detailed DescriptionThe MAX2066 high-linearity digital variable-gain amplifi-er is a general-purpose, high-performance amplifierdesigned to interface with 50Ω systems operating in the50MHz to 1000MHz frequency range.

The MAX2066 integrates a digital attenuator to provide31dB of gain control, as well as a driver amplifier opti-mized to provide high gain, high IP3, low noise figure,and low power consumption. For applications that donot require high linearity, the bias current of the amplifi-er can be adjusted by an external resistor to furtherreduce power consumption.

The attenuator is controlled as a slave peripheral usingeither the SPI-compatible interface or a parallel buswith 31dB total adjustment range in 1dB steps. Anadded feature allows “rapid-fire” gain selectionbetween each of the four unique steps (prepro-grammed by the user through the SPI-compatible inter-face). The 2-pin control allows the user to quicklyaccess any one of four customized attenuation stateswithout reprogramming the SPI bus. Because eachstage has its own external RF input and RF output, thiscomponent can be configured to either optimize NF(amplifier configured first), or OIP3 (amplifier last). Thedevice’s performance features include 22dB stand-alone amplifier gain (amplifier only), 5.2dB NF at maxi-mum gain (includes attenuator insertion loss), and ahigh OIP3 level of +42.4dBm. Each of these featuresmakes the MAX2066 an ideal VGA for numerous receiv-er and transmitter applications.

In addition, the MAX2066 operates from a single +5Vsupply, or a single +3.3V supply with slightly reducedperformance, and has adjustable bias to trade currentconsumption for linearity performance.

5-Bit Digital Attenuator ControlThe MAX2066 integrates a 5-bit digital attenuator toachieve a high level of dynamic range. The digitalattenuator has a 31dB control range, a 1dB step size,and is programmed either through a dedicated 5-bitparallel bus or through the 3-wire SPI. See theApplications Information section and Table 1 for attenu-ator programming details. The attenuator can be usedfor both static and dynamic power control.

Driver AmplifierThe MAX2066 includes a high-performance driver witha fixed gain of 22dB. The driver amplifier circuit is opti-mized for high linearity for the 50MHz to 1000MHz fre-quency range.

Applications InformationSPI Interface and Attenuator Settings

The attenuator can be programmed through the 3-wireSPI/MICROWIRE™-compatible serial interface using 5-bit words. Twenty-eight bits of data are shifted in MSBfirst and framed by CS. When CS is low, the clock isactive and data is shifted on the rising edge of theclock. When CS transitions high, the data is latchedand the attenuator setting changes (Figure 1). SeeTable 2 for details on the SPI data format.

Table 1. Control Logic

SER/PAR ATTENUATOR

0 Parallel controlled

1 SPI controlled

MICROWIRE is a trademark of National Semiconductor Corp.

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______________________________________________________________________________________ 17

DATA

CLOCK

CS

tEWS tEW

tES

tCWtCS

DN

MSB LSB

D(N - 1) D1 D0

tCH

Figure 1. SPI Timing Diagram

Table 2. SPI Data FormatFUNCTION BIT DESCRIPTION

D27 (MSB) 16dB step (MSB of the 5-bit word used to program the digital attenuator state 4)

D26 8dB step

D25 4dB step

D24 2dB step

Digital Attenuator State 4

D23 1dB step (LSB)

D22

D21

D20

D19

Digital Attenuator State 3

D18

5-bit word used to program the digital attenuator state 3 (see the description for digitalattenuator state 4)

D17

D16

D15

D14

Digital Attenuator State 2

D13

5-bit word used to program the digital attenuator state 2 (see the description for digitalattenuator state 4)

D12

D11

D10

D9

Digital Attenuator State 1

D8

5-bit word used to program the digital attenuator state 1 (see the description for digitalattenuator state 4)

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18 ______________________________________________________________________________________

Table 2. SPI Data Format (continued)

FUNCTION BIT DESCRIPTION

D7

D6

D5

D4

D3

D2

D1

Reserved

D0 (LSB)

Bits D[7:0] are reserved. Set to logic 0.

Digital Attenuator SettingsUsing the Parallel Control Bus

To capitalize on its fast 25ns switching capability, theMAX2066 offers a supplemental 5-bit parallel controlinterface. The digital logic attenuator-control pins(D0–D4) enable the attenuator stages (Table 3).

Direct access to this 5-bit bus enables the user to avoidany programming delays associated with the SPIinterface. One of the limitations of any SPI bus is thespeed at which commands can be clocked into eachperipheral device. By offering direct access to the 5-bitparallel interface, the user can quickly shift betweendigital attenuator states as needed for critical “fast-attack” automatic gain-control (AGC) applications.

“Rapid-Fire” PreprogrammedAttenuation States

The MAX2066 has an added feature that provides“rapid-fire” gain selection between four prepro-

grammed attenuation steps. As with the supplemental5-bit bus mentioned above, this “rapid-fire” gain selec-tion allows the user to quickly access any one of fourcustomized digital attenuation states without incurringthe delays associated with reprogramming the devicethrough the SPI bus.

The switching speed is comparable to that achievedusing the supplemental 5-bit parallel bus. However, byemploying this specific feature, the digital attenuatorI/O is further reduced by a factor of either 5 or 2.5 (5control bits vs. 1 or 2, respectively) depending on thenumber of states desired.

The user can employ the STATE_A and STATE_B logic-input pins to apply each step as required (Table 4).Toggling just the STATE_A pin (one control bit) yieldstwo preprogrammed attenuation states; toggling boththe STATE_A and STATE_B pins together (two controlbits) yields four preprogrammed attenuation states.

Table 3. Digital Attenuator Settings (Parallel Control)

INPUT LOGIC = 0 (OR GROUND) LOGIC = 1

D0 Disable 1dB attenuator, or when SPI is default programmer Enable 1dB attenuator

D1 Disable 2dB attenuator, or when SPI is default programmer Enable 2dB attenuator

D2 Disable 4dB attenuator, or when SPI is default programmer Enable 4dB attenuator

D3 Disable 8dB attenuator, or when SPI is default programmer Enable 8dB attenuator

D4 Disable 16dB attenuator, or when SPI is default programmer Enable 16dB attenuator

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______________________________________________________________________________________ 19

As an example, assume that the AGC applicationrequires a static attenuation adjustment to trim out gaininconsistencies within a receiver lineup. The same AGCcircuit can also be called upon to dynamically attenuatean unwanted blocker signal that could de-sense thereceiver and lead to an ADC overdrive condition. In thisexample, the MAX2066 would be preprogrammed(through the SPI bus) with two customized attenuationstates—one to address the static gain trim adjustment,the second to counter the unwanted blocker condition.Toggling just the STATE_A control bit enables the userto switch quickly between the static and dynamic atten-uation settings with only one I/O pin.

If desired, the user can also program two additionalattenuation states by using the STATE_B control bit asa second I/O pin. These two additional attenuation set-tings are useful for software-defined radio applicationswhere multiple static gain settings may be needed toaccount for different frequencies of operation, or wheremultiple dynamic attenuation settings are needed toaccount for different blocker levels (as defined by multi-ple wireless standards).

External BiasBias currents for the driver amplifier are set and opti-mized through external resistors. Resistors R1 and R1Aconnected to RSET (pin 18) set the bias current for theamplifier. The external biasing resistor values can beincreased for reduced current operation at the expenseof performance. See Tables 6 and 7 for details.

+5V and +3.3V Supply VoltageThe MAX2066 features an optional +3.3V supply voltageoperation with slightly reduced linearity performance.

Pin-Compatibility ConsiderationsThe MAX2066 is a simplified version of the MAX2065analog/digital VGA. The MAX2066 does not contain ananalog attenuator, on-chip DAC, or internal reference.The associated input/output pins are internally connectedto ground (Table 5). Ground the unused input/output pinsto optimize isolation. (See the Typical Application Circuit.)

Layout ConsiderationsThe pin configuration of the MAX2066 has been opti-mized to facilitate a very compact physical layout of thedevice and its associated discrete components.

The exposed paddle (EP) of the MAX2066’s 40-pin thinQFN-EP package provides a low thermal-resistancepath to the die. It is important that the PCB on which theMAX2066 is mounted be designed to conduct heatfrom the EP. In addition, provide the EP with a low-inductance path to electrical ground. The EP must besoldered to a ground plane on the PCB, either directlyor through an array of plated via holes.

Table 4. Preprogrammed AttenuationState Settings

STATE_A STATE_B DIGITAL ATTENUATOR

0 0 Preprogrammed attenuation state 1

1 0 Preprogrammed attenuation state 2

0 1 Preprogrammed attenuation state 3

1 1 Preprogrammed attenuation state 4

Table 5. MAX2065/MAX2066 PinComparison

PIN MAX2065 MAX2066

2 VREF_SELECT GND

3 VDAC_EN GND

32 ATTEN1_OUT GND

37 ATTEN1_IN GND

38 VCC_ANALOG GND

39 ANALOG_VCTRL GND

40 VREF_IN GND

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20 ______________________________________________________________________________________

26

25

24

23

22

C8

21

GND

GND

CL

C6 C7

GND

ATTEN_OUT

GND

VCC_AMPVCC

Figure 2. Bandpass Filter to Reduce Amplitude Overshoot

Table 7. Typical Application Circuit Component Values (LC Mode)

DESIGNATION VALUE SIZE VENDOR DESCRIPTION

C1, C2, C7 10nF 0402 Murata Mfg. Co., Ltd. X7R

C3, C4, C6, C8, C9 1000pF 0402 Murata Mfg. Co., Ltd. C0G ceramic capacitors

L1 470nH 1008 Coilcraft, Inc. 1008CS-471XJLC

R1 24Ω 0402 Vishay 1%

R1A 0.01µF 0402 Murata Mfg. Co., Ltd. X7R

R2 (+3.3V applications only) 1kΩ 0402 Panasonic Corp. 1%

R3 (+3.3V applications only) 2kΩ 0402 Panasonic Corp. 1%

U1 —40-pin thin QFN-EP

(6mm x 6mm)Maxim Integrated

Products, Inc.MAX2066ETL+

Table 6. Typical Application Circuit Component Values (HC Mode)

DESIGNATION VALUE SIZE VENDOR DESCRIPTION

C1, C2, C7 10nF 0402 Murata Mfg. Co., Ltd. X7R

C3, C4, C6, C8, C9 1000pF 0402 Murata Mfg. Co., Ltd. C0G ceramic capacitors

L1 470nH 1008 Coilcraft, Inc. 1008CS-471XJLC

R1, R1A 10Ω 0402 Vishay 1%

R2 (+3.3V applications only) 1kΩ 0402 Panasonic Corp. 1%

R3 (+3.3V applications only) 2kΩ 0402 Panasonic Corp. 1%

U1 —40-pin thin QFN-EP

(6mm x 6mm)Maxim Integrated

Products, Inc.MAX2066ETL+

Amplitude Overshoot ReductionTo reduce amplitude overshoot during digital attenua-tor state change, connect a bandpass filter (parallelLC type) from ATTEN_OUT (pin 23) to ground. L =18nH and C = 47pF are recommended for 169MHzoperation (Figure 2). Contact the factory for recom-mended components for other operating frequencies.

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38D2

13

D0

15

36

GND

D1

14

37

GND

GND

16

35

AMP_

OUT

GND

17

34

GND

33

RSET

18

32

GND

19

AMP_

INGN

D

20

31

D3

12

39

D4

11

40

238SER/PAR ATTEN_OUT

6CS GND

25

247VDD_LOGIC GND

5CLK GND

26

4DATA GND

27

3GND

28

2ATTEN_IN

29

229STATE_A GND

2110STATE_B VCC_AMP

*IN LC MODE, R1A IS A 0.01μF CAPACITOR. SEE TABLE 7 FOR DETAILS.

1 30GNDGND

+

EP

DRIVER AMP

SPI I

NTER

FACE

DIGI

TAL

ATTE

NUAT

OR

GND

GND

GND

GND

GND

GND

GND

C1

C4

RF OUTPUT

L1

C3

VDD

C2

VCC

C7C6

VCC

R1

R1A*

R2

R3

C9

C8

RF INPUT

MAX2066

Typical Application Circuit

50MHz to 1000MHz High-Linearity,Serial/Parallel-Controlled Digital VGA

______________________________________________________________________________________ 21

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22 ______________________________________________________________________________________

GND

38

D2

13

D0

15

36

GND

D1GN

D

14

37

GND

GND

16

35

TQFNEXPOSED PAD ON BOTTOM.

CONNECT EP TO GND.

GND

17

34

GND

33

RSET

AMP_

OUT

18

GND

32

GND

19

AMP_

INGN

D

20

31D3

GND

12

39

D4GN

D

11

40

238SER/PAR ATTEN_OUT

6CS GND25

247VDD_LOGIC GND

5CLK GND26

4DATA GND27

3 GNDGND 28

2 ATTEN_INGND 29

229STATE_A GND

2110STATE_B VCC_AMP

1

TOP VIEW

30 GNDGND

+

DRIVER AMP

SPI I

NTER

FACE

DIGI

TAL

ATTE

NUAT

OR

MAX2066

Pin Configuration/Functional Block Diagram

Chip InformationPROCESS: SiGe BiCMOS

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Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses areimplied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23

© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

Package InformationFor the latest package outline information, go towww.maxim-ic.com/packages.

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

40 Thin QFN-EP T4066-3 21-0141