Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution...

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Transistor Scaling in the Innovation Era Mark Bohr Intel Senior Fellow Logic Technology Development August 15, 2011

Transcript of Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution...

Page 1: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Transistor Scaling

in the Innovation Era

Mark Bohr

Intel Senior Fellow

Logic Technology Development

August 15, 2011

Page 2: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

MOSFET Scaling

Bohr 8/15/11 2

R. Dennard, IEEE JSSC, 1974

Device or Circuit Parameter Scaling Factor

Device dimension tox, L, W 1/κ

Doping concentration Na κ

Voltage V 1/κ

Current I 1/κ

Capacitance εA/t 1/κ

Delay time/circuit VC/I 1/κ

Power dissipation/circuit VI 1/κ2

Power density VI/A 1

Classical MOSFET scaling was first described in 1974

Page 3: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Scaling Trends

Bohr 8/15/11 3

Transistor dimensions scale to improve performance,

reduce power and reduce cost per transistor

Page 4: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Transistor Scaling Trends

Bohr 8/15/11 4

Transistor dimensions scale to improve performance,

reduce power and reduce cost per transistor

Page 5: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

30 Years of MOSFET Scaling

Bohr 8/15/11 5

35 nm

Physical Gate Length: >1.0 um 35 nm

Electrical Channel Length: 1.0 um <20 nm

Gate Oxide Thickness: 35 nm 1.2 nm

Channel Doping: 4x1016 cm-3 ~1018 cm-3

Operating Voltage: 4.0 V 1.2 V

1 um

Dennard JSSC Paper

(1974)

Intel 65 nm Generation

(2005)

Page 6: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Gate Oxide Scaling Trends

Bohr 8/15/11 6

Scaling SiO2 gate oxide thickness ultimately

ran into leakage current limitations

Page 7: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Voltage Scaling and Leakage Trends

Bohr 8/15/11 7

VCC-VT overdrive needed for

good performance

VT scaling and resultant leakage

increase no longer tolerable due to

power constraint

Page 8: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

MOSFET Scaling

Bohr 8/15/11 8

Traditional MOSFET scaling ran out of steam in the early 2000s

Page 9: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Bohr 8/15/11 9

If old techniques are no longer effective,

Then innovate!

Page 10: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Lithography Trends

Bohr 8/15/11 10

If old techniques are no longer effective,

then innovate and find new techniques

Page 11: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Lithography Trends

Bohr 8/15/11 11

If old techniques are no longer effective,

then innovate and find new techniques

OPC

Phase shift

Immersion

Double pattern

Gridded layout

Page 12: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Lithography Trends

Bohr 8/15/11 12

If old techniques are no longer effective,

then innovate and find new techniques

OPC

Phase shift

Immersion

Double pattern

Gridded layout

Page 13: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Layout Restrictions

Bohr 8/15/11 13

65 nm Layout Style 32 nm Layout Style

• Bi-directional features

• Varied gate dimensions

• Varied pitches

• Uni-directional features

• Uniform gate dimension

• Gridded layout

Page 14: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

SRAM Cell Size Scaling

Bohr 8/15/11 14

Page 15: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

SRAM Cell Size Scaling

Bohr 8/15/11 15

32 nm, 0.171 um2

45 nm, 0.346 um2

65 nm, 0.570 um2

22 nm, 0.092 um2

Page 16: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

90 nm Strained Silicon Transistors

Bohr 8/15/11 16

High

Stress

Film

NMOS

SiGe SiGe

PMOS

SiN cap layer SiGe source-drain

Tensile channel strain Compressive channel strain

Strained silicon provided increased drive currents,

making up for lack of gate oxide scaling

Page 17: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

45 nm High-k Metal Gate Transistors

Bohr 8/15/11 17

65 nm Transistor 45 nm HK+MG

High-k + Metal Gate transistors

break through gate oxide scaling barrier

SiO2 dielectric Hafnium-based dielectric

Polysilicon gate electrode Metal gate electrode

Page 18: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Transistor Scaling and Performance

Bohr 8/15/11 18

Strained Silicon

HK + MG

Smaller

Faster

Transistors continue to get smaller and faster

through material and structure innovations

Page 19: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

32 nm System-on-Chip Transistors

Bohr 8/15/11 19

32 nm SoC transistors range from high performance to low power

Lower

Leakage

Page 20: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Performance vs. Power Landscape

Bohr 8/15/11 20

32 nm transistors offer a broad range of performance/power capabilities

32 nm 45 nm

Leakage

Power SP

LP

HP

65 nm

+22%

Frequency

10x

10x

Page 21: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Performance vs. Power Landscape

Bohr 8/15/11 21

32 nm transistors offer a broad range of performance/power capabilities

32 nm 45 nm

Leakage

Power SP

LP

HP

65 nm

+22%

Frequency

10x

10x

Server

Desktop

Laptop

Nettop/Netbook

Tablet

Pocket Device

Set Top Box

Embedded

Page 22: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

22 nm Tri-Gate Transistors

Bohr 8/15/11 22

Transistors continue to get smaller and faster

through material and structure innovations

Planar Transistor Tri-Gate Transistor

Page 23: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

22 nm Tri-Gate Transistors

Bohr 8/15/11 23

Steeper sub-threshold slope can provide lower leakage,

higher performance, and lower active power

Page 24: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

22 nm Tri-Gate Transistors

Bohr 8/15/11 24

Steeper sub-threshold slope can provide lower leakage,

higher performance, and lower active power

Page 25: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

22 nm Tri-Gate Transistors

Bohr 8/15/11 25

Unprecedented performance gain at low voltage,

~50% active power reduction at constant performance

Page 26: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Bohr 8/15/11 26

32 nm Planar Transistors 22 nm Tri-Gate Transistors

Page 27: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Transistor Evolution

Bohr 8/15/11 27

Strained Silicon

High-k Metal Gate

Tri-Gate

90 nm 65 nm 45 nm 32 nm 22 nm

2003 2005 2007 2009 2011

Invented

SiGe

Strained Silicon

2nd Generation

SiGe

Strained Silicon

2nd Generation

Gate-Last

High-k Metal Gate

Invented

Gate-Last

High-k Metal Gate

First to

Implement

Tri-Gate

Continued innovations in transistor materials and

structure are needed to continue scaling

Page 28: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Future III-V Transistor Options

Bohr 8/15/11 28

R. Pillarisetty, Intel, IEDM 2010

Goal of III-V FETs is to provide good performance at low voltage

Page 29: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Future III-V Transistor Options

Bohr 8/15/11 29

M. Radosavljevic, Intel, IEDM 2010

Goal of III-V FETs is to provide good performance at low voltage

Page 30: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Future Devices and Materials

Bohr 8/15/11 30

Needed Focus:

• New materials with bottoms-up

fill to improve R & C

• Higher mobility materials to

allow voltage scaling

• New device types, go vertical

• Exotic: graphene, CNT

QW III-V Device

5 nm5 nm

5nm

Nanowires

Graphene CNT

Page 31: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Research-Development-Manufacturing

Bohr 8/15/11 31

Research

Development

Manufacturing

Highly coordinated R-D-M pipeline is required to bring

innovative technologies to high volume manufacturing

Page 32: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Research-Development-Manufacturing

Bohr 8/15/11 32

Research

Development

Manufacturing Components Research

Logic Technology Development

Manufacturing Fabs

Highly coordinated R-D-M pipeline is required to bring

innovative technologies to high volume manufacturing

Page 33: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Research-Development-Manufacturing

Bohr 8/15/11 33

Research

Development

Manufacturing Components Research

Logic Technology Development

Manufacturing Fabs

Highly coordinated R-D-M pipeline is required to bring

innovative technologies to high volume manufacturing

Universities

Consortia

Government Labs

Suppliers/Vendors

Page 34: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Research-Development-Manufacturing

Bohr 8/15/11 34

Research

Development

Manufacturing Components Research

Logic Technology Development

Manufacturing Fabs

Highly coordinated R-D-M pipeline is required to bring

innovative technologies to high volume manufacturing

22 nm 14 nm 32 nm 10 nm

Universities

Consortia

Government Labs

Suppliers/Vendors

Page 35: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Research Collaboration

Bohr 8/15/11 35

Global research collaboration needed to identify breakthrough innovations

Page 36: Transistor Scaling in the Innovation Era - Intel® Software · 2013-02-26 · Transistor Evolution 27 Bohr 8/15/11 Strained Silicon High-k Metal Gate Tri-Gate 90 nm 65 nm 45 nm 32

Conclusion

Bohr 8/15/11 36

• Moore’s Law continues, but the formula for success is

changing

• Innovations in transistor materials and structures are

now essential to continue scaling

• A highly coordinated R-D-M pipeline is required to bring

innovative technologies from research to manufacturing


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