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Third Semester B.Tech. Degree Examination, November 2009(2008 Scheme)

Branch : Electronics & Communication08.303 : NETWORK ANALYSIS (TA)

Time : 3 Hours Max. Marks : 100

PART – A

Answer all questions

1. Find the expression for the current in an RC series circuit with f100C,10R μ=Ω=when a voltage u (t) = 100+100 sin 300 t is applied to this.

2. State and explain initial and final value theorem.

3. What are transmission parameters ? Find the transmission parameters of the networkV1 = 4 I1 + I2, I1 = V2 – 3 I2.

4. Briefly explain propagation constant and characteristic impedance.

5. Explain the terms Resonance, Bandwidth and Q factor.

6. Plot the following functions :

a) 5 u (t+4)

b) δ (t+5)

c) –5 r (t–2)

d) –4 u (t–5)

7. Plot XL, XC and R as functions of frequency ω for a series RLC circuit.

8. Explain how a given T-network is converted to πnetwork and vice-versa.

9. Define standard test signals and give their Laplace transforms.

Reg. No. : ....................................

Name : .........................................

P.T.O.

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10.What is the voltage VAB across the resistor shown ?

(10×4 = 40 Marks)

PART – B

Answer any two from each module.

MODULE – I

11. Replace the active network shown below with a Norton’s equivalent circuit at theterminals AB.

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12. Find the value of RL in the network that will absorb maximum power and specifythe value of power.

13. Determine the Laplace transform for the following:

a) 1) Voltage u (t) = 10 u (t) – 10 u(t – 2)

2) current i (t) = e–t – e–(t–2)

b) State and prove the initial and final value theorems, for Laplace transforms.(2×10 = 20 Marks)

MODULE – II

14. Obtain the transmission parameters of the circuit given below and find whether thenetwork is (a) reciprocal (b) symmetrical

15. In the circuit, the switch is closed at t = 0. Find the expression for the currentsupplied by the battery. What is the value of current at t = 0 and t = ∞ ?

16. Find ‘y’ parameters and ‘h’ parameters for the network having the following ‘z’parameters

Z11 = 23 ΩZ12 = Z21 = 20 ΩZ22 = 15 Ω (2×10 = 20 Marks)

MODULE – III

17. What are the steps in designing a Butterworth filter ? Illustrate. Define passband,

stopband and cutoff frequency.

18. For the circuit given below find (a) iR(f) (b) iL(t) (c) ic(t) and (d) resonant

frequency.

19. Explain resonance in series RLC circuit. Show the variation of I, Z, XL and X

C with

frequency. What is meant by Bandwidth, Q factor and selectivity ? Derive therelation between them. (2×10 = 20 Marks)

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Third Semester B.Tech. Degree Examination, November 2009 (2008 Scheme)

Branch : Electronics and Communication08.304 : PROGRAMMING IN C++ AND DATA STRUCTURES (TA)

Time : 3 Hours Max. Marks : 100

PART – A

Answer all questions. Each question carries 4 marks.

1. Explain ‘switch-case’ statement with the help of an example.

2. Explain how a pointer to function can be declared in C++. How a pointer variable isdifferent from ordinary variable ?

3. Differentiate between dynamic memory allocation and static memory allocation.

4. What is a friend class ? What are the access control a friend class has over themember function ?

5. What is polymorphism ? Explain briefly the methods for achieving polymorphism.

6. What is meant by a template ? Distinguish between a macro and a template.

7. What is a doubly linked list ? What are its advantages over singly linked list ?

8. Write a program to insert a node into a binary search tree.

9. Illustrate the basic operations of a queue using suitable examples.

10. What are the most important criteria for analyzing a sorting method ?(4×10=40 Marks)

Reg. No. : .....................................

Name : ..........................................

P.T.O.

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PART – B

Answer any two questions from each Module. Each question carries 10 marks.

Module – I

11. What is an object ? How it is created ? Explain the accessibility of data membersand member functions.

12. Explain how loops are executed in C++ programming with help of example programs.

13. Write a program to do matrix multiplication.

Module – II

14. What are the rules for overloading of operators ? Write a program to overload ‘=’(assignment operator).

15. Design a class computer which contains processor name, memory size and networkaddress as data members. Create another class which is one type of computer withthe above properties and include weight as an additional member. Create one moreclass palmtop which contains the properties of both Laptop and computer andincludes width and height as its data members. Write all suitable constructors for allclasses. Write a friend function to check whether the network address is assignedor not.

16. What is a virtual function ? What are the advantages of declaring a virtual functionin a program ? Explain how polymorphism is achieved using the keyword ‘virtual.

Module – III

17. Write a program that reverses a linear linked list.

18. Write a program to traverse a binary tree in inorder, postorder and preorder traversals.

19. Write a program to sort n numbers using shell sort. Analyze the program with anexample showing the intermediate results of all iterations. (10×6=60 Marks)

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Third Semester B.Tech. Degree Examination, November 2009 (2008 Scheme)

Branch : Electronics and Communication Engineering08.305 : ELECTRONICS CIRCUITS I (T)

Time : 3 Hours Max. Marks : 100

PART – A

Answer all questions. Each question carries 4 marks.

1. With schematic explain a Zener diode voltage regulator.

2. Derive expression for rise time of a low pass RC circuit.

3. Draw the output waveform and transfer characteristics of the following circuit.

4. Explain the need for biasing a transistor when used as an amplifier.

5. What is body effect in MOSFET ?

6. An FET source follower circuit uses an FET having gm = 2mS and rd = 50 K. Thesource resistance R

s = 1 K. Find the voltage gain and output resistance.

Reg. No. : .....................................

Name : ..........................................

P.T.O.

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7. Define parameters βf and Tf of a transistor.

8. Explain the biasing circuit used in class AB amplifier.

9. Derive expression for TUF of a full wave bridge rectifier.

10. A class-A series fed power amplifier is required to deliver a maximum power of20 W to a load of 8Ω . Calculate the required power supply voltage.

(10×4=40 Marks)

PART – B

Answer any 2 questions from each Module.

Module – I

11. Derive expression for ripple factor of full wave rectifier with Π section filter.

12. Derive the response of a high pass RC circuit to square wave input. Explain howthe circuit functions as differentiator.

13. Determine the transfer characteristics for the circuit shown assuming that the diodesare ideal. Plot Vo against Vi for the range of Vi from 0 to 50V.

(2×10=20 Marks)

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Module – II

14. a) What is thermal runaway ? How it can be avoided ?

b) For a fixed circuit, Vcc = 10 V, RB = 50 K and RC = 500 Ω . Assume silicontransistor with 50=β and V

BE = 0.7 V. Find the co-ordinates of the Q-point.

Draw the dc load line and locate the Q-point.

15. Using low freq. model, derive expression for AI, AV and Zi of an emitter followercircuit.

16. Derive expression for voltage gain and output resistance of a common sourceamplifier without source bypass capacitor. (2×10=20 Marks)

Module – III

17. Using hybrid- πmodel, derive expression for short circuit current gain of a commonemitter amplifier.

18. Explain the operation of a Class-β push pull amplifier . Derive expression forconversion efficiency.

19. The following low frequency parameters are known for a given transistor at roomtemperature (300 K) at I

C = 10 mA and V

CE = 8 V. hie = 500Ω , hoe = 2×10–4 ,sμ

hfe = 100 and hre = 10–4. At the same operating point MHz50fT = and Cc= 3pF.Calculate the values of hybrid- π parameters.

(2×10=20 Marks)

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Third Semester B.Tech. Degree Examination, November 2009(2008 Scheme)

Branch : Electronics and Communication08.306 – DIGITAL ELECTRONICS (T)

Time : 3 Hours Max. Marks : 100

PART – A

Answer all questions. Each question carries 4 marks.

1. Represent the decimal number 258710a) In BCD b) In excess three codec) As a hexadecimal number d) As a binary number

2. Show that the dual of the exclusive -OR is equal to its complement.

3. Determine the complement of BDACBAF += using

a) Demorgan’s law b) Using a Karnaugh map

4. What is an equivalence gate ? Explain.

5. Show the logic level ranges and DC noise margin for TTL.

6. Write down the characteristic equation of a T flip flop.

7. How do JK flip flops can be used as a Mod-8 counter.

8. Draw the block diagram of Mealy and Moore state machines.

9. What is meant by static hazards ? Draw the circuit with a static 1 hazard and static1 hazard free circuit.

10. Which are the differences among a truth table, state table, characteristic table andexcitation table ?

Reg. No. : ....................................

Name : .........................................

P.T.O.

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PART – B

Answer any two questions from each module. Each question carries 10 Marks.

MODULE – I

11. Simplify the following equation using Quine -Mcluskey minimization Technique

Y = f (u,w,x,y,z)

= Σ (1,3,4,6,9,11,12,14,17,19,20,22,25,27,28,30)

12. a) Construct a 4 to 16 line decoder with five 2 to 4 line decoder with enable.

b) Show how a full adder can be used to subtract.

13. a) Design a combinational circuit that compares two four bit numbers to check if

they are equal.

b) Write a note on VHDL.

MODULE – II

14. a) List various TTL parameters.

b) Describe a 4 bit universal shift register.

15. A sequential circuit has two flipflop (A and B), two inputs (x and y) and output (z).

The flip flop input functions and the circuit output function are as follows.

AyxKBByxKA

AXJBByxBJA

+===+=

ByxxyAZ +=

Obtain the logic diagram, state table, state diagram and state equations.

16. Design a counter that goes through states 0,2,4,6,0. If the control line is high and

goes through states 0,4,2,7,0 if the control line is low.

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MODULE – III

17. a) Construct the state diagram for a Mealy sequential circuit that will detect the

serial input sequence x = 010110. When the complete sequence has been detected,

then output Z = 1.

b) Distinguish between fundamental and pulse mode asynchronous sequential

circuits.

18. Draw the logic diagram of the product of Sums expression ( ) ( ).xxxxY 3221 +′+=Show that there is a static 0-hazard when x1 and x3 are equal to 0 and x2 goes from

0 to 1. Find a way to remove the hazard by adding one more OR gate.

19. a) Describe the purpose and draw block diagram of a data synchronizer.

b) Sketch and explain mixed operating mode asynchronous circuits.

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