Single electron devices: Fabrication techniques and ...

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Single electron devices: Fabrication techniques and applications 10/13/2005, week6

Transcript of Single electron devices: Fabrication techniques and ...

Page 1: Single electron devices: Fabrication techniques and ...

Single electron devices: Fabrication techniques and applications

10/13/2005, week6

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Single-electron transistorTwo tunnel barriers, each characterized by R, CA capacitively coupled gate

Σ= CeEC /2

gCCCC ++=Σ 21

Ω=≡>

>

k8.25/ 22,1 ehRR

TkE

Q

BCrequires

ii

iN VCCe

CeN ∑

ΣΣ+ ++=

2

21

1 )(µ

Σ∑++=

CeeVCN i

ii

2

21 )/(

µS µD

µN

µN+1

CgVg, (effective) offset charge

Σ+ ==−=∆ CeECNN /21 µµµ

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Coulomb blockade

EC

∆Vg=e/Cg

Coulomb diamonds

G=1/(R1+R2) outside blockade region

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Single electron box

Only one tunnel barrier.Discrete charge states.

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Quantum dot

TkE B>∆

Peak spacing includes ∆E termPeak height determined by coupling of the individual energy levels with S/D leads, and no longer uniform.

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Shadow Evaporation and Oxidation of Al

•Takes advantage of ease of growth of thin, high-quality Al2O3 for tunnel barriers.•Uses geometry to make smallest possible junctions.•Double-layer resist for e-beam lithography leads to overhang.•Evaporate at an angle. Then oxidize•for controlled length of time.•Second evaporation from a different angle completes the MIM tunnel junction.

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Matsumoto et al., APL 68 34 (1996).

Local oxidation

• Local electrochemical oxidation (anodization) used to convert continuous Ti strip into island + insulating tunnel barriers.• Painstaking fabrication, but payoff is SET with some room temperature functionality.

Ti

Ti

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Oxidation of Silicon image from Steve Chou, Princeton

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Even for an island as small as this, getting room temperature oscillations is a real challenge.

Oxidation of Silicon

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Tunnel barriers formed by Schottky barriers at the contacts

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Formation of quantum dots in 2DEG

Dots formed by depletion gates

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Clear technological challenges:

• Reliable fabrication of sub-10 nm structures with little or no variation for room temperature Coulomb blockade physics.• Tuning of “environmental characteristics” such as stray capacitance.• Reliable (self-controlling?) tunnel junctions.• Control of single electronic offset charges: individual chargeddefects can have effects identical to random offset voltages on gates!

Incentives:

• Dense integration.• Possible ultralow power operation • Ultimate limits of switching technology.

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Technology possibilities

Voltage-based SET logic:

• Very similar to typical CMOS logic: high voltage = logichigh; low voltage = logic low.• Nonmonotonic drain current as function of gate voltageopens up designs not possible with regular MOSFETdevices.

Charge based applications

• Nonvolatile memory• Electrometry• Metrology standards

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SET logic:

•High scalability even on an atomic scale.

•Low power consumption (power consumption roughly proportional to the electron number transferred from voltage source to ground).

•Circuit designers can treat SET-based logic gates like conventional logic gates. (Waser, p425-441.)

•SET characteristics (oscillatory response to VG) mean that one SET can sometimes replace more than one regular MOSFET.

C

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SET logic:

It is possible, with SETs, to achieve voltage gain. That is, the output voltage modulation of a circuit can be greater than the input voltage modulation:

g

outV V

VK∂∂

≡Cg/( C2 + Cg) -Cg/C1

KV>1, when Cg>C1 Zimmerli et al., APL 61, 2616 (1992).

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Multiple-valued logic

Inokawa, IEDM, 147, (2001)

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SET logic:

Problems:• For acceptable device performance,either temperatures must be very low, or devices must beextremely small….

• “Off”-state leakage leads to power consumption problemscomparable to highly-scaled CMOS.

• Background charges are also a serious problem.

• KV normally < 1

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Prognosis:

Single electron logic devices are unlikely to be the technology that replaces CMOS at the few nm scale, unless there is a major breakthrough in fabrication, performace, or architectures.

SEDs more likely to find applications in niche areas:• Nonvolatile memory• Electrometry• Metrology standards

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Single electron memory

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Single electron memory

•Discrete charge states.•Self limited process.

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Current standard: SET pump

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Cycling voltages around oneof the “triple points” in thediagram at the lower rightwill transfer a singleelectron through the pump, right toleft. (Thus a unidirectionalcurrent from left to right….)

Current standard: SET pump

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Current standard: SET pump

Actual experimental data on 2-gate pump agrees with this.

Current is nonzero only invicinity of “triple points”.Three junction two islandpump errors in experiment: ~1%.

Error sources:• thermal hopping• “missed” tunneling events• cotunneling

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Current standard: SET pump

One approach to dealingwith these errors: morejunctions!

State-of-the-art: NISTseven-junction six-gatepump.

Really designed for lowfrequency work - electroncounting rather thancurrent standard.

Errors with this set up: ~1.5 x 10-8. M.W. Keller et al., Science 285, 1706 (1999)

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Missing peaksRandomly formed multiple islands

No control over whether an electron can be added to a particular island.

Non closed CB diamonds

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Capacitance standard

Even slow pumping of electrons can bevery useful.

Capacitance standard:

• Make a capacitor.• Pump a precisely known number ofelectrons onto the capacitor (e.g. withthe 7-junction pump).• Measure the capacitor voltageprecisely.• Q = CV gives the capacitance.

M.W. Keller et al., Science 285, 1706 (1999)

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In another word, potential >GHz bandwidth for single electron detection.

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Scanning SET electrometer

One adaptation of thisis to place the islandon a movable tip, andscan it over a surface.

Result: the SETscanning electrometer(SETSE).

Yoo, Science, 276, 579 (1997)

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Scanning SET electrometer

Individual charged Si dopant atoms

SETSE is easily sensitiveenough to see surface charge fluctuations caused by individual dopant atoms in semiconductor.

Problems:

• slow• fragile• requires quite low T.

Yoo, Science, 276, 579 (1997)

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SET as displacement meter

G sensitive to CgVg,Cg determined by spacing between the SET island and device under test.

Sensitivity of

Hz/m102 15−×

has been obtained.

Knobel, Nature, 424, 291 (2003)

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Calibration not needed.

N, # of junctions

Need calibration to determine Ec, the charging energy.

Pekola, PRL, 73, 2903

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