Sbmc Chapitre 2 - Etude Du ΜC STM32 - Copie

SYSTÈME A BASE DES MICROCONTROLLEURSCHAPITRE 2: ETUDE DU

MICROCONTRÔLEUR STM32MOHAMED MASMOUDI3ÈME ANNÉE INFO - SLE

ECOLE NATIONALE DES SCIENCES DE L’[email protected]

Mohamed MASMOUDI 2014-2015ENS

1Mohamed MASMOUDI 2014-2015 3ème année INFO - SLE

Plan

Cœur ARM

Périphériques (GPIO as example)

Périphériques (RCC)

USING LIBRARY

2

Mohamed MASMOUDI 2014-2015 3ème année INFO - SLE

Why ARM


3

One of the most licensed and thus widespread processor cores in the world Used in PDA, cell phones, multimedia players, handheld game console, digital TV

and cameras

75% of 32-bit embedded processors

Used especially in portable devices due to its low power consumption andreasonable performance

CORTEX-XX


4

Cortex-X N

X :Profile (A,R,M) N: Performance level (0..9)

Cortex-M

Thumb-2NVICMPU

3 stages pipeline

0,9 à 1,25 DMIPS 1,6 DMIPS 1,6 à 2,5 DMIPS

Cortex-R

Thumb/Thumb-2MPU

FP Unit

8 stages Pipeline

Fre

qu

ency

(M

Hz)

375

47

5

2

000

Cortex-A

Thumb/Thumb-2MMUDSP

...

13 stages PipelineMulti-core (1-4)

Manufacturers Cortex-M3

STM32 L1xxSTM32 F1xxSTM32 F2xx

Stellaris3x

LPC17x, LPC3x

SAM3x

LM3S8x

Analog Devices ADuCRF101

Toshiba TX03

Samsung S3FM

CORTEX M3


5

Hierarchical processor integrating core and advanced system peripherals

Cortex-M3 Processor

CM3 Core:Harvard (Separate Busses)

32 Bits Register & ALUs.

Interrupt controller:-1 to 240 interrupts.- 256 Priority levels- NMI-SysTick

WICWakup Int. controller:Wakeup from Sleep

modes throuht interrupts & exceptions

Debug Access port

4 Watch points

Multi layer Bus Matrix (Paralleltransfers between core, memory, & peripherals

8 Hardware Breakpoints

Integrated Trace module: Low cost (2 wires)

Embedded Trace MacroCell

Optional Memory Protection Unit (8 regions)

CORTEX M4


6

CORTEX M


7

3-stage pipeline:

Fetch, Decode and & Execute (with static branch prediction)

Simple adressing: linear 4GByte address space

Memory mapping


8

BOOT MODES 1/2


9

BOOT MODES 2/2


10

Power Supply


11

LOW POWER MODES


12

LOW POWER MODES


13

LOW POWER MODES


14

LOW POWER MODES


15

LOW POWER MODES


16

Plan

Cœur ARM



USING LIBRARY

17


Périphériques


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GPIO Registry mapping


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20



21

For details refer to the third chapter.

Plan

Cœur ARM



USING LIBRARY

22


RESET Circuit


23

CLOCK SCHEMA


24

Plan

Cœur ARM



USING LIBRARY

25


CMSIS


26

Standard library


27

Sbmc Chapitre 2 - Etude Du ΜC STM32 - Copie

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