Printed Electronics: Device Production, Characterisation ...

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Printed Electronics: Device Production, Printed Electronics: Device Production, Characterisation and Simulation Characterisation and Simulation D. M . Taylor School of Electronic Engineering Bangor University Dean Street, Bangor, Gwynedd LL57 1UT, UK IeMRC Meeting, Loughborough 19 th March 2012

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Slide 1D. M . Taylor School of Electronic Engineering
Bangor University Dean Street, Bangor, Gwynedd LL57 1UT, UK
IeMRC Meeting, Loughborough 19th March 2012
1
(RoVaCBE)
Parameter extraction with Silvaco UTMOST 4
Inverter characteristics
Conclusions
Winding zone
Magnification x 200
Magnification x 60
Magnification x 200
50 μm lines,
gap 80 μm
250 μmSource/Drain W/L = 16
μ=0.09 cm2/Vs VT = 10V On/Off ratio ~ 103
RR--22--R Vacuum Deposition ProcessR Vacuum Deposition Process
Pentacene TFTs on PENPentacene TFTs on PEN
-5.E-06
-4.E-06
-3.E-06
-2.E-06
-1.E-06
VD (V)
Vg=-10V Vg=-20V Vg=-30V Vg=-40V Vg=-50V
-12
-11
-10
-9
-8
-7
-6
-5
VG (V)
Good saturation, no hysteresis, on/off ratio ~105
0.0E+00
-50 -40 -30 -20 -10 0 10 20 VG (V)
ID 0.
0.00
0.01
0.02
0.03
0.04
0.05
VG (V)
M ob
ili ty
Mobility extracted from
DNTT Devices on HMDSDNTT Devices on HMDS--treated Si/SiOtreated Si/SiO22 S
S
Effect of purificationEffect of purification
11052 •25 Devices •Average Mobility : 0.47 cm2/Vs •Median Mobility : 0.43 cm2/Vs •Standard Deviation : 0.13 cm2/Vs
11053 •31 Devices •Average Mobility : 0.36 cm2/Vs •Median Mobility : 0.34 cm2/Vs •Standard Deviation : 0.09 cm2/Vs
11055 •32 Devices •Average Mobility : 0.54 cm2/Vs •Median Mobility : 0.39 cm2/Vs •Standard Deviation : 0.20 cm2/Vs
S
S
•PEN substrate, •aluminium gate, •acrylate dielectric •Gold S/D
•29 Devices •Average Mobility : 0.4 cm2/Vs •Median Mobility : 0.4 cm2/Vs •Standard Deviation : 0.13 cm2/Vs
DNTT Devices on PENDNTT Devices on PEN S
S
Device Modelling with UTMOST 4Device Modelling with UTMOST 4 Parameter Extraction
Universal Organic TFT Model (Level=37)
The UOTFT model: An extension of unified charge control model previously used for a-Si and poly-Si TFTs.
Based on: Operation in accumulation mode in the presence of an exponential density of states and interface traps Unified expression for gate induced charge in the conductive channel Unified charge-based description of mobility and drain-source current A universal power mobility law valid in all operation regions
Device Modelling with UTMOST 4Device Modelling with UTMOST 4 Parameter Extraction
Unified Charge Description of Mobility
( ) 864.150
μACC characteristic effective mobility in channel VACC characteristic voltage of the effective mobility VO characteristic voltage of the trap density of
states VT zero bias threshold voltage γ power law mobility parameter
VG
VDIDMISFET
Device Modelling with UTMOST 4Device Modelling with UTMOST 4 Optimisation Routine
Set: TINS, εINS, εS
Extract: VO, VT, μACC and γ from ID-VG plots at low VD
Extract: RS, ASAT and λ from ID-VG plots at high VD
Extract: MSAT,RD from ID-VD plots
Iterate to obtain best fit using different optimisation procedures
Genetic
Marquand-Levenberg
Simulations Evaporated pentacene bottom-gate TFT on acrylate dielectric
Key parameters μACC = 1.22 x 10-4 cm2/Vs ; VACC = 1.12 V; γ = 1.80; VT = -2.5 V; VO = 0.5 V; RS = 0; RD = 2.47 MΩ
Oxford 01 Newfit
I D (A
Vd= -10V (exp) -20V -30V Vd= -10V (sim) -20V -30V
Oxford 01 Newfit
VG (V)
-10
-9
-8
-7
-6
-5
-4
Lo g 1
0(I D /A
VD (V)
ID (A
Transfer Characteristics Output Characteristics
VD (V)
ID (A
) Vg=0V -10V -20V -30V -40V -50V -60V
Key parameters μACC = 1.02 x 10-3 cm2/Vs ; VACC = 1.00 V; γ = 0.93; VT = -4.48 V; VO = 0.013 V; RS = 0; RD = 0 Ω
Simulations Spin-coated top-gate TFT with Teflon dielectric
Output CharacteristicsDevice 08
VG (V)
ID (A
Transfer Characteristics
-VDD
0
VG (V)
Scalability of Device Characteristic Spin-coated top gate TFT with Teflon dielectric
Device07 Device08
-40
-35
-30
-25
-20
-15
-10
-5
0
Vin (V)
Vo ut
Vdd=-10V -20V -30V -40V
Inverter based on DNTT TFT on PENInverter based on DNTT TFT on PEN
-VDD
0
Vin (V)
V ou
t ( V)
nVdd = -20V -40V -60V
Inverter based on DNTT TFT on PENInverter based on DNTT TFT on PEN Scalability check
EP Device 9
VG (V)
Device 9 Device 10 (norm)
Inverter based on DNTT TFT on PENInverter based on DNTT TFT on PEN Simulation (lines) Simulation (lines) vsvs ExperimentalExperimental (points)
-60
-50
-40
-30
-20
-10
0
V o ut
Mobility in all vacuum prepared DNTT TFTs ~ 0.4 cm2/Vs
High on/off ratio 103 – 105
Early attempts at circuit simulation encouraging
Very good inverter action using DNTT TFTs
Device fabrication now needs to be optimised
Improvements required in parameter extraction and circuit simulation
Acknowledgements Acknowledgements
Manchester Steve Yeates John Morrison
Funders and Industrial AdvisersFunders and Industrial Advisers