October 2010 Doc ID 17445 Rev 2 1/12

12

STN4NF20LN-channel 200 V, 1.1 Ω, 1 A SOT-223

low gate charge STripFET™ II Power MOSFET

Features

■ 100% avalanche tested

■ Low gate charge

■ Exceptional dv/dt capability

ApplicationSwitching applications

DescriptionThis N-channel 200 V realized with STMicroelectronics unique STripFET™ process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high efficiency isolated DC-DC converters.

Figure 1. Internal schematic diagram

Order code VDSSRDS(on) max.

ID

STN4NF20L 200 V < 1.5 Ω 1 A

SOT-223

12

2

3

Table 1. Device summary

Order code Marking Package Packaging

STN4NF20L 4NF20L SOT-223 Tape and reel

www.st.com

Contents STN4NF20L

2/12 Doc ID 17445 Rev 2

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

STN4NF20L Electrical ratings

Doc ID 17445 Rev 2 3/12

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VGS Gate-source voltage ± 20 V

ID Drain current continuous TC = 25 °C 1 A

ID Drain current continuous TC = 100 °C 0.63 A

IDM (1)

1. Pulse width limited by safe operating area.

Drain current pulsed 4 A

PTOT(2)

2. This value is rated according to Rthj-amb ≤ 10 sec.

Total dissipation at TC = 25 °C 3.3 W

dv/dt (3)

3. Isd ≤ 1 A, di/dt ≤ 200 A/µs, VDD ≤ 80% V(BR)DSS.

Peak diode recovery voltage slope 20 V/ns

Tj

Tstg

Operating junction temperatureStorage temperature

- 55 to 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

Rthj-amb(1)

1. When mounted on 1 inch² FR-4 board, 2 oz. Cu, (t < 10 sec).

Thermal resistance junction to ambient38 °C/W

Rthj-amb(2)

2. When mounted on 1 inch² FR-4 board, 2 oz. Cu, (t > 10 sec).

62.5 °C/W

Table 4. Thermal data

Symbol Parameter Value Unit

IAR Avalanche current, repetetive or not repetetive(1)

1. Pulse width limited by TJMAX.

1 A

EAS Single pulse avalanche energy (2)

2. Starting Tj = 25 °C, ID = IAR, VDD = 50 V.

90 mJ

Electrical characteristics STN4NF20L

4/12 Doc ID 17445 Rev 2

2 Electrical characteristics

(Tcase = 25 °C unless otherwise specified)

Table 5. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-source breakdown voltage

ID = 1 mA, VGS = 0 200 V

IDSSZero gate voltage

drain current (VGS = 0)

VDS = Max rating

VDS = Max rating, TC=125 °C

1

50

µA

µA

IGSSGate-body leakage

current (VDS = 0)VGS = ± 20 V, VDS=0 ± 100 nA

VGS(th) Gate threshold voltage VGS = VDS, ID = 250 µA 1 2 3 V

RDS(on)Static drain-source on resistance

VGS = 10 V, ID = 0.5 A

VGS = 5 V, ID = 0.5 A

1.1

1.13

1.5

1.55

ΩΩ

Table 6. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss

Coss

Crss

Input capacitance

Output capacitanceReverse transfer capacitance

VDS = 25 V, f = 1 MHz,

VGS = 0-

15030

4

-pFpF

pF

RgInstrinsic gate resistance

f=1 MHz open drain - 5.5 - Ω

Qg

Qgs

Qgd

Total gate chargeGate-source charge

Gate-drain charge

VDD = 160 V, ID = 1 A,VGS = 10 V

(see Figure 13)

-0.92.6

6.9

-nCnC

nC

Table 7. Switching times

Symbol Parameter Test conditions Min. Typ. Max Unit

td(v)

trtf

tc(off)

Voltage delay time

Voltage rise time

Current fall timeCrossing time

VDD = 100 V, ID = 0.5 A, RG = 4.7 Ω, VGS = 10 V

(see Figure 12)

-

3.6

2

10.415.4

-

ns

ns

nsns

STN4NF20L Electrical characteristics

Doc ID 17445 Rev 2 5/12

Table 8. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD

ISDM (1)

1. Pulse width limited by safe operating area

Source-drain current

Source-drain current (pulsed)

-14

AA

VSD (2)

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Forward on voltage ISD = 1 A, VGS = 0 - 1.6 V

trrQrr

IRRM

Reverse recovery timeReverse recovery charge

Reverse recovery current

ISD = 1 A, di/dt = 100 A/µsVDD = 60 V

(see Figure 14)

-5190

3.5

nsnC

A

trrQrr

IRRM

Reverse recovery time

Reverse recovery charge

Reverse recovery current

ISD = 1 A, di/dt = 100 A/µs

VDD = 60 V, Tj = 150 °C

(see Figure 14)

-

56

105

3.7

ns

nC

A

Electrical characteristics STN4NF20L

6/12 Doc ID 17445 Rev 2

2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance

Figure 4. Output characteristics Figure 5. Transfer characteristics

Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance

ID

1

0.1

0.1 1 100 VDS(V)10

(A)

Ope

ratio

n in

this

area

is

Lim

ited

by m

ax R

DS(on

)

10µs

100µs

1ms

10ms

0.01

Tj=150°C

Tc=25°CSingle pulse

AM08185v1

ID

3

2

1

00 10 VDS(V)20

(A)

4

5

4V

5V

3V

VGS=10V6

AM08186v1ID

3

2

1

00 4 VGS(V)8

(A)

2 6

4

5

1 3 5 7 9

VDS=15V

AM08187v1

BVDSS

-50 0 TJ(°C)

(norm)

-25 7525 50 1000.930.95

0.99

1.01

1.03

1.05

0.97

1.07

1.09

1.11

AM08188v1RDS(on)

1.06

1.04

1.02

10 0.4 ID(A)

(Ohm)

0.2 0.6

1.08

ID=0.5A

VGS=10V

0.8 1

VGS=5V

AM08189v1

STN4NF20L Electrical characteristics

Doc ID 17445 Rev 2 7/12

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

Figure 10. Normalized gate threshold voltage vs temperature

Figure 11. Normalized on resistance vs temperature

VGS

6

4

2

00 1 Qg(nC)

(V)

4

8

2 3

10

VDD=160V

ID=1A

5

12

300

200

100

0

400

500VDS

VGS

6 7 8

AM08190v1 C

300

200

100

030 50 VDS(V)

(pF)

40 60

Ciss

CossCrss

20100

AM08191v1

VGS(th)

1.00

0.90

0.80

0.70-50 0 TJ(°C)

(norm)

-25

1.10

7525 50 100

AM08192v1 RDS(on)

1.9

1.5

0.7

0.5-50 0 TJ(°C)

(norm)

-25 7525 50 100

0.9

1.1

1.3

1.7

2.1

AM08193v1

Test circuits STN4NF20L

8/12 Doc ID 17445 Rev 2

3 Test circuits

Figure 12. Switching times test circuit for resistive load

Figure 13. Gate charge test circuit

Figure 14. Test circuit for inductive load switching and diode recovery times

Figure 15. Unclamped inductive load test circuit

Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform

AM01468v1

VGS

PW

VD

RG

RL

D.U.T.

2200

μF3.3μF

VDD

AM01469v1

VDD

47kΩ 1kΩ

47kΩ

2.7kΩ

1kΩ

12V

Vi=20V=VGMAX

2200μF

PW

IG=CONST100Ω

100nF

D.U.T.

VG

AM01470v1

AD

D.U.T.

SB

G

25 Ω

A A

BB

RG

G

FASTDIODE

D

S

L=100μH

μF3.3 1000

μF VDD

AM01471v1

Vi

Pw

VD

ID

D.U.T.

L

2200μF

3.3μF VDD

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

AM01473v1

VDS

ton

tdon tdoff

toff

tftr

90%

10%

10%

0

0

90%

90%

10%

VGS

STN4NF20L Package mechanical data

Doc ID 17445 Rev 2 9/12

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Package mechanical data STN4NF20L

10/12 Doc ID 17445 Rev 2

DIM.mm.

min. typ max.

A 1.80

A1 0.02 0.1

B 0.60 0.70 0.85

B1 2.90 3.00 3.15

c 0.24 0.26 0.35

D 6.30 6.50 6.70

e 2.30

e1 4.60

E 3.30 3.50 3.70

H 6.70 7.00 7.30

V 10 o

SOT-223 mechanical data

0046067_L

STN4NF20L Revision history

Doc ID 17445 Rev 2 11/12

5 Revision history

Table 9. Document revision history

Date Revision Changes

29-Apr-2010 1 First release.

11-Oct-2010 2 Document status promoted from preliminary data to datasheet.

STN4NF20L

12/12 Doc ID 17445 Rev 2

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