[IEEE 2013 IEEE Custom Integrated Circuits Conference - CICC 2013 - San Jose, CA, USA...

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A 11μW Sub-pJ/bit Reconfigurable Transceiver for mm-Sized Wireless Implants Anatoly Yakovlev, Jihoon Jang, Daniel Pivonka, and Ada Poon Stanford University, Stanford, CA Abstract A wirelessly powered 11 μW transceiver for implantable sensors has been designed and demonstrated through 35 mm of porcine heart tissue. The prototype occupies 1 mm × 1 mm in 65nm CMOS with an external receive antenna. The IC consists of a rectifier, regulator, demodulator, modulator, controller, and sensor interface. The forward link transfers power and data on a 1.32 GHz carrier using low-depth ASK modulation that minimizes impact on power delivery and achieves from 4 to 20 Mbps with 0.3 pJ/bit at 4 Mbps. The backscattering link modulates the antenna impedance with a configurable load for operation in diverse biological environments and achieves 2 Mbps at 0.7 pJ/bit. The device supports TDMA, allowing for simultaneous operation of multiple sensors. I. INTRODUCTION Wireless implantable sensors can greatly enhance a variety of existing diagnostic procedures and open new possibilities for emerging noninvasive techniques. Intracardiac mapping, which is currently accomplished with a point-by-point manual catheter measurement, can instead use distributed implantable probes that capture real-time localized action potentials (APs) as they propagate through the heart [1]. This information can dramatically improve the treatment of cardiac arrhythmias. Existing transceivers are not sufficiently small or robust to serve the needs of sensing applications such as intracardiac mapping. Batteries are too large for these devices, and wireless powering provides a very limited power budget. As a further complication, tissue depth and composition varies for each treatment, and changes over time. This especially impacts data recovery from the reverse backscatter link because the optimal antenna impedance to maximize reflected energy changes with the environment [2]. To overcome the challenges associated with power management and deep-tissue implantation, this paper presents a new miniaturized transceiver design that is both power-efficient and reconfigurable for operation in variable biological conditions. With the exception of an external antenna, the entire transceiver is fully integrated on a 1 mm × 1 mm IC fabricated in 65 nm GP CMOS process. Because the device relies on continuous RF power transfer for operation, the forward link must be efficient and have minimal impact on power delivery. To achieve this, an asynchronous, low-depth amplitude modulation scheme with data encoded in the pulse-width (ASK-PW) was designed and implemented. The reverse link operates via backscattered pulses, and the IC can adjust the antenna loading and the pulse width to optimize for robust operation with high power efficiency. Both the forward and reverse links have a reconfigurable data rate and support multiple devices using time domain multiple access (TDMA). The organization of this paper is as follows. Section II describes the high-level system design of the external transceiver and the IC architecture. Section III presents the implant transceiver design and its implementation. The experimental results are discussed in section IV, and the paper is concluded in section V. II. SYSTEM DESIGN The purpose of the chip was to demonstrate a fully functioning miniaturized transceiver. The external transceiver is similar to [3], and consists of an amplitude modulated carrier, a power amplifier, and a direct conversion receiver. The implantable transceiver is fully-integrated except for an external antenna, and the chip architecture is diagrammed in Fig. 1. The IC consists of power management circuitry, transceiver circuitry, a digital controller, and an analog sensor interface. The implantable transceiver has been designed to operate with a variety of antenna types with varying sizes, and the device is tested with three antennas: a 1 mm × 1 mm loop, a 2 mm × 2 mm loop, and a 2.5-turn 800 μm-long coil antenna with an 800 μm diameter. Wireless powering is essential for miniaturization, and is integral in the design of the system. The RF carrier is converted to DC voltage with a 4-stage charge-pump connected rectifier. The output of the last stage is approximately 1.2 V under normal conditions, which is then regulated to a stable 0.7 V supply based on a bandgap voltage reference. The rectifier was sized to drive up to 10 μA for the sensors in addition to powering the transceiver and the power management circuitry. To simplify circuit design, a low dropout regulator is used, although a switching regulator would result in higher efficiency. The power management circuitry consumes approximately 4.3 μW. It is important that both forward and reverse data transfer have minimal impact on power delivery because of the very limited power budget. In the forward link, we implemented amplitude shift keying (ASK) with low modulation depth (minimum of 9%), and encoded data in the pulse width (PW). This method is inherently asynchronous, allowing for simple on-chip clock and data recovering circuitry while minimally Fig. 1: Transceiver chip architecture and communication protocol timing diagram Implantable Device Integrated Circuit Rectifier Bandgap Reference and Regulator Controller And Auxiliary Circuits Analog Sensor Interface VDD Planar or 3D Loop Antenna Receiver Transmitter Sensor/ Tissue Electrodes 978-1-4673-6146-0/13/$31.00 ©2013 IEEE

Transcript of [IEEE 2013 IEEE Custom Integrated Circuits Conference - CICC 2013 - San Jose, CA, USA...

Page 1: [IEEE 2013 IEEE Custom Integrated Circuits Conference - CICC 2013 - San Jose, CA, USA (2013.09.22-2013.09.25)] Proceedings of the IEEE 2013 Custom Integrated Circuits Conference -

A 11μW Sub-pJ/bit Reconfigurable Transceiver for mm-Sized Wireless Implants

Anatoly Yakovlev, Jihoon Jang, Daniel Pivonka, and Ada Poon

Stanford University, Stanford, CA

Abstract — A wirelessly powered 11 µW transceiver for implantable sensors has been designed and demonstrated through 35 mm of porcine heart tissue. The prototype occupies 1 mm × 1 mm in 65nm CMOS with an external receive antenna. The IC consists of a rectifier, regulator, demodulator, modulator, controller, and sensor interface. The forward link transfers power and data on a 1.32 GHz carrier using low-depth ASK modulation that minimizes impact on power delivery and achieves from 4 to 20 Mbps with 0.3 pJ/bit at 4 Mbps. The backscattering link modulates the antenna impedance with a configurable load for operation in diverse biological environments and achieves 2 Mbps at 0.7 pJ/bit. The device supports TDMA, allowing for simultaneous operation of multiple sensors.

I. INTRODUCTION

Wireless implantable sensors can greatly enhance a variety of existing diagnostic procedures and open new possibilities for emerging noninvasive techniques. Intracardiac mapping, which is currently accomplished with a point-by-point manual catheter measurement, can instead use distributed implantable probes that capture real-time localized action potentials (APs) as they propagate through the heart [1]. This information can dramatically improve the treatment of cardiac arrhythmias.

Existing transceivers are not sufficiently small or robust to serve the needs of sensing applications such as intracardiac mapping. Batteries are too large for these devices, and wireless powering provides a very limited power budget. As a further complication, tissue depth and composition varies for each treatment, and changes over time. This especially impacts data recovery from the reverse backscatter link because the optimal antenna impedance to maximize reflected energy changes with the environment [2].

To overcome the challenges associated with power management and deep-tissue implantation, this paper presents a new miniaturized transceiver design that is both power-efficient and reconfigurable for operation in variable biological conditions. With the exception of an external antenna, the entire transceiver is fully integrated on a 1 mm × 1 mm IC fabricated in 65 nm GP CMOS process. Because the device relies on continuous RF power transfer for operation, the forward link must be efficient and have minimal impact on power delivery. To achieve this, an asynchronous, low-depth amplitude modulation scheme with data encoded in the pulse-width (ASK-PW) was designed and implemented. The reverse link operates via backscattered pulses, and the IC can adjust the antenna loading and the pulse width to optimize for robust operation with high power efficiency. Both the forward and reverse links have a reconfigurable data rate and support multiple devices using time domain multiple access (TDMA).

The organization of this paper is as follows. Section II describes the high-level system design of the external transceiver and the IC architecture. Section III presents the implant transceiver design and its implementation. The

experimental results are discussed in section IV, and the paper is concluded in section V.

II. SYSTEM DESIGN

The purpose of the chip was to demonstrate a fully functioning miniaturized transceiver. The external transceiver is similar to [3], and consists of an amplitude modulated carrier, a power amplifier, and a direct conversion receiver. The implantable transceiver is fully-integrated except for an external antenna, and the chip architecture is diagrammed in Fig. 1. The IC consists of power management circuitry, transceiver circuitry, a digital controller, and an analog sensor interface. The implantable transceiver has been designed to operate with a variety of antenna types with varying sizes, and the device is tested with three antennas: a 1 mm × 1 mm loop, a 2 mm × 2 mm loop, and a 2.5-turn 800 μm-long coil antenna with an 800 μm diameter.

Wireless powering is essential for miniaturization, and is integral in the design of the system. The RF carrier is converted to DC voltage with a 4-stage charge-pump connected rectifier. The output of the last stage is approximately 1.2 V under normal conditions, which is then regulated to a stable 0.7 V supply based on a bandgap voltage reference. The rectifier was sized to drive up to 10 µA for the sensors in addition to powering the transceiver and the power management circuitry. To simplify circuit design, a low dropout regulator is used, although a switching regulator would result in higher efficiency. The power management circuitry consumes approximately 4.3 µW.

It is important that both forward and reverse data transfer have minimal impact on power delivery because of the very limited power budget. In the forward link, we implemented amplitude shift keying (ASK) with low modulation depth (minimum of 9%), and encoded data in the pulse width (PW). This method is inherently asynchronous, allowing for simple on-chip clock and data recovering circuitry while minimally

Fig. 1: Transceiver chip architecture and communication protocol timing diagram

Implantable Device Integrated Circuit

Rectifier

Bandgap Reference

and Regulator

ControllerAnd

Auxiliary Circuits

Analog Sensor

Interface

VDD

Planar or 3D Loop Antenna

Receiver

Transmitter

Sensor/Tissue

Electrodes

978-1-4673-6146-0/13/$31.00 ©2013 IEEE

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perturbing the power carrier. Reverse data transfer is accomplished with a backscattering link, in which energy pulses are reflected by modulating the load on the antenna. The pulses encode data, and a short preamble allows for decoding by the external transceiver without a precise clock on the implant saving space and power.

The communication protocol supports multiple devices using TDMA, with each device having a unique programmable ID. Each forward packet contains the device ID and configuration data, and the corresponding device responds with a reverse packet containing a preamble, followed by 5 data bits. As will be described in the following section, the implanted transceiver can configure the modulating load, the backscattered pulse width, and both forward and reverse data rates to accommodate diverse operating conditions.

III. TRANSCEIVER ARCHITECTURE

Batteryless implantable devices are forward link limited and require robust, power-efficient transceiver design. A custom ASK-PW modulation scheme was implemented in the forward link, which minimizes impact on power delivery and allows for asynchronous clock and data recovery and therefore no power-hungry synchronization circuitry. The reverse link relies on backscattered energy, and uses reconfigurable circuitry to robustly operate in diverse conditions. This section describes the circuit architecture for these techniques.

A. Asynchronous Clock and Data Receiver

A high-level description of the data receiver is shown in Fig. 2. The demodulator provides both the clock signal for the digital controller and decodes incoming data. The low modulation depth and fluctuating input power make it impossible to use a fixed reference voltage for the ASK threshold detector. Instead, a dynamic reference voltage is generated concurrently with envelope detection. The demodulator interface with the antenna consists of a rectifier with a small time constant to recover the RF signal envelope and an RC low pass filter to average the envelope as shown in Fig. 3. These two signals are input to a comparator to generate the digital signal Vout1. This signal is buffered to produce a digital clock. Vout1 is also integrated and compared to a threshold to decode the data. With this implementation, long pulses produce high output and short pulses produce low output. The demodulated data is captured on the falling edge of the clock by a low-power digital controller, which configures the transmitter and the low power sensing circuit.

Clock and data signals are recovered from the envelope and the dynamic reference, which are first input to a comparator to generate the full-swing digital signal Vout1. This comparator consists of two differential amplifier stages followed by a Schmitt-trigger inverter as shown in Fig. 4. Two low-power differential amplifiers ensure that the gain remains high for a wide range of common-mode input voltages, which vary depending on input power. The Schmitt-trigger inverter reduces the crowbar current due to slow transitions of the amplifier output, and it also decreases noise sensitivity. The resulting digital signal is both buffered to generate the clock and integrated to decode the data as shown in Fig. 5.

The integrator consists of a skewed inverter with a capacitive load to provide slow rising and fast falling edges. This capacitance defines the pulse width that causes the data to transition from low to high, and therefore sets the minimum

Fig. 2: Demodulator and description of operation

Fig. 3: Envelop detection and avering circuit

Fig. 4: First comparator that converts envelope into digital signal

Fig. 5: Adjustable integrator for forward data rate control and second comparator for data decoding

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and maximum data rates. As shown in the figure, the integrator capacitive load can be adjusted to configure the forward data rate. In the current implementation the load capacitance can be set to 95 fF or 475 fF, which corresponds to a forward data rate of either 20 Mbps or 4 Mbps, respectively. On the falling edge of each incoming pulse, data is captured from a comparator that compares the integrated result with a fixed reference at Vdd/2. This comparator consists of a single differential pair followed by a Schmitt-trigger inverter. The entire clock and data recovery circuit draws a current of 1.7 μA at 4 Mbps, achieving 0.3 pJ/bit energy efficiency which outperforms comparable systems by a factor more than 20 [4].

B. Reconfigurable Backscattering Link

Backscattering links are highly power-efficient though they can suffer from a high bit error rate (BER) when implanted because of varying tissue composition, which also changes over time. To mitigate the effects of the unpredictability in the operating environment, the reverse link has been designed with a reconfigurable modulating load, data rate, and backscattered pulse width.

Analysis in [5] provides a method for determining the optimal load to minimize BER for binary backscattering modulation. Two key objectives must be satisfied: maximizing the average backscattered power per bit – max σ σ , and maximizing the Euclidean distance between the reflection coefficients on the Smith chart corresponding to the matched and mismatched loads – max Γ Γ , . In the above σ1 and σ2 correspond to the termination-dependent implant antenna radar cross-section and Γ1 and Γ2,k are the reflection coefficients corresponding to the implant antenna being match terminated and terminated with the kth modulating load, respectively. The first objective requires that the selected modulating load maximizes Euclidian distance from structural antenna mode As which is a parameter defined by the antenna geometry and its physical composition. The second objective demands maximizing Euclidean distance between the matched reflection coefficient Γ1 and the mismatched reflection coefficient Γ2,k when the antenna is terminated with the kth modulating load. In both cases, the Euclidean distance is maximized when the reflection coefficients are separated by a straight line collinear with the Smith chart center.

Fig. 6: Configurable load for backscatter link and Smith chart representation

Fig. 7: Reconfigurable clock for data rate adjustment and pulse width control

To satisfy these objectives, the IC was designed to have four loads to accommodate a variety of conditions as shown in Fig. 6. The pass gates and the modulation transistor are sized to balance the loading on the RF path while minimizing the parasitic effective series resistance (ESR). The fourth load can be provided externally if necessary. Fig. 6 shows the Smith chart at 1.32 GHz for the device with the 3D coil antenna in air and implanted in a porcine heart with the structural antenna mode As, reflection coefficient Γ1 corresponding to antenna impedances in both air and tissue (matching was designed for tissue), and reflection coefficients Γ2,k corresponding to the three loads for backscatter modulation. It is clear from the chart that the capacitive load and the inductive load should be used for the device in tissue and in air, respectively.

To accommodate multiple devices for intracardiac mapping with TDMA, the data rate must be sufficiently high. Some devices may have less available power and others may need more frequent polling, justifying the need for reverse data rate configurability. This configurability is accomplished by adjusting the clock frequency to set data rates to either 0.7 Mbps or 2 Mbps as shown in Fig. 7. The decoder is unaffected by this frequency change because each data packet contains a preamble which can be used to synchronize bit recovery.

Furthermore, the on-chip clock is only enabled for the reverse data transmission to save power. Additionally, the backscattered pulses can be set to 11, 22, 33 ns, or half of the clock period with a circuit shown in Fig. 7. As explained in [6], shorter pulses minimize the time that the RF path is mismatched and thus not harvesting power. However, very short pulses are spectrally inefficient and result in reduced signal quality as the higher frequencies are filtered by the antennas, matching network, or other elements in the reverse link. Therefore, adjustability of the pulse width allows for optimization of the data rate while maintaining an adequate BER. The transmitter consumes 1.4 μW at 2 Mbps including the lost energy that is reflected and thus not harvested, achieving 0.7 pJ/bit energy efficiency which outperforms comparable systems by a factor more than 25 [6].

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Fig. 8: Link gain, device next to US 1 cent coin foand successful demodulation of forward and rever

Table 1: IC Performance Summar

IV. EXPERIMENTAL RESULTS

The power and data links were evaluated ovdifferent depths of tissue for three different an1 mm loop, a 2 mm × 2 mm loop, and a 2.5-tcoil antenna with an 800 μm diameter. The antennas in air varied from 1.4 GHz to 2.1 Gand the IC were encapsulated in low-densityepoxy. The link gain for three different enviroin Fig. 8 for the 3D coil antenna, illustratipropagation medium surrounding the tag aimplantation results in reduced link gain and operating point to lower frequencies. Tapproximately 2 dB and 6 dB better for the 1 mmm × 2 mm antennas, respectively. Similarand reverse data links were evaluated througThe experimental setup for tissue tests is showmodulating load had affected the link perforeceived signal was strongest with the capacload in tissue, as expected from the Smith chdirect conversion receiver was constructed wequipment, and it required a circulatoself-interference. Fig. 8 shows the successfulreverse data without the use of any post-proshows the annotated chip micrograph, and theis summarized in Table 1.

or size comparison, rse data link

ry

S

ver air and at two ntennas: a 1 mm × turn 800 μm-long resonance of the

GHz. The antenna y RF transparent

onments is plotted ing the effect of

antenna. Deeper shifts the optimal

The link gain is mm × 1 mm and 2 rly, both forward gh air and tissue. wn in Fig. 9. The

ormance, and the citive modulating hart in Fig. 6. The with off-the-shelf or to suppress demodulation of ocessing. Fig. 10 e IC performance

Fig. 9: Experimental setup of the device

Fig. 10: IC annotated micrograph

IV. CONCLUSI

This work demonstrates a minitransceiver architecture with a operation in diverse biological enviroconsumption of the device was 10successfully through 35 mm of porctransfer achieves up to 20 Mpbs withMpbs. The backscattering link operan efficiency of 0.7 pJ/bit. Additioncan operate simultaneously usingprogrammable ID for each device.

ACKNOWLEDGEM

The authors would like to acknowleRAD program. The fabrication of thby the TSMC University Shuttle Pro

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[2] Griffin, J.D., et al., "CompBackscatter-Radio and RFID System

[3] D. Pivonka, et al., “A mm-sized wicontrolled locomotive implant,” TB

[4] A. Ghenim, et al., “A full digital lowand clock recovery circuit for high dICECS, Dec. 2010

[5] A. Bletsas, et al., “Improving backMTT, June 2010

[6] Mark, M., et al., "A 1mm3 2Mbimplanted neural sensors," VLSI, Ju

inside porcine heart

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iaturized, power-efficient reconfigurable link for onments. The total power 0.7 µW, and it operated cine heart tissue. Forward h 0.3 pJ/bit efficiency at 4 rates at up to 2 Mbps with nally, multiple transceivers g TDMA and a unique

MENTS

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n catheter ablation for atrial Hosp. Med. plete Link Budgets for ms," APM, Apr. 2009 reless powered and remotely

BCAS, 2012 w power DPSK demodulator data rate neural implants,”

scatter radio tag efficiency,”

bps 330fJ/b transponder for une 2011