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www.ravindrababuravula.com GATE CS 2020 Paper GENERAL APTITUDE Answer: 4 Explanation: Two st. line perpendicular to each other in X-Y, if α & β are acute angles then α + β = ____ We know a + α + β = 180 α + β = 180 - 90 α + β = 90 _____________________________________________________________________________________ Answer: 1 Explanation: Bar-graph: 2014-2018 Total expenditure = 500 million/year = 500 × 5 = 2500 million Revenue total (from the graph) = 400 + 500 + 600 + 700 + 800 = 3000 million Profit = 3000 - 2500 = 500 Option: 4

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GATE CS 2020 Paper

GENERAL APTITUDE

Answer: 4

Explanation:

Two st. line perpendicular to each other in X-Y, if α & β are acute angles then α + β = ____

We know a + α + β = 180

α + β = 180 - 90

α + β = 90

_____________________________________________________________________________________

Answer: 1

Explanation: Bar-graph:

2014-2018

Total expenditure = 500 million/year = 500 × 5 = 2500 million

Revenue total (from the graph)

= 400 + 500 + 600 + 700 + 800

= 3000 million

Profit = 3000 - 2500 = 500

Option: 4

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⟹ 500/2500 = 20% profit

_____________________________________________________________________________________

Answer:2

Explanation:

Area of non-painted between 2 circles area of part 1 = πb2 - πa2 = π(b2 - a2)

Radius of painted circles = b-a/2

Area of painted circle = π(b-a/2)2

For n circles = nπ(b-a/2)2

Non-painted area = π[b2 - a2- n/4(b - a)2]

_____________________________________________________________________________________

Option: 1

Option: 2

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Answer : 2

Explanation:

GST is imposed at the point of usage of goods and services.

_____________________________________________________________________________________

Answer: 1

Explanation:

Cook-cook: flyer

Ans:

Cook-cook - Noun-verb relation

Fly-flyer

_____________________________________________________________________________________

Answer: 2

_____________________________________________________________________________________

Option: 2

Option: 1

Ans: 2

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Answer: 2

Explanation:

1 - f - e - 2 ─ 100 + 100 + 200 = 400

1 - f - b - 2 ─ 100 + 0 + 200 = 300 ⇾ shortest [Answer]

1 - b - 2 ─ 300 + 200 = 500

1 - a - c ─ 2 - 200 + 100 + 100 = 400

_____________________________________________________________________________________

Answer: 4

_____________________________________________________________________________________

Option: 2

Option: 4

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Answer: 4

Explanation:

P=3, R=27, T=243, Q+5=?

P=31, Q=32, R=33, S=34, T=35

Q+S = 32+34 = 9+81 = 90

_____________________________________________________________________________________

Answer: 3

Explanation:

A Contrast is indicated in the above sentence

_____________________________________________________________________________________

Section: CS COMPUTER SCIENCE AND INFORMATION TECHNOLOGY

Answer: 7

Solution:

Lagrange’s Theorem:

If ‘H” is a subgroup of finite group (G,*) then O(H) is the divisor of O(G).

Given that the order of group is 35. Its divisors are 1,5,7,35.

It is asked that the size of largest possible subgroup other than G itself will be 7.

_____________________________________________________________________________________

Option: 4

Option: 3

Ans: 7

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Answer: 3

Explanation:

The inner query “select avg(cost) from catalogue where pno='P4' group by pno;” returns:

AVG(COST) ------------ 225

The outer query “select s.sno,s.sname from suppliers s, catalogue c where s.sno=c.sno” returns:

SNO SNAME ---------------------------------------- S1 M/s Royal furniture S1 M/s Royal furniture S1 M/s Royal furniture S2 M/s Balaji furniture S2 M/s Balaji furniture S3 M/s Premium furniture S3 M/s Premium furniture S3 M/s Premium furniture S3 M/s Premium furniture

So, the final result of the query is:

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www.ravindrababuravula.com SN SNAME ---------------------------------------- S2 M/s Balaji furniture S3 M/s Premium furniture S3 M/s Premium furniture S3 M/s Premium furniture

Therefore, 4 rows will be returned by the query.

_____________________________________________________________________________________

Answer: 4

Explanation: L is DCFL.

We can make DPDA for this.

L is not LL(k) for any “k” look aheads. The reason is the language is a union of two languages which have

common prefixes. For example strings {aa, aabb, aaa, aaabbb,….} present in language. Hence the LL(k) parser

cannot parse it by using any lookahead “k” symbols.

_____________________________________________________________________________________

Answer: 2

Option: 3

Ans: 4 Option: 4

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Explanation:

_____________________________________________________________________________________

Answer: 3

Explanation: Statement I is wrong. Assume L1= {an bn | n>0} and L2= complement of L1

L1 and L2 both are DCFL but not regular, but L1 U L2 = (a+b)* which is regular.

Hence even though L1 U L2 is regular , L1 and L2 need not be always regular.

Statement II is wrong.

Assume the following finite (hence regular) languages.

L1= {ab}

L2={aabb}

L3={aaabbb}

.

.

.

.

L100={a^100 b^100}

.

.

Option: 2

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If we take infinite union of all above languages i.e,

{L1 U L2 U ……….L100 U ……} then we will get a new language L={a^n b^n | n>0}, which is not regular.

Hence regular languages are not closed under infinite UNION.

_____________________________________________________________________________________

Answer: 4

Explanation:

Statement-I is true as daisy chaining is used to assign priorities in attending interrupts.

Statement-II is false as vectored interrupt doesn’t involve polling but non-vectored interrupt involves polling.

Statement-III is true as polling means that CPU periodically checks the status bits to know if any device needs

attention.

Statement-IV is false as during DMA only one of the CPU or DMA can be bus master

at a time.

_____________________________________________________________________________________

Answer: 13.5

Explanation:

Cache access time = 3 ns

Hit ratio of cache=0.94

Word size is 64 bits = 8 bytes.

Cache line size = 256 bytes = 32 words

Main memory access time=20ns(time for first word)+155ns(time for remaining 31 words, 31*5=155ns) = 175

ns

Average access time = h1*t1+(1-h1)(t1+t2) = t1+(1-h1)t2

⇒ 3+(0.06)(175) = 13.5 ns

_____________________________________________________________________________________

Option: 3

Option: 4

Ans: 13.5

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Let R be a binary relation on set {1,2,3}. If a relation is chosen randomly from R, the probability of chosen

relation to be reflexive is ____

Answer: 0.125

Explanation:

For a set with n elements,

The number of reflexive relations is 2^(n^2-n).

The total number of relations on a set with n elements is 2^ (n^2).

The probability of choosing the reflexive relation out of set of relations i s = 2^(n^2-n) /2^ (n^2) = 2^( n^2-n-

n^2) = 2^(-n)

Given n=3, the probability will be 2^(-n) = ⅛ = 0.125

_____________________________________________________________________________________

Answer: 3

Explanation:

An entity set that does not have sufficient attributes to form a primary key is termed as a weak entity and an entity set that has a primary key is termed as strong entity set. For a weak entity set to be meaningful, it must be associated with another entity set, called identifying or owner entity set. The relationship associating the weak entity set with the identifying entity set is called the identifying relationship and it is represented by double diamond. The identifying relationship is many-to-one from the weak entity set to the identifying entity set and the participation of weak entity set in the relationship is total.

_____________________________________________________________________________________

Option: 3

Ans: 0.125

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Answer: (2)

The size of hole created using best fit is never greater than size created by first fit. The best fit chooses the

smallest available partition to fit the size of the process. Whereas, first fit and next fit doesn’t consider the size

of the holes available.

_____________________________________________________________________________________

Answer: 7

Explanation:

7 reductions total.

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Option: 2

Ans: 7

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Answer: 4

Explanation:

_____________________________________________________________________________________

Answer: 2

Explanation:

Option: 4

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_____________________________________________________________________________________

Answer: 5

Explanation:

Number of registers is 32. Only one register has to be selected at any instant of time.

A 25x1 Multiplexer with 5 select lines selects one of the 32(= 25 )registers at a time depending on the

selection input.

Option: 2

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The content from the selected register will be transferred through the output line to the

Accumulator.

_____________________________________________________________________________________

Answer : 13

Explanation

Probe sequence is the list of locations which a method for open addressing produces as alternatives in

case of a collision.

K=90

h1(k)= k mod 23 = 90 mod 23 =21

In case of collision , we need to use secondary hash function

h2(k)=1+(k mod19)=1+90mod19=1+14 =15

Now (21+15) mod 23 =36 mod 23 =13

So the address is 13

____________________________________________________________________________________

Answer: 2

Ans: 5

Ans: 13

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Explanation:

____________________________________________________________________________________

Answer: 1

Explanation: The Linked list insertion operations will take O(1) time. It means a constant amount of time for insertion.

Total number of elements inserted into an empty linked list is O(n). So, it will take O(n) time in the worst case.

After inserting elements into an empty linked list we have to perform sorting operation.

To get minimum time complexity to perform sorting order is merge sort. It will give O(nlogn) time complexity only.

Let head be the first node of the linked list to be sorted and head Reference be the pointer to head. The head in MergeSort

as the below implementation changes next links to sort the linked lists (not data at the nodes), so head node has to be changed if the data at the original head is not the smallest value in the linked list.

Note: There are other sorting methods also will give decent time complexity but quicksort will give O(n^2) and heap sort will not be suitable to apply.

____________________________________________________________________________________

Option: 2

Option: 1

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Ans: 6

Explanation:

In non-persistent HTTP connection for every object, there is a TCP connection established. Therefore, 1 TCP

connection for text and 5 TCP connections for images required.

Hence, 1 Text + 5 Image = 6 Objects

____________________________________________________________________________________

Answer: 19

Explanation:

Check out the step by step program and its output in the comment:

#include<stdio.h>

int main()

{

int a[4][5] = { {1,2,3,4,5},

{6,7,8,9,10},

{11,12,13,14,15},

{16,17,18,19,20}

};

printf("%d\n",a); //880 (consider base address = 880)

printf("%d\n",*a); //880

printf("%d\n",**a); //1

printf("%d\n",**a+2); //3

printf("%d\n",a+**a+2); //940

printf("%d\n",*(a+**a+2));//940

printf("%d\n",*(a+**a+2)+3);//952

printf("%d\n",*(*(a+**a+2)+3));//19

return 0;

}

Ans: 6

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____________________________________________________________________________________

Answer: 2

Explanation:

To execute the given instruction R0 <- R1 + R2,

Ans: 19

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www.ravindrababuravula.com First the PC value has to be moved into MAR (step-3 from the given sequence),

then the instruction has to be fetched(step-5 from the given sequence).

then Temp1 is loaded with the value of R1 (step-2 from the given sequence),

then the addition operation is performed by accessing the R2 value directly and adding it to Temp1 value and

storing the result in Temp2 (step-1 from the given sequence).

Finally the result from Temp2 is stored in R0 (step-4 from the given sequence).

Hence the correct sequence is (3, 5, 2, 1, 4).

____________________________________________________________________________________

Answer: 4

Explanation:

I is wrong as Symbol table is also accessed during semantic analysis phase.

II is wrong as compilers which supports recursion require stack memory in run time environment.

III is wrong “any variable must be declared before its use” is a

semantic error and nit syntax error.

____________________________________________________________________________________

Answer: 1034

Explanation:

The size of the decoder required is 10x 210i.e 10x 1024.

Each output line of the decoder is connected to one of the 1K(= 1024) rows of RAM.

Each row stores 1 Byte.

m=10 and n=1024

____________________________________________________________________________________

Answer: 4

Option: 2

Option: 4

Ans: 1034

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Explanation:

AVL Tree all operations(insert, delete and search) will take O(logn) time.

In question they asked about n^2 elements.

So, In worst case it will take o(n^2 logn) time.

____________________________________________________________________________________

Answer: None of the Option is correct

Explanation:

The regular expression 10*(0*10*10*)* always generate string begin with 1 and thus does not generate string

“01110” hence wrong option.

The regular expression (0*10*10*)*0*1 always generates all string ends with “1” and thus does not generate

string “01110” hence wrong option.

The regular expression ((0+1)*1(0+1)*1)*10* generate string “11110” which is not having odd number of 1’s ,

hence wrong option.

The regular expression (0*10*10*)10* is not a generating string “01”. Hence this is also wrong . It seems none

of them is correct.

____________________________________________________________________________________

Answer: Option 2

Explanation :

I: The packet contains Header and data. The router modifies the header details like TTL

II: is True

III: Ressemble is not necessary at the router.

____________________________________________________________________________________

Option: 3

Option: 2

Option: 4

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Answer: 2.16

Explanation:

In the non-pipelined architecture the clock cycle time = 1/(2.5)G = 0.4 ns

It is given that each instruction takes 5 clock cycles to execute in the non-pipelined architecture, so time taken

to execute each instruction = 5 * 0.4 = 2ns

In the pipelined architecture the clock cycle time = 1/2G = 0.5 ns

In the pipelined architecture there are stalls due to memory instructions and branch instructions.

In the pipeline, the updated clocks per instruction CPI = (1+stall frequency due to memory operations * stalls of

memory instructions + stall frequency due to branch operations * stalls due to branch instructions)

Out of the total instructions , 30% are memory instructions. Out of those 30%, only 5% cause stalls of 50 cycles

each.

Stalls per instruction due to memory operations = 0.3*0.05*50 = 0.75

Out of the total instructions 10% are branch instructions. Out of those 10% of instructions 50% of them cause

stalls of 2 cycles each.

Stalls per instruction due to branch operations = 0.1*0.5*2 = 0.1

The updated CPI in pipeline = 1 + 0.75 + 0.1 = 1.85

The execution time in the pipeline = 1.85 * 0.5 = 0.925 ns

The speed up = Time in non-pipelined architecture / Time in pipelined architecture

= 2 / 0.925 = 2.16

____________________________________________________________________________________

Answer: 5.25

Ans: 2.16

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Explanation:

SJF:

Turn Around Time = (21 – 0) + (13 – 0) + (2 – 0) + (6 – 0), Average = 42/4 = 10.50

RR:

Turn Around Time (TAT) = (18 – 0) + (21 – 0) + (10 – 0) + (14 – 0), Average = 63/4 = 15.75

Absolute difference = |10.50-15.75| = 5.25

____________________________________________________________________________________

Answer: 3

Explanation :

____________________________________________________________________________________

Ans: 5.25

Option: 3

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Answer: 2

Explanation:

Two schedules are said to be conflict equivalent, if conflict operations in both the schedules are executed in the same order.

First, let’s list the conflict operations of each of the schedule given in the options and compare with the conflict operations of schedule which is given in the question.

Given schedule:

T1 T2

R(A)

R(C)

W(D)

W(B) Commit

R(B) W(B)

R(D)

W(C)

Commit

Conflict operations:

R2(B) → W1(B)

W2(B) → W1(B)

R1(C) → W2(C)

R2(D) → W1(D)

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T1 T2

R(A) R(C) W(D) W(B)

Commit

R(B) W(B) R(D) W(C)

Commit

Conflict operations:

R1(C) → W2(C)

W1(D) → R2(D)

W1(B) → R2(B)

W1(B) → W2(B)

Option(2):

T1 T2

R(A) R(C) W(D) W(B)

Commit

R(B) W(B) R(D)

W(C) Commit

Conflict operations:

R2(B) → W1(B)

W2(B) → W1(B)

R2(D) → W1(D)

R1(C) → W2(C)

Option(3):

T1 T2

R(A) R(C) W(D) W(B)

Commit

R(B) W(B) R(D) W(C)

Commit

Conflict operations:

R2(B) → W1(B)

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www.ravindrababuravula.com W2(B) → W1(B)

R2(D) → W1(D)

W2(C) → R1(C)

Option(4):

T1 T2

R(A) R(C) W(D)

W(B) Commit

R(B) W(B) R(D)

W(C)

Commit

Conflict operations:

R1(C) → W2(C)

W1(D) → R2(D)

R2(B) → W1(B)

W2(B) → W1(B)

The conflict operations in the option (2) and given schedule are appearing in the same

sequence order, so option (2) is the answer.

____________________________________________________________________________________

Answer: 4

Explanation:

Main memory is 16MB in size.

The word length is given as 32 bits and the physical addresses mentioned are all contain 6 hexa-decimal digits,

so the the physical address is 32 bits long.

Block size is 256 bytes, block offset = 8 bits as it is a byte addressable memory.

Cache size = 64KB

Number of blocks in the cache = 64KB/256B = 256

It is a 4-way set associative cache, so no. of sets in the cache = 256/4 = 64 = 2^6

In the physical address we need 6 bits for the SET number.

TAG bits = 32 - 6 - 8 = 18

So the 32 bits physical address is divided as (18 TAG bits + 6 SET number bits + 8 OFFSET bits)

Option: 2

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Since in all the options we are asked about SET numbers of the given addresses, we need to find the SET

number of each of the addresses.

A1 = 0x42C8A4, here SET number is (00 1000) which includes the last 2 bits of C(1100) and binary

representation of 8 (1000).

A2 = 0x546888, here SET number is (10 1000) which includes the last 2 bits of 6(0110) and binary

representation of 8 (1000).

A3 = 0x6A289C here SET number is (10 1000) which includes the last 2 bits of 2(0010) and binary

representation of 8 (1000).

A4 = 0x5E4880 here SET number is (00 1000) which includes the last 2 bits of 4 (0100) and binary

representation of 8 (1000).

From the given options option-4 is TRUE as A2, A3 are mapped to the same cache SET.

____________________________________________________________________________________

Answer: 0.5

Explanation :

____________________________________________________________________________________

Answer : 7

Explanation:

In k3x4 there are two sets with sizes 3,4. (its a complete bipartite graph).

The vertex in the set of size 3 has 4 edges connected to 4 vertices on other set. So, edge color of G is max(3,4)

i.e. 4.

When a vertex is added to the graph with 7 vertices ( K 3x4 has 7 vertices), there would be 7 edges associated to

that new vertex. As per the edge coloring “no two adjacent edges have same color).

Option: 4

Ans: 0.5

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www.ravindrababuravula.com As the new vertex with 7 edges need to be colored with 7 colors, the edge color

of graph G is 7.

____________________________________________________________________________________

Answer: 3

Explanation:

Given CIDR IP is 202.61.0.0/17 and for HID 32 - 17 = 15 bits can be used. And to Assign an IP address for 1500 computer, we require 11 bit from HID part. So NID + SID = 17 + 4 = 21 bits and HID = 11 bits NID HID 202.61.0 0000 000.00000000 So, from the given option, possible IP Address is I. 84 - >0 1010 100 (BCZ in HID bit 1 is not possible) II. 104 ->0 1101 000 III. 64 -> 0 1000 000 IV. 144->1 0010 000 (BCZ in NID bit 1 is not possible )

____________________________________________________________________________________

Answer: 4

Option: 3

Ans: 7

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www.ravindrababuravula.com Explanation:

R(ABCD)

FDs: AB → C BC → A

(BD)+ = BD ✖

(ABD)+ = ABDC ✔

(CBD)+ = CBDA ✔

Candidate keys = {ABD, CBD}

The relation R is in 3NF, as there are no transitive dependencies. The relation R is not in BCNF, because the left side of both the FD’s are not Super keys.

In R, BC → A is a non-trivial FD and in which BC is not a Super key and A is a prime

attribute.

____________________________________________________________________________________

Answer: 4

Explanation :

____________________________________________________________________________________

Answer: 14

Explanation: Instruction is of size 16-bits.

Option: 4

Ans: 4

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www.ravindrababuravula.com All possible binary combinations = 2^16

There are 64 registers, so no. of bits needed to identify a register = 6

I-type instruction has (Opcode+Register+4-bit immediate value). There are 8 distinct I-type instructions.

All the binary combinations possible with the I-type instructions are = 8*2^6*2^4 = 2^13

R-type instructions have 2 register operands.

Let x be the number of R-type instructions.

All the possible binary combinations of R-type instructions = x*2^6*2^6 = x*2^12

The sum of I-type and R-type binary combinations should be equal to 2^16.

x*2^12 + 2^13 = 2^16

2^12 (x+2) = 2^16

x+2 = 2^4

x = 16 -2 = 14

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Answer: 2

Explanation:

Basic Rules:

Ans: 14

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Answer: 2

Explanation:

The idea is to traverse the given binary search tree starting from root. For every node being visited, check if this

node lies in range, if yes, then add 1 to result and recur for both of its children. If the current node is smaller

than the low value of range, then recur for right child, else recur for left child.

Time complexity of the above program is O(h + k) where h is the height of BST and k is the number of nodes in

a given range.

Here h is logn, hence O(logn+k)

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Answer: 12

Explanation:

There are 5 places

― ― ― ― ―

Given: L I L A C

The derangements formula ⎣ n!/e⎦ cannot be directly performed as there are repeated characters.

Let’s proceed in regular manner:

The L, L can be placed in other ‘3’ places as

Option: 2

Option: 2

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(1) Can be arranged such that A, I, C be placed in three positions excluding ‘C’ being placed at its own

position, which we get only 2×2×1=4 ways.

Similarly (2) can be filled as A, I, C being placed such that 4th position is not filled by A, so we have

2×2×1= 4 ways. Similarly with (3).

Totally, we get 4+4+4 = 12 ways.

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Answer : 4

Explanation:

Method-1:

As T is a minimum spanning tree and we need to add a new edge to existing spanning tree.

Later we need to check still T is a minimum spanning tree or not, So we need to check all vertices

whether there is any cycle present after adding a new edge .

All vertices need to traverse to confirm minimum spanning tree after adding new edge then time

complexity is O(V)

Method-2:

Time Complexity:

Total vertices: V, Total Edges : E

O(logV) – to extract each vertex from the queue. So for V vertices – O(VlogV)

O(logV) – each time a new pair object with a new key value of a vertex and will be done at most once

for each edge. So for total E edge – O(ElogV)

So overall complexity: O(VlogV) + O(ElogV) = O((E+V)logV) = O(ElogV)

Note: Method-1 is the most appropriate answer for giving a question.

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Option: 4

Ans: 12

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Answer: 55

Explanation:

#include<stdio.h>

int fun1(int n) {

printf("--fun1 call--\n");

static int i = 0;

if(n>0){

++i;

printf("fun1(%d-1)\n",n);

fun1(n-1);

}

printf("fun1(%d)= %d\n",n, i);

return(i);

}

int fun2(int n) {

printf("\n******* fun2 call ********\n");

static int i = 0;

if(n>0){

printf("%d + fun1(%d)\n", i,n);

i=i+fun1(n);

fun2(n-1);

}

printf("fun2(%d)= %d\n",n, i);

return(i);

}

void main()

{

printf("final = %d\n", fun2(5));

}

Check step by step handrun of the code to understand the recursion:

******* fun2 call ********

0 + fun1(5)

--fun1 call--

fun1(5-1)

--fun1 call--

fun1(4-1)

--fun1 call--

fun1(3-1)

--fun1 call--

fun1(2-1)

--fun1 call--

fun1(1-1)

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fun1(0)= 5

fun1(1)= 5

fun1(2)= 5

fun1(3)= 5

fun1(4)= 5

fun1(5)= 5

******* fun2 call ********

5 + fun1(4)

--fun1 call--

fun1(4-1)

--fun1 call--

fun1(3-1)

--fun1 call--

fun1(2-1)

--fun1 call--

fun1(1-1)

--fun1 call--

fun1(0)= 9

fun1(1)= 9

fun1(2)= 9

fun1(3)= 9

fun1(4)= 9

******* fun2 call ********

14 + fun1(3)

--fun1 call--

fun1(3-1)

--fun1 call--

fun1(2-1)

--fun1 call--

fun1(1-1)

--fun1 call--

fun1(0)= 12

fun1(1)= 12

fun1(2)= 12

fun1(3)= 12

******* fun2 call ********

26 + fun1(2)

--fun1 call--

fun1(2-1)

--fun1 call--

fun1(1-1)

--fun1 call--

fun1(0)= 14

fun1(1)= 14

fun1(2)= 14

******* fun2 call ********

40 + fun1(1)

--fun1 call--

fun1(1-1)

--fun1 call--

fun1(0)= 15

fun1(1)= 15

******* fun2 call ********

fun2(0)= 55

fun2(1)= 55

fun2(2)= 55

fun2(3)= 55

fun2(4)= 55

fun2(5)= 55

final = 55

____________________________________________________________________________________ Ans: 55

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Answer: 511

Explanation:

The binary heap contains 1023 elements.

When it performs minimum comparisons it will take Ceil(n/2)

n=1023

= Ceil(1023/2)

= 512

So, the maximum element is also part of n/2. So, we have to subtract from the total elements

=512-1

=511

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Answer: 4

Explanation:

Rank(AB)≥Rank(A)+Rank(B)−n. So option I is wrong.

Rank is the number of independent rows(vectors) of a matrix. On product of two matrices, the combined rank is

more than the sum of individual matrices (subrtraced with the order n)

det(AB) = det(A).det(b) as the magnitude remains same for the matrices after multiplication.

Note: We can just take a 2x2 matrix and check the options.

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Ans: 511

Option: 4

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Answer: 3

Explanation:

The wait(a) ensures that count value is correctly incremented (no race condition) if(count==n) signal (b); // This

signal(b) statement is executed by the last (nth) process only. Rest of the n-1 processes are blocked on wait(b).

Once the nth process makes signal(b) then rest of the processes can proceed

an enter Code section Q.

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Answer: 4

Explanation:

In rule 2 for production A-> XY the attribute “i” is calculated from the right sibling Y in

X.i= A.i + Y.s which is violating the L attribute definition, as in L attribute calculating attribute vale from RHS

sibling is not allowed.

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Option: 3

Option: 4

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Ans: 44 Explanation: Threshold = 32 Kb, MSS = 2KB, RTT = 6ms Here, t + 60 is nothing but at the 10 RTT (60/6 = 10), but here it’s asking after all acknowledgement are processed it means after the 10th RTT, .i.e at the 11RTT 1st transmission: 2 KB 2nd transmission: 4 KB 3rd transmission: 8 KB 4th transmission: 16 KB 5th transmission: 32 KB (Threshold reached) 6th transmission: 34 KB 7th transmission: 36 KB 8th transmission: 38 KB 9th transmission: 40 KB 10th transmission: 42 KB At the completion of 10th transmission RTT = 10*6 = 60 ms For the 11th transmission, The congestion window size is 44 KB ____________________________________________________________________________________

Answer: 3

Explanation:

The output of the given circuit is a+b’c.

Convert a+b’c into canonical form which is sum of minterms.

a+b’c = a(b+b’)(c+c’)+ (a+a’)b’c

= abc + abc’ + ab’c + ab’c’ + ab’c + a’b’c

Ans: 44

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=Σ(7,6,5,4,1)

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Answer: 4

Explanation:

Given numbers are 0x42200000 and 0xC1200000 which are stored in the registers R1 and R2,

respectively.

Register R1 Sign Exponent Mantissa

0(+ve) 100 0010 0 = 128+4= 132 010 0000..0

R1= 1.0100..0 X 2132-127.

= 1.0100..0 X 25

= 101.0 X 23.

= 5 X 8

= 40

R2 Sign Exponent Mantissa

1 (-ve) 100 0001 0 = 130 010 0000 ...0

R2= (-1) x 1.0100..0 X 2130-127.

= (-1) x 1.0100..0 X 23.

= (-1) x 101.0 X 21.

= (-1) x5 X 2

= -10

R3= R1/R2

= -4

= (-1)x 1.0 x 22.

Sign= 1

Mantissa= 000..0

Exponent= 2+127 = 129

R3 Sign Exponent Mantissa

1 1000 0001 0000..0

R3= 1100 0000 1000 000..0

= 0x C 0 8 0 0 0 0 0

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Option: 3

Option: 4

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Answer: 4

Explanation:

(P,155)(Q,85)(R,110)(S,30)(T,115)

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Answer: 99

Explanation:

If there are n vertices in the graph, then each spanning tree has n − 1 edges.

N =100

Edge weight is |i-j| for Edge (vi,vj) {1<=i<=100}

The weight of edge(v1,v2) is 1 , edge(v5,v6) is 1.

So 99 edges of weight is 99

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Option: 4

Ans: 99

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Answer: 81

Explanation:

pp(3,4) ⇒

a=3,b=4

tot=1

ex=a=3

len=tob(b,arr) which is 3

[

tob(4,arr)==>

b=4

b%2 =4%2=0 Condition is false then arr[0]=0

=> b=b/2 =4/2 =2

b=2

b%2 =2%2=0 condition is false then arr[1]=0

=>b=b/2=2/2=1

b=1

then b%2=1%2 condition is true then arr[2]=1

=>b=b/2=1/2=0

The i value is 3 [length is 3]

]

i=0,

arr[0] ==1 condition is false

ex=3*3=9

i=1

arr[1]==1 condition is false

then

ex=9*9=81

i=2

then arr[2]==1 condition is true

tot=tot*ex=1*81=81

ex=81*81

Finally it returns tot value which 81

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Ans: 81

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Answer: 4

Explanation:

L1 is undecidable as emptiness problem of Turing machine is undecidable. L3 is undecidable since there is no

algorithm to check whether a given TM accept recursive language. L4 is undecidable as it is similar to

membership problem.

Only L3 is decidable. We can check whether a given TM reach state q in exactly 100 steps or not. Here we have

to check only upto 100 steps, so here is not any case of going to infinite loop.

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Answer: 145ns

Explanation:

M=100ns

T=20ns

D=5000ns

h=0.95

p=0.1, 1-p=0.9

d=0.2, 1-d=0.8

EMAT = h×(T+M)+(1-h)[T+p[1-d)[D]+d[2D]]

= 0.95×(20+100)+(0.05)[20+0.1[0.8(5000)+0.2[1000]]

= 0.95 ×120+0.05×620

= 145ns

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Option: 4

Ans: 145ns

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Answer: 6

Explanation:

DFA 1: No. of a’s divisible by 2.

DFA 1: No. of a’s not divisible by 3

Using product automata.

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Ans: 6

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Answer: 3

Explanation:

L1 is regular. y can be expanded and w can also expanded. So x can be either "a" or "b"

So it is equivalent to

(a+b)+ a (a+b)+ a + (a+b)+ b (a+b)+ b

L2 is CFL since it is equivalent to complement of L=ww. Complement of

L=ww is CFL.

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Option: 3