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Foundry Characteristics
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Transcript of Foundry Characteristics
Ivan Peric, Monolithic Detectors for Strip Region
Foundry Characteristics
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• AMS H35• Minimal gate length 350nm• Number of metals: 4• Supply voltage 3.3V• Floating gate structure – isolated NMOS and PMOS within HV deep-n-well• Standard substrate resistivity 20 Ω cm• Higher resistivity on request possible• Wafer size 8 inch• Maximal reticle size: 22cm x 26 cm• Maximal chip size: chip + test structures fit into a circle of 3.11cm diameter (1.9cm x 2.45cm
possible)• TSV possible: pitch 260 µm• ER cost: mask set: 74.790 Euro (quote 2011)
ER cost: Engineering run 8 inch Wafers (6 started, 2 guaranteed): 19.800 Euro
Ivan Peric, Monolithic Detectors for Strip Region
Foundry Characteristics
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• AMS H18 (actually produced by IBM as CMHV7SF)• Minimal gate length 180nm• Number of metals: 6• Supply voltage 1.8V• Floating gate structure – isolated NMOS and PMOS within HV deep-n-well• Standard substrate resistivity ~10 Ω cm• Wafer size: 8 inch• Maximal chip size: 18,73 x 20,77 – but diagonal size matters• (so far biggest 20,76 x 18,73 with distance between reticles x = 100 um und y = 700 um for test
structures)• Run price:• 32 Masks x 4.500 €/Mask = 144.000 € • Engineering run (with 6 Wafers started and 2 Wafers guaranteed): 31.350 €
Ivan Peric, Monolithic Detectors for Strip Region 5
Reticle in H35
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Teststrukturen=scribe line
Chip
Multiple of 80µ
scribe Line (80µ)
Max. = 31112 µm ∅
22mm
26mm
d
Ivan Peric, Monolithic Detectors for Strip Region 6
TSV – bask side RDL
Face2Face Bumping of two Wafers (cross section)
nwellTransistor
M1
M3
M4
RDL(MET4_TSV)
H35-CMOS sensor(Wafer 2)
Thickness ~215µm
Wire bond
Bump
Wire bond pad(PAD_TSV)
0.13µ Readout Chip(Wafer 1)
Thickness ~100µm
VIAT_TSV
Read out ChipCMOS Side
SensorBackside RDL
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TSV – 3D detector
Cross section
Transistor
M1
M3
M4=MTTSV
M2
M4 (METB)
Tier2 (Readout part)
VIATTSV
M1
Tier1 (Sensor part)
Transistor
M3
Bond Oxide
Face2Back wafer bonding
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Pixel detectors
…
Readout chip
Detector as it is done now:Diode based pixel sensor bump-bonded to readout ASICs
Present development:CMOS pixel sensor capacitively coupled to readout ASICs
With TSVsCMOS pixel sensor with backside contactscapacitively coupled to readout ASICs
PCB
Pixel sensor(diode based)(e.g. 8 x 2cm)
CMOS pixel sensorseveral reticles(e.g. 4 x 2 cm)
Readout chip
Pixel sensor
Readout chips
Wire bond for sensor bias
Wire bonds for RO chips
Wire bonds for RO chips
Wire bonds for sensor chip
Readout chips
CMOS pixel sensor
Capacitive signal transmission CMOS pixel
sensorseveral reticles(e.g. 4 x 2 cm)
Readout chip
Wire bonds for sensor chip
Wire bonds for RO chips
CMOS pixel sensor with backside contacts
TSVs
Backside contact
PCB PCB PCB
Capacitive signal transmission
Ivan Peric, Monolithic Detectors for Strip Region 9
Pixel detectors with TSVs
… CMOS pixel sensorseveral reticles(e.g. 4 x 2 cm)
Readout chip TSVs
Capacitive signal transmission
Pixel sensorReadout chips
Contacts for the readout chip are fed through the sensor substrate
Bumps or capacitive signal transmission
Pixel sensor
Type A: sensor contacts on the back side
Type B: sensor- and readout chip contacts on the back side
Readout chip2x2cm
Sensor reticle1x2cm
TSV
Sensor reticle2x2cm
Sensor reticle1x2cm
Reticle-reticleConnection (power) TSVs for
sensor- and readout chip contacts
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Strip detectors
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Detector as it is done now:Diode based strip sensor wire bonded to readout ASICs Present development:
CMOS detectorWith TSVs:Advanced 3D detector with TSVs
Readout ASICLarge strip sensor (10x10cm)
100’s of wire bonds with pitch 80um
Flex PCB
CMOS sensor2x2cm
Pixels on the bottom tier(signals are multiplexed to readout lines)
Readout electronics placed on chip periphery
Flex PCB
Smaller number of wire bonds for IOs and power
Flex PCB
Readout electronics placed on top tier
TSVs (one per readout line)with a pitch of 80um connect pixels and readout electronics
Smaller number of wire bonds for IOs and power