EE 6904: Advanced Power Electronics - Khulna University of ...

EE 6904: Advanced Power Electronics

Lecture 10

PWM based 3‐φ VSCMultiphase and multilevel invertersMultiphase and multilevel inverters

Dr. Md. HabibullahAssociate Professor, EEE, KUET

Fig. Three‐phase VSI topology.

Three‐phase VSIFig. Three phase VSI topology.

Table: Valid switch states a b c

Department of EEE, KUET27/8/2020

Fig. The three‐phaseFig. The three phase VSI. Ideal waveforms for the SPWM (ma=0.8, mf =9): (A) ( a , f ) ( )carrier and modulating signals, (B) switch S1 state, (C) switch S3 state, (D) ac output voltage, (E) ac output voltage spectrum, (F) ac output current, (G) d ( ) ddc current, (H) dc current spectrum, (I) switch S1 current, d (J) di d D1and (J) diode D1

current.

Department of EEE, KUET 37/8/2020

Since the maximum amplitude of the fundamental

phase voltage in the linear region (ma≤1) is vi/2, the

maximum amplitude of the fundamental ac output

line voltage is √3vi/2.

Th fTherefore,

To further increase the amplitude of the load voltage, the amplitude of the modulating

i l b d hi h h h li d f h i i l hi h l dsignal vc can be made higher than the amplitude of the carrier signal vΔ, which leads to

overmodulation.

In the overmodulation region, the line voltages range is

7/8/2020 Department of EEE, KUET 4

Sinusoidal PWM with Zero Sequence Signal Injection

Fig. Zero‐sequence signal generator (ma=1, mf= 9): (A) block diagram, (B) modulating signals, d (C) d d l i i l i h i j iand (C) zero sequence and modulating signals with zero‐sequence injection.

The maximum amplitude of the fundamental ac output line voltage isThe maximum amplitude of the fundamental ac output line voltage is

≈15% more than the voltage produced by conventional spwm


produced by conventional spwm

Fig. The three‐phase VSI. Ideal waveforms for theIdeal waveforms for the SPWM (ma=0.8, mf=9) with zero‐sequence signal injection: (A) modulating i l (B) i dsignals, (B) carrier and modulating signals with zero‐sequence signal injection, (C) switch S1 j , ( )state, (D) ac output voltage, (E) ac output voltage spectrum, (F) ac output

t (G) d t (H)current, (G) dc current, (H) dc current spectrum, (I) switch S1 current, and (J) diode D1 current.


Quiz‐1(1) A three phase sine PWM inverter operates from a dc link voltage of 600 volts For(1) A three‐phase sine‐PWM inverter operates from a dc link voltage of 600 volts. Formodulation index = 1.0 the rms magnitude of line voltage of fundamental frequency will beequal to:( ) 600 lt (b) l 367 lt ( ) l 481 lt (d) l 581 lt(a) 600 volts (b) nearly 367 volts (c) nearly 481 volts (d) nearly 581 volts

(2) A three‐phase sine‐modulated PWM inverter is used to get a balanced 3‐phasefundamental output voltage. The modulating waveforms must havefundamental output voltage. The modulating waveforms must have(a) Three DC signals of identical magnitude (b) Three balanced ac signals of fundamental frequency (c) Three identical and in‐phase ac signals of fundamental frequency ( ) p g q y(d) Three balanced ac signals of carrier frequency

(3) Which modulation technique from the following yields the linear relationship of ?

(a) SPWM (b) Square wave (c) SPWM with zeo sequence signal injection

(4) The addition of the zero sequence reduces the peak amplitude of the resulting modulating signals (uca, ucb, ucc), while

(a) The fundamental components in the output voltage remain unchanged(b) The fundamental components increase by the factor ma


(b) The fundamental components increase by the factor ma(c) The low order harmonics remain unchanged as spwm

Space Vector PWM

Principle of Space Vector PWM

The SV‐based modulating technique is a digital technique in which the objective is to generatePWM load line voltages that are on average equal to given load line voltages.

p p

Treats the sinusoidal voltage as a constant amplitude vector rotating at constant frequency

This PWM technique approximates the reference voltage Vref by a combination of the eight switching patterns (V0 to V7)g g p ( 0 7)

Coordinate Transformation (abc reference frame to the stationary d‐q frame)

The vectors (V1 to V6) divide the plane into six sectors (each sector: 60 degrees)

Fig Basic switching vectors and sectors Vref is generated by two adjacent non‐zero vectors and two zero vectors

Fig. Basic switching vectors and sectors.

8Department of EEE, KUET7/8/2020

Space Vector PWM

Realization of Space Vector PWM:

Step 1 Determine Vd V V f and angle ()Step 1. Determine Vd, Vq, Vref, and angle ()

Step 2. Determine time duration T1, T2, T0

Step 3. Determine the switching time of each transistor (S1 to S6)


Space Vector PWM

cnbnan

cnbnand

V21V

21V

cos60Vcos60VVV

Step 1. Determine Vd, Vq, Vref, and angle ()

Coordinate transformation

b

cnbnq

V3V3V

cos30Vcos30V0V

: abc to dq

and

V21

211

2V

cnbnan V2

V2

V

cn

bnq

d

VV

23

230

2232

V

t2ππtω)VV(tanα

VVV

ssd

q1

2q

2dref

frequency)lfundamentaf(where,V

s

d

Fig. Voltage Space Vector and its components in (d, q).


Space Vector PWM (Modulating reference vector)

Step 2. Determine time duration T1, T2, T0 (1)

Fig. Reference vector as a combination of adjacent vectors at sector 1.


Space Vector PWM (Modulating reference vector)

Switching time duration at Sector 1

Step 2. Determine time duration T1, T2, T0 (2)

VdtVdtVVT

TT

0

TT

T1

2

T

0

T

0

1ref

z

21

21z 1

)3/(sin)3/(cos

V32T

01

V32T

)(sin)(cos

VT

)VTV(TVT

dc2dc1refz

2211refz

ππ

αα

)60α0(where,)3/(sin303)(sin

πα

)3/(i

2

1

)3/(sin)(sin)3/(sin)3/(sin

aTT

aTT

z

z

d

ref

sz210

V2V

aandf1Twhere,),(

)3/(sin

TTTT z

12

dcs V

3

Department of EEE, KUET7/8/2020

Space Vector PWM (Switching sequence)

Step 3. Determine the switching time of each transistor (S1 to S6) (1)

(a) Sector 1. (b) Sector 2.

Fig. Space Vector PWM switching patterns at each sector.




( ) S t 3 (d) S t 4


(c) Sector 3. (d) Sector 4.




(e) Sector 5. (f) Sector 6.


(e) Sector 5. (f) Sector 6.


Fig. The three‐phase VSI. Ideal waveforms for space‐vector modulation space vector modulation (vc=0.8, fsn=18): (A) modulating signals, (B) switch S1 state, (C) switch S t t (D) t tS3 state, (D) ac output voltage, (E) ac output voltage spectrum, (F) ac output current, (G) dc p , ( )current, (H) dc current spectrum, (I) switch S1current, and (J) diode D1

tcurrent.


Space Vector PWM

Comparison of Sine PWM and Space Vector PWM (1)

Fig. Locus comparison of maximum linear control voltagein Sine PWM and SV PWM.


Space Vector PWM

Comparison of Sine PWM and Space Vector PWM (2)

Space Vector PWM generates less harmonic distortion in the output voltage or Space Vector PWM generates less harmonic distortion in the output voltage or currents in comparison with sine PWM

Space Vector PWM provides more efficient use of supply voltage in comparison with sine PWM

Sine PWM: Locus of the reference vector is the inside of a circle with radius of

1/2 Vdc

Space Vector PWM: Locus of the reference vector is the inside of a circle with

radius of 1/3 Vdc

Voltage Utilization: Space Vector PWM = 2/3 times of Sine PWM


Multiphase InverterValid No. of states: 25=32

Fig. Circuit diagram of a five‐phase inverterFig. Circuit diagram of a five phase inverter

Advantages (compared to 3‐phase): higher reliability, g y higher power handling without exceeding the current handling capacity of control devices and insulations

Fig. Space distribution of all the possible voltage vectors


insulations better torque performance

Multilevel inverter

Fig. Individual phase arm with (a) two‐level (b) three‐level and (c) n‐level


Fig. Basic principle of multilevel output: (A) voltage source and (B) typical output.

Advantages of MLI:

1. Low dv/dt present in the PWM ac line voltages, and thus less voltage stress on

Advantages of MLI:

semiconductor switch

2. Low harmonic content in the output


3. Low switching frequency and thus high efficiency

Fig. Classification of the inverters.


Neutral Point Clamped (NPC) inverter


Table: Valid switch states for the three level neutralTable: Valid switch states for the three‐level neutral‐point‐clamped inverter, the left leg

i f l f h hFig. Left leg of three phase neutral‐point‐clamped inverter.


Fig. Three‐level VSI topology. Relevant p gywaveforms using an SPWM (mf ¼15, ma ¼0:8): (A) modulating and carrier signals, (B) switch S1a status, (C) switch S4b status, (D) inverter phase a voltage, (E) inverter phase a voltage

( ) l dspectrum, (F) load line voltage, (G) load line voltage

t d (H)spectrum, and (H) phase‐load a voltage.


3L‐NPC Design in simulink3L NPC Design in simulink


PWM generation


Reference1. Power Electronics Handbook, Fourth Edition‐‐‐‐‐‐‐‐‐‐‐ by M. H. Rashid

Lecture 11: Multilevel inverter (to be continued)ectu e u t e e e te (to be co t ued)


EE 6904: Advanced Power Electronics - Khulna University of ...

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