Differential Amplifier · PDF fileESE319 Introduction to Microelectronics Kenneth R. Laker...

ESE319 Introduction to Microelectronics

1Kenneth R. Laker update KRL25Oct13

Differential Amplifier Offset

● Causes of dc voltage and current offset● Modeling dc offset

● RC mismatch● IS mismatch● β mismatch● dc offsets in differential amplifiers due to component

mismatch can be modeled as differential phenomena

transistor mismatch



IC1

RC1 RC2

IC2

VCCVCC

+- VO

I

Q1 Q2

1. Let the ac sources be zero, i.e. the bases of matched Q1 & Q2 are connected to ground.

2. To further simplify, let there be no external base R

B and emitter resistors R

E.

3. Let the mismatch be in RC where R

C1 ≠ R

C2.

I

I C1=I C2=

1I2=

I2

If

VOdm

V Odm=0⇒RC1 I C1=RC2 I C2

V Odm=V C2−V C1=RC1 I C1−RC2 I C2

Since Q1=Q2 and I is fixed, currents are matched i.e.

VEE

I C1= I C2=I2⇒RC1=RC2



Assume matched currents:

I C1= I C2=I2

RC1≠RC2

Split the mismatch between bothcollector resistors, and decompose into common and differential components:

RC=RC2RC1

2RC=RC2−RC1

(common)

(differential - mismatch)

Solving for RC1

& RC2

:

RC2=RCRC

2=RC 1

12RC

RC

RC1=RC−RC

2=RC 1−

12RC

RC

Let:

I2

I2

s.t. RC2RC1

I

VOdm

vid /2

−v id /2

VEE

vic



V Odm=RC2 I C2−RC1 I C1

Recall:

V Odm=RCRC

2 I C2−RC−RC

2 I C1

V Odm=RCRC

2 I2−RC−

RC

2 I2

I C1= I C2=I2

Hence:

or:

V Odm=I2RC output offset voltage

I2

I2

random variable (rv)I

VOdm

RC1≠RC2

VEE

Iff balanced, RC1

= RC2

: V Odm=0V



V Odm=I2RC

Collector-collector voltage due toresistor mismatch:

V OS≡V Odm

Avdm

RC

VOS is highly variable, rv & can be + or -

VEE

VOdm

I2

I2

I

I2

I2

I

-VOS

0 V

VEE

VEE

Define the input offset voltageas that input voltage that will cancelVOdm. If the amplifier differential gainis Avdm:

Input offset voltage is the output offset voltage referred to the input due to mismatch .



V OS=V Odm

Avdm

V OS=

I2RC

g m RC

gm=I C

V T= I

21

V T

V OS RC =V T

RC

RC

Input referred offset due to ΔRC mismatch:

whereAvdm=gm RC

random variable

VEE

V Odm= I2RC

I2

I2

I

-VOS

0 V



Offset Voltage From Transistor Mismatch

V Odm=0⇒ RC1 I C1=RC2 I C2

Perfect balance requires:

Previous case considered RC1 ≠ RC2 & Q1 = Q2 => I

C1 = I

C2.

Consider now Q1 ≠ Q2 => IC1

≠ IC2

. ASSUME: 1. RC1 = RC2 = RC

2. VBE1 = VBE2 3. VT1=VT2Only difference is in the saturationcurrents of the transistors, i.e.

I S1≠ I S2

+ -VOdm

I

VEE

RC

RC



Again using common and differentialmode concepts:

I S=I S2 I S1

2

I S= I S2− I S1

The two transistor saturation currentsare:

I S2= I S I S

2

I S1= I S− I S

2

+ -

I

−v id /2

vid /2vic

VEE

V Odm



ICdm/2

I S eV BE /V T

I S

2eV BE /V T

I S eV BE /V T

− I S

2eV BE /V T

I C1

I C2

ICdm/2

I C≈ I S eV BE /V T

VeeI C1≈ I S1 e

V BE

V T = I S− I S

2 eV BE

V T

I C2≈ I S2 eV BE

V T = I S I S

2 eV BE

V T



I C1≈ I S eV BE

V T − I S

2 eV BE

V T

I C2≈ I S eV BE

V T I S

2 eV BE

V T

also

The parallel current sources areillustrated in the schematic.

ICdm/2

ICdm/2

Large signal Model:I S eV BE /V T

I S

2eV BE /V T

I S eV BE /V T

− I S

2eV BE /V T

Vee

I C1

I C2

I C2≈ I S I S

2 eV BE

V T

I C1≈ I S− I S

2 eV BE

V T

I C1≈ I S1eV BE /V T

I C2≈ I S2 eV BE /V T



I C2≈ I S eV BE

V T I S

2 eV BE

V T ≈ I S eV BE

V T 1 I S

2 I S

I C2≈I21

I S

2 I S

I C1≈I21−

I S

2 I S

I C≈ I S eV BE

V T ≈ I2

Note: differential IC componentscause current flow in oppositedirections through the RC'sresulting in an offset voltage. Thecommon IC components cause no offset voltage.

V Odm=RC I C2−RC I C1≈I2 I S

I SRC



gm=I C

V T≈ I21

V T

V Odm≈I2 I S

I SRC

V Odm≈I2

V T

V T

I S

I SRC

V Odm≈gmV T

I S

I SRC

V OS I S≈V T

I S

I S

random variable

V OS I S =

V Odm

Avdm=

V Odm

g m RC≈V T

I S

I SRecall:



Offset Voltage Summary 1. We considered two sources of offset voltage: a. Unbalanced collector resistors

b. Unbalanced saturation currents i. Due to mismatched transistor geometries

2. We ignored base or emitter circuit unbalance

3. Since the relationship between resistor and current unbalances are random and assumed independent, we combine their effect as an rms quantity:

V OS rms=V OS−RC2V OS− I S

2=V T RC

RC 2

I S

I S 2



Average & Offset Base (input) Bias CurrentsConsider the case where the base currents differ IB1 ≠ IB2.

Since IB1 & IB2 are related to bias current I, their mismatch may be due to β1 ≠ β2.

Let's represent β1 & β2 in terms of differential & common components:

1=2

2=−2

I B1 I B2

I E1=I2

I E2=I2

vid /2

−v id /2

vi−cm

VEE



I B1≈I211=

I2

1

2

=I21

1

12

Using this notation, the two base currents are:

11x

=1−xx2−x3...≈1−x

For x << 1 we can expand the fraction as the series:

where x≈±2

nonlinearf(Δβ)I B2≈

I212=

I2

1

−2

=I21

1

1−2



I B1≈I21 1−12

I B2≈I21 112

Using the expansion and approximating :

I B=I B1 I B2

2= I2

I OS ≡∣I B1− I B2∣=I2∣

∣¿

IOS= I B∣ ∣

The base or input offset current can also be written as:

(input offset current)

1≈

Since the input bias current IB is defined as:



DC Offset Voltage & Current Summary1. DC offset voltage and current occur due to mismatches in the BJT

differential amplifier external resistors and transistor parameters (Is

and β).

2. These mismatches are imperfections that are inherent to all differ-ential amplifiers and their applications (e.g. op amps).

3. DC offset voltage and current are statistical quantities, i.e. no two differential amplifiers will have the same offset voltage and current.

4. MOS differential amplifiers have zero input offset current.

Differential Amplifier · PDF fileESE319 Introduction to Microelectronics Kenneth R. Laker...

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