High-Speed Circuits & Systems Lab.

Dept. of Electrical and Electronic Engineering

Yonsei University

Design Project Guideline

2015.12.8

2 page / 10 page

Goal

nMOS & pMOS small-signal parameter extractiongm, ro calculation

Amplifier designSatisfy gain, output swing, power consumption

M1

M2

M3

M4

VDC

Vin

Vbias2

Vbias3

Vout

R=50Ω

VDD VDD

3 page / 10 page

Pspice Simulation

In class homepage,

Download!

4 page / 10 page

Small-Signal Parameter Extraction

VDS=2V Plot ID vs VGS

gm calculation(𝜕𝐼𝐷

𝜕𝑉𝐺𝑆)

Maximum gm>3mS

VG=1.25V Plot ID vs VDS

ro calculation(𝜕𝐼𝐷

𝜕𝑉𝐷𝑆)

ro>185kΩ

5 page / 10 page

ID vs VGS

VGS

VGS

ID

gm

Trace Add Traces D(‘your wave’)

Maximum gm>3mS

6 page / 10 page

ID vs VSD

VSD

ID

Average Slope(1V~2V) = 1/roro>185kΩ

Cursor Usage

7 page / 10 page

Amplifier

Vsin

VOFF=0VAMPL=2.5mFREQ=1k

Output swing > 0.9 Vpp

Gain( 𝐴𝑣 =𝑣𝑜𝑢𝑡

𝑣𝑖𝑛) > 40dB

dB = 20*log( 𝐴𝑣 ) Power consumption < 35mW

VDD * (current summation)

8 page / 10 page

Output Swing

DC sweep(Vin vs Vout)

Vin

Vout Output swing>0.8V

9 page / 10 page

Transient Simulation

vout

Vin=5mVvout/vin > 40dB

10 page / 10 page

Grading Policy

Small-signal analysis[20], Single-ended amplifier[50], Report[30]

For gain of amplifier, design with larger gain will get more points. Grade policy is followed in table.

Deadline : 10:00 AM , 23 Dec. 2015 @ B629(Hardcopy)

Grade A ( 6 person ) 10 points

Grade B ( 6 person ) 8 points

Grade C ( 6 person ) 6 points

Grade D ( 6 person ) 4 points

Grade E ( 6 person ) 2 points