120 August 2008

In microwave circuits, distributed transmission lines areused to perform specific circuit functions. This can be assimple as a 50-Ω line carrying energy from one point to

another, or it can be used for matching or component inte-gration. Certain transmission line configurations are oftenpreferred for specific applications. For instance, coaxialtransmission line is well-shielded and can be flexible and,therefore, is useful for connecting components or subsys-tems. Alternatively, coplanar stripline, a balanced dual-striptransmission line, makes an excellent feed for printed dipoleantennas. Other attributes of transmission lines are ease ofintegration of passive and active components, loss, andachievable range of impedances, as well as other application-specific characteristics.

The most commonly used type of transmission line inmodern microwave circuit designs is microstrip, which con-sists of a single conductor on top of a grounded dielectric sub-strate (Figure 1). Microstrip is the dominant choice of planarmicrostrip circuit designers because it is simple with which todesign and simple to route. Additionally, the commercialmicrowave computer-aided design (CAD) market has devel-oped a significant infrastructure for both transmission-line-theory-based microstrip design and reliable microstrip elec-

tromagnetic (EM) simulation. For a fixed transmission linecharacteristic (substrate thickness, h, and relative permittivity,εr), control of characteristic impedance is solely through thestrip width, W. This makes the task of synthesis and layoutsof microstrip circuits fairly straightforward.

There are, however, several disadvantages to microstrip forspecific applications. True grounding can only be accom-plished by accessing the backside ground by a via through thesubstrate. This can be challenging for some materials, or havea large amount of undesirable associated inductance at higherfrequencies. Microstrip is also difficult to use when the electri-cal thickness of the substrate becomes a significant fraction ofa wavelength in the substrate. In this case, energy easily radi-ates or may couple to adjacent structures. Accurate designusing microstrip CAD models becomes increasingly problem-atic as the substrate electrical thickness becomes appreciable,but can be mitigated through the use of in-depth EM simula-tion. At even higher frequencies, substrate modes begin topropagate, and design becomes even more challenging.

In contrast, coplanar waveguide (CPW) overcomes someof these specific limitations. It was first introduced by C.P.Wen in 1969 when he described its benefits for circuit minia-turization and component integration [1]. The most basicconfiguration for CPW consists of a center conductor strip ontop of a dielectric substrate with two ground conductors adistant s on either side, as shown in Figure 2. Note thatFigure 2 shows a substrate of thickness, h. In practice, theback of this substrate is often in contact with a metal pack-age, coated with metal, or metalized. Since the ground is atthe same level as the signal line, the inductance associatedwith accessing ground is significantly reduced. The charac-teristic impedance of the transmission line is determined byboth W and S. This means that a particular Z0 can beobtained over a wide variety of CPW channel widths(2xS + W), making design not quite so clear-cut, but poten-tially adding additional design flexibility. For instance, thechannel width can be made wider to minimize conductorlosses or narrower to feed into a small transistor with mini-mal impedance discontinuity. Additionally, CPW showslower dispersion than microstrip, which means that it shouldbe more suitable for some broadband applications.

There are a variety of disadvantages to CPW, however.From a practical perspective, there is more limited design andlayout infrastructure in the microwave CAD market, makingit more challenging to design with. Packaging may also bemore challenging than packaging a microstrip circuit sinceadding a metal plane at the back of the substrate causes addi-tional parallel-plate waveguide modes which must be dealtwith, typically by using a thinned substrate and a significantnumber of substrate vias for parallel-plate mode suppression(more about this later).

Figure 1. Cross-section of a microstrip transmission line.

εrh

t

Wεh

t

Wr

Figure 2. Configuration of CPW transmission line.

h

t

εr

s w s

William R. Deal is with Northrop Grumman Corporation, One Space Park,M5/2154, Redondo Beach, CA 90272 USA.

Digital Object Identifier 10.1109/MMM.2008.924965

Coplanar Waveguide Basics for MMIC and PCB Design■ William R. Deal

August 2008 121

In this article, we describe a variety of aspects of CPWdesign, including a brief description of its applicability, circuitdesign tips, and a description of the most common techniquesfor dealing with undesired modes. The contents are necessar-ily brief and geared toward introducing an inexperiencedmicrowave circuit designer to some important CPW designconcepts. For an extensive reference source on CPW theoryand implementation, [3] comprehensively gathers a signifi-cant amount of data. Finally, note that all of the simulations inthis article use Agilent’s Advanced Design System for bothCPW transmission line modeling and EM simulation usingthe Momentum 2.5-D EM simulator. A variety of robust com-mercial CAD and EM tools are currently available that arecapable of developing CPW circuit designs.

CPW BenefitsThe three most common applications for CPW circuits are forhigh-frequency microwave monolithic integrated circuits(MMICs) where low inductance access to ground is critical,lower-frequency applications where backside processing may bechallenging or cost prohibitive [such as fabrication of integratedcircuits (ICs) on a SiC substrate], and broadband applicationswhere dispersion becomes an issue.

For high-frequency MMICs, practicalsubstrate thickness and backside viainductance dictate whether to design inmicrostrip or CPW. For instance, GaAsMMIC amplifiers have become common-place and are commercially availablefrom a variety of sources. For commercialprocesses at W-band, 4-Mil GaAs sub-strates are a common choice becausethey are easily handled and microstripdesigns can still be successfullydesigned. However, limitations in deviceand bypass grounding begin to comeinto play.

Shown in Figure 3 is a simple simula-tion of a generic 60-um, 0.1-μm GaAshigh electron mobility transistor (HEMT)grounded with CPW transmission linesor 4-mil thick microstrip substrate vias. The CPW groundedtransistor shows a break between the maximum available gain(MAG) and maximum stable gain (MSG) at ∼88 GHz. In thecase of the microstrip configuration grounded with 4-mil thicksubstrate vias, the MAG/MSG break has shifted down to ∼55GHz due to the additional inductance at the source of theHEMT transistor. If one remembers that a common rule ofthumb for higher power amplifier designs is to choose adevice with the MAG/MSG break slightly above the maxi-mum design frequency, it would appear that a designer couldeither use a larger transistor (and larger associated outputpower) at a fixed frequency or design at a higher frequency fora fixed transistor size if designing with CPW. Although this isa bit of an oversimplification—for example, the S11 plot andS21 show that the microstrip grounded transistor hasimproved matching due to the inductive feedback at the

source and therefore slightly higher S21—it does illustrate thefundamental reason that CPW is often chosen for high-fre-quency MMICs.

A second very practical issue for microstrip designs at highfrequencies is availability of low-inductance shunt capacitorsfor either bypassing or grounding. The impact of groundaccess by a substrate via is easily shown. An example of agrounded microstrip metal-insulator-metal (MIM) capacitoris shown in Figures 4 and 5, which compares an EM simula-tion of a 2.81-pF MIM capacitor on a 4-mil GaAs substrate(blue) to an ideal, lumped 2.81-pF grounded capacitorresponse (red). The impact of backside via inductance andMIM back plate capacitance is clearly visible; at 100 GHz, themagnitude S21 of the microstrip structure is ∼0.8. Currentdistribution of the structure is shown in Figure 5 at a fre-quency of 90 GHz. Lack of good bypassing capability is clear-ly evident. Large amounts of current passes through the struc-ture to the output microstrip line. Note that the top plate ofthe MIM capacitor is indicated by a white outline for contrast.

A common practice to overcome this problem in millime-ter-wave microstrip amplifier design is to add radial stubs tothe decoupling networks to bypass in-band frequencies by

Figure 3. Comparison of S11 and MAG/MSG for a 60-um HEMT on a 4-Mil GaAssubstrate with CPW (red) or microstrip backside via (blue) grounding.

S11

10 20 30 40 50 60 70 80 90100

0 110

0

5

10

15

20

25

−5

30

Frequency [GHz]

S21

or

Max

Gai

n [d

B]

CPWMicrostrip

Figure 4. Current distribution at 90 GHz. Note that most of thecurrent is passed through the capacitor due to the high via andbottom capacitor plate inductance.

BacksideVia

Via PadMIM Capacitor

122 August 2008

forming a virtual short circuit. This is followed by MIMcapacitors to provide bypassing for lower frequencies.Although this can work well and is commonly used, the res-onant geometry radial stubs typically use a considerablyamount of chip real estate, which adds to the chip cost.Additionally, resonant geometry stubs on a moderately elec-trically thick substrate easily couple to adjacent structures.Therefore, accurate design requires a significant amount ofEM simulations where possible coupling paths should beincluded in the simulation. This makes millimeter-wavemicrostrip time consuming and CAD intensive. We will showlater in this article that grounded CPW MIM capacitors per-form significantly better than microstrip MIM capacitors, andalmost as well as ideal lumped capacitors.

A final limitation to microstrip design at higher operatingfrequencies is due to limitations in backside processing.Recently, CPW MMIC low-noise amplifiers [3] and power

amplifiers [4] have pushed to submillimeter-wave frequencies( f > 300 GHz). Due to substrate modes, a successful microstripimplementation at 300 GHz would require that the substrate bethinned to 1-Mil or less due to substrate modes and couplingeffects, which presents considerable yield and handling chal-lenges. Therefore, it is expected that the highest-frequencyMMIC amplifiers will continue to be implemented in CPW.

CPW Circuit Design Modern microwave design software typically includes anextensive palette of discontinuities and components formicrostrip, the most common type of planar transmissionline. This typically includes T-junctions, step discontinuities,spiral inductors, various coupled line configurations, andmany others. Unfortunately, this is not true for CPW trans-mission line components and discontinuities. This is likelydue to the more limited application of CPW and to its two

design variables (width and gap), mak-ing it considerably more complicated tomap the functional dependence of com-ponents and discontinuities. Two thingscan mitigate the impact of this. First, theimpact of a specific CPW discontinuitycan be reduced by taking advantage ofthe two design variables to shrink theelectrical size of the discontinuity. Forinstance, narrow open stubs can be usedto minimize open-end capacitance andgradual tapers with fixed characteristicimpedance can be used to avoid abruptstep discontinuities. The second advan-tage is that the parasitics are often muchlower than with microstrip, particularlyif ground is being accessed.

The information in this section isintended to draw attention to common CPW circuit designissues, including modeling discontinuities, and to providesome tips on performing EM simulations in CPW. In particular,we discuss common CPW transmission line discontinuities,such as T- and cross-junctions as well as IC passive componentsin CPW, such as the CPW MIM capacitor. The concepts areintroduced from a MMIC designer’s perspective, but theresults are typically directly applicable to microwave PCB orMIC design if the correct mounting parasitic is accounted for.

T-Junction and Cross-JunctionThe T-junction and cross-junctions are used to connectseveral transmission lines together, as shown in Figure 6 for aT-junction. To the author’s knowledge, limited or no parame-terized models for T- or cross-junction models have beenpresented in the literature. This is at least partially due tothe large number of design variables involved (six for theT-junction and eight for the cross-junction), but also due tothe fact that the configuration of airbridging must also betaken into consideration, which can be done in a variety ofconfigurations and have a significant impact on performanceof the discontinuity.

Figure 6. Diagram of a CPW T-junction with two differentimpedance CPW lines.

W 1

W 3

S 1

S 3

S 1

S 3

Airbridges

Figure 5. EM simulation of 2.81-pF MIM capacitor realized on 4-Mil GaAs (blue) ver-sus ideal lumped capacitance (red) over a simulation frequency of 1-100 GHz.

Ideal Capacitor

EM Simulation

1.00

0.75

0.50

0.25

0.00

−0.25

−0.50

−0.75

−1.00

S21

S11

August 2008 123

A plot of the current distribution for a symmetric T-junction illustrates these points, as shown in Figure 7. Thecurrent distribution is at 150 GHz for W = 15 um and S = 15um on 4-Mil GaAs. Substrate vias have been added to thesimulation; these are placed far enough from the transmissionlines so that they do not disturb the CPW current distribution,but still prohibit resonances that would occur if they were notincluded in the simulation. Airbridges are clearly visible inthe three-dimensional (3-D) view and are 3 um above thelower metal. From the figure, it is clear that a significantamount of current flows through the airbridge that crosses theport 2 transmission line. Additionally, the current flowingfrom port 1 to port 2 is primarily concentrated along the slotbetween the two. A detailed model of the T-junction wouldmost logically look at the interaction from the perspective ofa variety of slot lines. A simple equivalent circuit that does areasonable job capturing the T-junction response is shown inFigure 8. The model uses CPW lines rather than slot lines dueto simple availability in commercial CAD tools. For the port 1to port 2 path, electrical delay is considered as the lengththrough the center of the upper slot (G1/2 + G2/2). For theport 1 to port 3 electrical path, the electrical delay is consid-ered as the physical length of the T-junction, or 2xG2 + S2.For simplicity, the physical widths of the CPW transmissionlines are used. However, this may overestimate the shuntcapacitance and series inductance. For the case shown inFigure 9, the simple model is compared to a deembedded EMsimulation. Both S21 and S31 agree almost perfectly, but somephase discrepancy is shown in S11. Note that this has been fit-ted for one particular case where all feeds are symmetric andgap and widths are nearly equal, and care should be taken inuniversally applying the model.

Shunt CapacitorBypass capacitors in CPW also benefit from low inductance toground. The MIM capacitor, commonly used in MIC andMMIC circuits, can be constructed so that the back plate of thecapacitor is formed by the CPW ground plane and the CPWsignal line is airbridged onto the top plate of the capacitor.This forms a shunt capacitor with low series inductance. In ICapplications, this is one of the primary benefits of using CPW.

In many cases, it is sufficient to model a shunt CPW capacitorsimply as an ideal lumped capacitor. This is due to theextremely low inductance of the capacitor, which does notlimit the operating frequency as does microstrip bypassing.Note that this is true if the bypass capacitor uses a well-grounded back plate, preferably directly integrated into theCPW ground plane with no series gaps.

Figure 7. Plot of current distribution for a CPW T-junction. Notethat all junctions use W = 15-um and S = 15-um CPW transmission lines on CPW GaAs. Current is plotted at 150 GHzwith port excitation at port 1.

1

2

3

Figure 8. Simple transmission line model for estimating T-junc-tion parasitic response.

W=W2S=S2L=G1/2

W=W2S=S2L=G1/2

W=W1S=S1L=W2+G2

W=W1S=S1L=G2/2

W=W1S=S1L=G2/2

Figure 9. Comparison of simple T-junction (red) model to EM simulation (blue).

0.8

0.6

0.4

0.2

0.0

−0.2

−0.4

−0.6

−0.8

0.8

0.6

0.4

0.2

0.0

−0.2

−0.4

−0.6

−0.8

S21

S21S11

124 August 2008

This is illustrated in Figure 10, which shows an EM simu-lation (blue trace) of the configuration compared to the idealresponse of a 2.81-pF lumped capacitor connected to ground(red trace). Note that the reference plane of the EM simulationis deembedded directly to the edge of the MIM capacitor, withthe simulation frequency over a range of 1–100 GHz. For sim-plicity, the lumped-element capacitor value is simply the par-allel-plate capacitance formed by the capacitor top plate toground; no fringing capacitor is used. It is somewhat surpris-ing that the phase response of S21 agrees within a few degreeswith the EM simulation even where the size of the top plate isa fairly significant percentage of a free space wavelength.Shown in Figure 11 is the current distribution of the 2.81-pFMIM capacitor at 10.0 GHz. At 10 GHz, the 2.81-pF capacitormakes an effective bypass capacitor and no current is visibleat the output port. Note that the current on the top plate of thecapacitor is low enough in intensity that a white outline isadded to distinguish the top plate of the capacitor from CPWground plane, which is drawn in the same color.

For comparison purposes, a considerably smaller 0.19-pF shunt MIM capacitor is also analyzed. This capacitormight be used as a shunt matching element rather than abypass capacitor. The results are shown in Figure 12.

Again, agreement between EM simulation (blue trace) andsimple shunt capacitance calculated from the parallel-plate capacitance value is extremely close. The currentplots at 10.0 GHz (Figure 13) show a good portion of thecurrent crossing the low-value shunt capacitor and cou-pling to the output.

Spiral Inductors Spiral inductors are often used in lower frequency in bothMIC and MMIC designs. They are commonly used for bothmatching and decoupling networks (RF chokes). Spiralinductors can also be implemented in CPW. The primaryparasitic capacitance is to the top-side coplanar ground sur-rounding the spiral and to the backside ground plane ifimplemented in grounded CPW. From our experience, theperformance of CPW spirals is fairly comparable to themore commonly encountered microstrip spiral inductor. Atwo-dimensional (2-D) layout of a CPW spiral inductor isshown in Figure 14, with the blue and green colors in thefigure indicating different metal layers for realizing the spi-ral inductor and the physical cross-over to access the innerside of the spiral inductor.

Commercial microwave CAD tools typically have simplemicrostrip spiral inductor models, butthese typically do not model airbridgecrossover effects, which add a signifi-cant amount of capacitance and there-fore lower the spiral inductor reso-nance frequency. Therefore, circuitdesigners typically rely on either EMsimulation data or measured spiralinductor data when using microstripspiral inductors. Similar is true forCPW spiral inductors. For MMIC cir-cuit design, where a variety of spiralinductor values are typically required,it is practical to develop “families” ofspiral inductors with a fixed conductorwidth and gap and then increment thenumber of turns. This is convenient incircuit design because S-parameters of

different spirals can be swapped until a close to optimalvalue is found. Also shown in Figure 14 is the approximatelow-frequency inductance of a family of spiral inductorsranging from one to six turns. The inductance was estimat-ed from the S-parameters obtained from a 2.5-D EM analy-sis by simply assuming the low-frequency admittance isdue only to inductance and calculated at 100 MHz. Two setsof assumptions are tested in the EM simulation. One set ofvalues is for a spiral formed by an infinitely thin conductorand the second is for a conductor thickness equal to the fab-ricated conductor thickness. As can be seen, the two sets ofsimulations give slightly different answers, but a polynomi-al fit to both sets of data show extremely good correlationwhile incrementing the number of turns. The original pur-pose for making this plot was as a simple test to check thatall of the EM simulations were performed properly.

Figure 11. Current distribution of the MIM capacitor at 10GHz. Note that a white outline has been added to indicate borderof the capacitor top plate.

Thu Feb 15 : 11 : 40 2007 Shunt_THRUMIM_EM

Figure 10. Comparison of an ideal shunt lumped 2.81-pF capacitor (red) to EM simulationdeembedded to reference plane of capacitor (blue) with frequency swept from 1-100 GHz.

Ideal Capacitor

EM Simulation

1.00

0.75

0.50

0.25

0.00

−0.25

−0.50

−0.75

−1.00

S21

S11

August 2008 125

However, it also shows that it is feasibleto develop simple empirical models forCPW spirals as has been done formicrostrip spirals.

Circuit Layout ExamplesThe layout of two circuits is shown inthis section to illustrate what the CPWelements look like when implemented ina circuit. The first of these is a two-stageX-band MMIC amplifier which usesCPW spiral inductors, HEMT transistors,MIM bypassing capacitors, and thin filmresistors (TFR) and is shown in Figure 15.The circuit is on a 25-Mil thick GaAs sub-strate that is not backside processed. Thefirst transistor uses shorted CPW trans-mission lines for source degradation; inan LNA, this is useful with aligning opti-mum noise match and input match. In a microstrip LNA, aportion of this inductance would have been added by thebackside via. Experimental results and measured versusmodeled data are available in [5].

A second circuit is shown in Figure 16. This circuit isdesigned to operate from 80-100 GHz. The use of CPW atthese frequencies allows each stage of the amplifier to be fit-ted closely together, which can result in broad bandwidth.This is possible because substrate vias are not directly con-nected to gate and drain bypassing capacitors, making thelayout much more compact in those regions. From themicrophotograph, pads for the substrate vias are visible asdarker square regions in the CPW ground planes (not that thismicrophotograph is taken before backside processing). Thesize of the substrate vias pads is comparable to the MIMbypass capacitor size at these frequencies. Also note that the

Figure 12. Comparison of an ideal shunt lumped 0.19-pF capacitor (red) to EMsimulation deembedded to reference plane of capacitor (blue) with frequency swept from1–100 GHz.

Ideal CapacitorEM Simulation

1.00

0.75

0.50

0.25

0.00

−0.25

−0.50

−0.75

−1.00

S21

S11

Figure 13. Current distribution on 0.19-pF MIM capacitor.

0.19-pF MIM

Thu Feb 15 11:10:29 2007 shunt_THRUOp2pf_EM

Figure 14. (a) Layout of a CPW spiral inductor and (b) approximate extraction of spiral inductance at 100 MHz for a family of spiralinductors ranging from one to six turns.

CPW Spiral, W=10, S=5- m

y = 0.0374x2 − 0.0266x + 0.1871R2 = 0.9995

y = 0.034x2 − 0.0397x + 0.1519

R2 = 0.9997

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

1 2 3 4 5 6

No. of Turns

Indu

ctan

ce [n

H]

Thin Conductor SimulationThick Conductor SimulationPoly. (Thin Conductor Simulation)Poly. (Thick Conductor Simulation)

(a) (b)

126 August 2008

dc pad at the top right is not connectedto the CPW ground plane by top-sidemetallization (represented by a red cir-cle), but instead relies on substrate viasfor dc connection. This is not generallyadvisable if it is desired to conduct mea-surements before backside processing.Detailed circuit performance can befound in [6].

Other Modes in CPWOne issue that must be carefully under-stood in CPW design is the presence ofother modes. There are a variety ofmodes that must be dealt with, or adesign may suffer from unexpectedlyhigh losses or visible resonances in thefrequency response. These fall into threeclassifications. The first of these is exci-tation of the coupled slotline mode dueto the three-conductor nature of CPW.The second is the excitation of the paral-lel-plate waveguide mode if a backsideground plane is introduced. The thirdarises in ungrounded CPW when thedimension of the total ground planebecomes large enough that it resonatesin a manner analogous to a microstrippatch antenna. Additional resonancescan occur when packaging the circuit,but must typically be handled in thepackaging design. Finally, for complicat-ed circuits, careless layout can causeground loops or related problems if thecoplanar ground planes are not carefullyconnected using airbridges.

Potential excitation of the coupledslotline mode is prevalent in all CPW configurations (ground-ed or ungrounded) due to CPW’s three-conductor nature.Although we consider the two outer conductors to form a sin-gle, effective ground, in most places the two ground planesare not physically connected. This very fact means that anoth-er dominant mode can propagate in the structure shown inFigure 2. That mode is the coupled slotline mode. A compari-son of the basic electric field lines for CPW mode and coupledslotline mode is shown in Figure 17. For the CPW mode, theelectric field starts on the center conductor and is symmetri-cally terminated on the two ground planes. For the coupledslotline mode, the three unconnected conductors are at differ-ent potentials and the fields in one of the slots of the CPW areseemingly reversed in direction. In practice, this undesiredmode is easily handled by connecting the two ground planes.This places the two ground planes at the same potential andtherefore shorts out the coupled slotline mode. This is done inMMIC circuits simply by using an airbridge. In practice,lower-frequency PCB and MIC circuits are connected to coax-ial cables using connectors which should short the coupled

Figure 15. Layout of X-band two-stage CPW MMIC amplifier.

Figure 16. Layout of a W-band three-stage MMIC amplifier.

Figure 17. Comparison of (a) CPW mode electric field profile and(b) coupled slotline mode.

Coplanar Waveguide Mode(a)

Coupled Slotline Mode(b)

August 2008 127

slotline mode if soldered at both grounds. In practice,ground straps or airbridges are commonly attached at alldiscontinuities and periodically along electrically long CPWtransmission lines.

An example of the impact of airbridges is shown inFigure 18, which consists of two open-circuit CPW stubs∼λ/4 in length and separated by ∼λ/4 spacing to form atuned notch. Simulated S-parameters of the structure withand without airbridges is shown in Figure 19. Note that thesimulation predicts 10-dB isolation for the nonairbridged cir-cuit at 116 GHz and more than 30 dB for the airbridged struc-ture. This is supported by the plot of the current distributionin Figure 18, which shows a fair amountof current at the output port for the non-airbridged structure and little or no cur-rent past the first shunt stub for the air-bridged structure. While these simula-tions do not systematically prove thatthe effect is due to the coupled slotlinemode, it does clearly demonstrate theimpact of airbridging in a CPW circuit.Since simple transmission line modelsdo not take into consideration anyeffects related to coupled slotline modeor airbridging, care must be taken inlayout to place airbridges whereverappropriate and to perform EM simula-tions when in doubt.

The second type of undesired modethat must be dealt with occurs when abackside ground is added to the CPWconfiguration. This is known as ground-ed coplanar waveguide (GCPW) or con-ductor backed coplanar waveguide(CBCPW). Of these two terms, GCPW ismore commonplace. However, the refer-ence to grounding has a tendency to con-fuse some designers experienced withmicrostrip design. Circuit ground fortransistors and components is still thetopside CPW ground for the CPW mode,although the backside ground adds addi-tional capacitance and changes the char-acteristics of the CPW transmission line.For this reason, CBCPW may be moredescriptive, even though it is less popular. It should be notedthat adding the backside ground does mean that a microstrip-like mode is supported by the geometry which should be con-sidered when planning out a CPW topology. For instance,using a wide W and S and then choosing a substrate thicknesssuch that the center conductor looks like 50 | to the microstriptransmission line would probably be inadvisable. However, themost commonly encountered problem in adding a backsideground is excitation of the parallel-plate waveguide mode.

In the regions not defined by the CPW channel, groundedCPW presents the same cross-section as dielectric filled wave-guide. If not properly dealt with, energy can leak out of the

CPW channel, causing increased transmission line insertionloss. Energy leaking into the parallel-plate waveguide modemay also potentially be reflected at the end of the coplanarground plane and be reflected back to the CPW channel. Ifthis energy couples back to the CPW channel, this could causeresonances in band. Alternatively, energy leaking into thesubstrate mode could couple to other circuit components,leading to degraded isolation, resonances, or oscillation inactive circuits. The most common technique for mitigatingthis is shown in Figure 20, where substrate vias have been

Figure 18. Comparison of (a) current distribution at 116 GHz for CPW double-stubwithout and (b) with airbridges. Note that without airbridges, the circuit is sufficientlydetuned that an appreciable amount of energy passes through the structures.

(a) (b)

Figure 19. Comparison of double-stub circuit with and without airbridges.

Airbridged

Not Airbridged

Airbridged

Not Airbridged

0

−10

−20

−30

−40

−50

−600 50 100 150 200

Frequency [GHz]

0 50 100 150 200

Frequency [GHz]

S21

[dB

]

0

−10

−20

−30

−40

S21

[dB

]

Figure 20. Depiction of grounded CPW with substrate vias to“short” the parallel-plate waveguide mode.

(continued on page 133)

August 2008 133

anything—for example, products tospecifications, validity of models andequations, the properties of certainthings, etc.

However, there comes a time in mostof our lives when we stop and ask our-selves: “But how reliable is the measure-ment?” This very question can oftenstrike fear into the heart of even the mostdiligent scientific investigator. The rea-son is that the role of measurement asultimate arbitrator is being called intoquestion. How can this be tolerated?

Well, the short answer is that weneed to recognize that all measure-

ments contain errors, to some extent—no measurement is perfect or error-free. Once we accept this fact, weneed to think about how we can deter-mine and accommodate these errorsso that we can regain our confidencein measurements by knowing howreliable they are. The “catch all”phrase for this is that we need to eval-uate the uncertainty of the measure-ment. We have often heard phasessuch as “I’ve done the measurement,but I'm not sure what the uncertaintyis” or “I wish I knew what the uncer-tainty is in my measurement.” Well,

for those working with microwavemeasurements, some help with thesequestions is now available. So, whynot join in the discussions?

—Nick Ridler, Yeou-Song (Brian) Lee,

and David Blackham

Nick Ridler is with National PhysicalLaboratory, Teddington, United Kingdom.Yeou-Song (Brian) Lee is with Anritsu,Morgan Hill, California, United States.David Blackham is with AgilentTechnologies, Santa Rosa, California,United States.

added in the ground planes to “short”the parallel-plate waveguide mode sothat it will not propagate. The viasmust be placed fairly close together ifthey are to be effective, with a separa-tion of λ/4 in the dielectric being ageneral rule of thumb. In practice,backside vias have an inductanceassociated with them and the modesuppression vias should be placedcloser to accommodate for this.Although the vias are shown withequal spacing in Figure 20, the mostcommon consensus if that the viasshould be unequally spaced so as tonot appear periodic, which could initself cause problems at the resonantfrequency of the periodicity.

In cases where a substrate viaprocess is not feasible, an alternateapproach to packaging CPW circuitsthan placing them on a metal groundplane must be adopted. Flip-chippingof CPW circuits is well established. Inthis case, the CPW circuit is flippedupside down and mounted on a carri-er substrate using epoxy or solder on“bumps” placed on the carrier sub-strate so that there is an airgapbetween the carrier substrate and theCPW circuit. Depending on the heightof this gap and the CPW circuitgeometries, this will cause somecapacitive loading. A second approachis to place the substrate on either a

lower-permittivity substrate (tendingto trap substrate energy into thelower-permittivity substrate) or pack-age it so that the circuit is suspendedin air, forming a cavity below the sub-strate. The lower cavity under the sub-strate can then be lined with absorberto attenuate any energy leaking intothe substrate mode. It should be notedthat when the CPW circuit is floatedin air or placed on another substrate,coupling to the circuit must include aground connection as well as a signalconnection. This means an SMA con-nector soldered on would work well,as well as a ground-signal-groundprobe, but a single wire or ribbonbond connected to the CPW signalline would not. Grounded CPW witha single ribbon or wire bond canoperate well to very high frequenciesif the substrate vias are well placednear the launch.

ConclusionsIn this article, we have provided basicCPW design information gearedtowards a practicing microwave cir-cuit designer, including the applica-bility and benefits of CPW transmis-sion line configuration, design andmodeling tips, and two micropho-tographs of implemented CPW MMICamplifiers. Additionally, we havediscussed other undesired modes

supported by the CPW geometry(coupled slotline) and modes thatcan occur for practical implementa-tion of CPW (parallel-plate wave-guide mode). CPW has a significantnumber of applications in microwavedesign, and we hope this brief tutorialwill provide enough of an introduc-tion to aid designers in beginningCPW design.

References[1] C.P. Wen, “Coplanar waveguide: A surface

strip transmission line suitable for nonrecipro-cal gryomagnetic device applications,” IEEETrans. Microwave Theory Tech., vol. 17, no. 12,pp. 1087–1090, Dec. 1969.

[2] R.N. Simons, Coplanar Waveguide Circuits,Components and Systems. New York: WileyInterscience, 2001.

[3] W.R. Deal, X.B. Mei, V. Radisic, W. Yoshida,P.H. Liu, J. Uyeda, M. Barsky, A. Fung, T.Gaier, and R. Lai, “Demonstration of a S-MMIC LNA with 16-dB gain at 340-GHz,” in2007 IEEE CSIC Symp. Dig., Oct. 2007, pp. 1–4.

[4] W.R. Deal, X.B. Mei, V. Radisic, W. Yoshida,P.H. Liu, J. Uyeda, M. Barsky, A. Fung, T.Gaier, and R. Lai, “Development of sub-mil-limeter-wave power amplifiers,” IEEE Trans.Microwave Theory Tech., vol. 55, no. 12, part 2,pp. 2719–2726, Dec. 2007.

[5] W.R. Deal, R. Tsai, M.D. Lange, J.B. Boos, B.R.Bennett, and A. Gutierrez, “A low power/lownoise MMIC amplifier for phased-array appli-cations using InAs/AlSb HEMT,” Int. IEEEMicrowave Symp. Dig., June 2006, pp. 2051–2054.

[6] W.R. Deal, R. Tsai, M.D. Lange, J.B. Boos,B.R. Bennett, and A. Gutierrez, “A W-bandInAs/AlSb low-noise/low-power amplifi-er,” IEEE MWCL, vol. 15, no. 4, pp. 208–210,Apr. 2005.

Application Notes (continued from page 127)