Basic Structure Discharge Mechanism Wall Charge Concept Drive of PDP.

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Transcript of Basic Structure Discharge Mechanism Wall Charge Concept Drive of PDP.

• Basic Structure

• Discharge Mechanism

• Wall Charge Concept

Drive of PDPDrive of PDP

Bus electrode

Dielectric

ITO electrodeMgO layer

Barrier Phosphors

AddressElectrode

Front panel

Back panel

Cell Structure of PDP

Y1

Y2

Y480

X

X

X

A1 A2 A3 A4 A5 A6 A7

Reference- A1,A2, , , : Address Electrode- Y1,Y2, , , : Scan & Sustain Electrode- X : Common & Sustain Electrode

Electrode arrangement of SD PDP

•Electrode covered with dielectricElectrode covered with dielectric•dielectric limits currentdielectric limits current•emission from both side emission from both side

•Electrode covered with dielectricElectrode covered with dielectric•dielectric limits currentdielectric limits current•emission from both side emission from both side

AC-PDPAC-PDPAC-PDPAC-PDP

V

I

V

I

Vf

Y – X Making of Voltage

(Over Vf)

Y – X Making of Voltage

(Over Vf)

Wall Charge (Stop Discharge)

Wall Charge (Stop Discharge)

X Y

Discharge(Discharge Current)

Discharge(Discharge Current)

X Y

-+

- +

-+

X Y

- - - + + +

Discharge in AC PDP

Seed electron

E-Field

Discharge Mechanism - α Process

--+

+-

-+

--+

Seed Electron : After seed electron generated in

discharge space,it is accelerated by Electric field

Seed Electron : After seed electron generated in

discharge space,it is accelerated by Electric field

Electron and Ion are generated by collision

Between accelerated Electron and neutrality particle.

Electron and Ion are generated by collision

Between accelerated Electron and neutrality particle.

Many Electrons and Ions are generated continuously

by collision.

It is end of first Discharge.

Many Electrons and Ions are generated continuously

by collision.

It is end of first Discharge.

Discharge Mechanism - β Process

secondary electron

E-Field

--+

When Ion conflict with Cathode, it is generate

2nd Electron.

(A coefficient of 2nd electron emission)

When Ion conflict with Cathode, it is generate

2nd Electron.

(A coefficient of 2nd electron emission)

Electron and ion are generated from 2nd electron’s

acceleration and confliction.

Electron and ion are generated from 2nd electron’s

acceleration and confliction.

Many Electrons and Ions are generated continuously

by collision.

Many Electrons and Ions are generated continuously

by collision.

+ -

--+

--+

--+

--+

--+

Paschen Curve

Repeat of α-process and β-process

→ Space insulation break down by

increasing current

→ Discharge

Self-sustained discharge

Paschen Curve- Start voltage of Discharge

(Vf : Minimum voltage for discharge)

display a curve line of pressure

* A function of an electrode distance.

* Discharge Mechanism & Delay

Repeat of α-process and β-process

→ Space insulation break down by

increasing current

→ Discharge

Self-sustained discharge

Paschen Curve- Start voltage of Discharge

(Vf : Minimum voltage for discharge)

display a curve line of pressure

* A function of an electrode distance.

* Discharge Mechanism & Delay

Wall Charge

X Y

- - - + + +

X Y

X Y

- - -+ + +

Vex

0V

0V

Y

X

Vw1

Vw2

X Y

- - - + + +

X Y

X Y

- - -+ + +

Vw1+Vex

Vex - Vw2

DischargeStart

DischargeStart

NoDischarge

NoDischarge

Vex

It is displayed differential discharge characteristics about same pulse by Wall Charge. : enable a pictureV

I

Vf

Process of Sustain Discharge

Vex

0V

0V

Y

X X Y

- - - + + +

Vw1+Vex

Vex

X Y

-+

- +

-+

X Y

- - - + + +

Vw1

Vex

0V

0V

X

Y

X Y

- - -+ + +

Vex-Vw2

Vw2

X Y

- - -+ + +

Vw2+Vex

Vex

X Y

-+

- +

-+

Make wall chargeMake wall charge Input electric fieldInput electric field DischargeDischarge Sustain dischargeSustain discharge

Extinction of discharge(Wall charge Shield)Make wall charge

Extinction of discharge(Wall charge Shield)Make wall charge

Input electric fieldInput electric field DischargeDischarge Sustain dischargeSustain discharge

• Sub-field Structure

• Frame Structure

1 sub-field Image Process - ADS

ResetReset AddressAddress SustainSustain

Function• Sustain Erase• Wall Charge Set

Issue• Operation margin• Contrast• Short Time

Function• Sustain Erase• Wall Charge Set

Issue• Operation margin• Contrast• Short Time

Function• Select On Cell

Issue• High Speed• Low Voltage• Low Failure

Function• Select On Cell

Issue• High Speed• Low Voltage• Low Failure

Function• Discharge On Cell

Issue• High Efficiency• Low Voltage• ERC Performance

Function• Discharge On Cell

Issue• High Efficiency• Low Voltage• ERC Performance

1 sub-field Process - Reset

1 sub-field Process - Address1

1 sub-field Process - Address2

1 sub-field Process - Address3

1 sub-field Process - Address4

1 sub-field Process - Address5

1 sub-field Process - Address6

1 sub-field Process - Address7

1 sub-field Process - Address8

1 sub-field Process - Address9

1 sub-field Process - Sustain

Frame Structure - ADS

SF1 SF2 SF3 SF4 SF5 SF6 SF7 SF8

1

.....

2

480

128T64T32T16T8T4T2T1T

1TV field (time)scan

line

address

sustain

sub-field

ResetPeriod

AddressPeriod

SustainPeriod

X

Y1

Y2

Yn

D

SF1 SF2 SF3 SF4 SF5 SF6 SF7 SF8Orig

inal Image

1

.....

2

480

128T64T32T16T8T4T2T1T

1TV field (time)scan

line

address

sustain

sub-field

1 Picture Structure by 8 sub-field

一 般

• Reset Period

• Address Period

• Sustain Period

• PDP Drive Pulse

Reset Period

• Sustain elimination dischargea. Very thin Pulse elimination method

b. full width Pulse elimination method

c. Self-erase elimination method

d. Infirm discharge elimination method

• Wall Charge Set-up for Address: Actually, made wall charge profit of Ramp or RC pulse by infirm discharge

• Contrast: To make Back Ground bright interference Contrast

• Drive Margin

• Based action : An address electrode and with a Y-electrode between generate discharge,

Selected cell and not selected cell by Sustain Pulse have different

characteristic with wall charge

Write Address / Erase Address

• Non Address Failure: Address Pulse - Scan Pulse potential difference & Scan width a design

• High speed Addressing: It is important technique for high resolution, high brightness, low cost

Discharge delay reduction by discharge condition improvement and drive waveform

Low voltage Address: It is profitable of cost down by reduce resisting pressure Driver IC.

Address Period

• Pulse form

: Input alternation pulse to X-electrode and Y-electrode

• Reality picture realizable sustain discharge: It is decide sustain discharge of wall charge difference separated with a cell between

by address discharge

Sustain drive Margina. Drive of sustain discharge : decided by Panel’s Vs value

b. The first stage drive : Reset discharge / Made Wall Charge selectivity by Address

discharge and panel’s Vf

Efficiency improve: It is many power consumption and need efficiency improve in Sustain discharge

Sustain Period

PDP Drive Set

Address Buffer BoardAddress Buffer Board

Y Driver Y Driver BoardBoard

X Driver X Driver BoardBoard

PowerPowerSupplySupplyBoardBoard

LogicLogicBoard Board

ImageImageProcessingProcessing

BoardBoard

Scan Buffer

Scan Buffer

Board

Board

Input : AC Power common in useOutput : All voltages of each B’ds

Image signal source

X, Y Control signalA

ddre

ss D

ata

sign

al

RGB & Sync & Clock

Y-output

Scan powerScan signal

Y-output

Scan Pulse

X-output

Addressoutput

Por

t of

Pan

el E

lect

rode

Por

t of

Pan

el E

lect

rode