ISI gets reduced by boosting transition bits y(t) ttera.yonsei.ac.kr/class/2016_1_2/lecture/Design 8...

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1 page / 11 page Tb -α x(t) z(t) Channel y(t) 1-pole system: P1 t x(t) z(t) t y(t) t 0 1 0 1 1-α -α 0 1-α Pre-emphasis Equalization 1 1 P bg ISI gets reduced by boosting transition bits

Transcript of ISI gets reduced by boosting transition bits y(t) ttera.yonsei.ac.kr/class/2016_1_2/lecture/Design 8...

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Tb -α

x(t)

z(t)

Channel y(t)

1-pole system: P1

t

x(t)

z(t)

ty(t)

t

0

1

0

1

1-α

0

1-α

Pre-emphasis Equalization

1

1P

bg

ISI gets reduced by boosting transition bits

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Current-Mode Output Driver

Goal: Boost 9.5dB @ 1GHzEqualize 2Gbps data transmission

2-tap (one post-cursor) pre-emphasis

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Time-Domain Channel Characteristic

Input source (Impulse)-vcvs gain: ±1-VCM : 1.55V

RTERM

VCM

-Vpulse250mV ~ 250mV

Period : 1sDelay time : 1nsRise & fall time : 1psPulse width : 499ps

Input Source

Vpulse

CML Output Driver-Input MOSFETs: 80u/180n-Tail MOSFETs: 750u/1u-Load resistors: 50 Ohm-Reference voltage : 1.3 V (500mV swing)

-RTERM : 100 Ohm

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Simulation Results (Impulse Response)

• Impulse Response

– 0.5ns spacing each cursor

– Main-cursor, 1st post-cursor, 2nd post-cursor, 3rd post-cursor, 4th post-cursor

Main-cursor

1st-cursor2nd-cursor

3rd-cursor

4th-cursor

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Data Transmission with Channel

RTERM

VCM

Input Source

Random bit stream-Period: 1/2Gbps = 500ps-seed: 1-vlogic_high, low = 250mV, -250mV 500mV swing to Rx-trise, tfall = 20p

Random bit

stream

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Simulation Results (Channel Output)

Closed eye due to channel loss

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2-Tap Pre-emphasis

• Remove 1st post-cursor with 2-tap pre-emphasis

• Pre-emphasis coefficient calculation– Main tap : 500mV (signal swing)

– Second tap : 106.8mV (= 500mV x (27.912 / 130.674) )

130.674mV

27.912mV

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2-Tap Pre-emphasis

• Second tap pre-emphasis

– Same sizing as CML output driver

– Carefully connect output (outp, outn)

• Delay element

– 1-period (500ps) delay

• Second tap pre-emphasis coefficient (106.8mV)

– Reference voltage : 1.693V (1.8V – 106.8mV)

• Additional schematic for 2-tap pre-emphasis

Delay Element Pre-emphasis

Tap coefficient

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Simulation Results (Impulse

Response)

• Impulse Response

– ISI with 1st post-cursor has been decreased with pre-emphasis

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Simulation Results (Channel Output)

ISI compensation by pre-emphasis

Not perfect equalization with 2-tap pre-emphasis

Additional tap need for better equalization

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Design Exercises

Tx pre-emphasis

Calculate 5-tap coefficients and design 5-tap pre-emphasis equalizer