A Temperature Sensor in 0.6 p,m CMOS Technology

Ming-Chan Weng* and Jiin-Chuan Wu**

Department of Electronics Engineering, National Chiao-Tung University, Hsin-Chu 300, Taiwan

E-mail: *p85 1 1569@alab.ee.nctu.edu.t~ **jcwu@alab.ee.nctu.edu.tw

Abstract A fully integrated CMOS temperature sensor is

presented. The design uses parasitic substrate bipolar transistors as a temperature sensor: The temperature and reference signals are first converted into current signals by a voltage-to-current converter and then converted to a digital output by a sigma-delta analog-to-digital converter. Fabricated in a 0.6pm CMOS process, this circuit occupies an active area of 0.7mm2. In the temperature range from 40 to 130 "c. the error is *1.5 "c after one- point calibration.

I. INTRODUCTION Low-cost and high-performance fully integrated

temperature sensor can be used to monitor the VLSI chips for the reliability issue by controlling the dissipation. It can also be applied in many temperature-monitoring applications. To achieve this goal, the standard digital CMOS process should be used so that the temperature sensor can be included with the VLSI chips to vastly reduce the cost and the temperature of the chip can be measured directly.

In the previous works, Bakker and Huijsing [ l ] presented a micropower CMOS temperature sensor with the area of 1.5mm2 in a 0.7pm CMOS process. After calibration at two temperatures, the inaccuracy is &lac in the temperature range from -40 to + 120°C. However, this two-temperature calibration is so complicated that trimming cost will increase. Tuthill [2] presented a switched-current, switched-capacitor temperature sensor with a 10-bit SAR ADC. The variation in sensor error is &l"C in the temperature range from -55 to +125"C. Fabricated in a 0.6pm DPDM CMOS process, it occupied a large area of 3.3mm2 with four-channel ADC plus temperature-to-digital converter.

This paper presents a fully integrated CMOS temperature sensor based on the architecture in [l]. This chip includes a temperature sensor and a built-in reference source to minimize costs. Using a 0.6pm CMOS single- poly triple-metal technology, the area of this sensor is 0.7mm2 and the error is *1.5"C. Section I1 describes the sensor architecture. The building blocks of the sensor are presented in Section 111. Finally, experimental results are summarized in Section IV.

11. BASIC ARCHITECTRE The block diagram of the temperature measurement

system is shown in Fig. 1. It consists of a temperature sensor, a bandgap voltage reference, a voltage-to-current

I n

I l--?-

Fig. I . Block diagram of the temperature measurement system.

converter (VIC), a sigma-delta analog-to-digital converter (EA ADC), and digital control circuits. The temperature sensor produces a voltage signal. The VIC converts the temperature signal and the reference voltage into a current signal. The ZA ADC converts this current signal into an 8- bit parallel digital output. Digital circuits control these steps in sequence.

111. CIRCUIT DESIGN AND IMPLEMENTATION

A. Temperature Sensor In order to be compatible with standard CMOS process,

t h e parasit ic subs t ra te b ipolar transistors are used as a temperature sensor [l], [2]. When the emitter current density is constant, the base-emitter voltage V,, of a bipolar transistor decreases almost linearly with temperature. This behavior can be expressed in a first- order approximation as [3]:

V,, z 1.27V - KT (1)

where K is a constant that depends on the bias current density and the process parameters and T denotes the absolute temperature. In this implementation, the temperature coefficient -K is approximately -2 mV/"C. Based on relation (l), the temperature signals can be derived from the V,, of the bipolar transistors.

B. Choppered Bandgap Reference The bandgap voltage reference has been extensively

used as the reference signals. Traditional implementation of bandgap reference is shown in Fig. 2. It's output voltage (VwF) is almost independent of temperature. However, the offset of the CMOS amplifier will be amplified and added to the reference voltage which is given by the following equation:

0-7803-5728-0/99 $4.00 0 1999 IEEE 116 AP-ASIC '99

R2

R3

VREF

J FVBE rn=l * - Fig. 2. Bandgap voltage reference.

where V, is the thermal voltage and Vo, is the input- referred dc offset voltage of the amplifier. Because this offset will degrade the accuracy of the temperature sensors, the offset voltage must be compensated. The autozeroing technique was used in [2]. However, its output signal is not continuous and not suitable to be combined with ZA A/D converter. The chopping technique [4] is another alternative to solve the problem of VREF drift because it can move the dc offset voltage to the higher frequency.

The choppered bandgap voltage reference circuit is shown in Fig. 3. Compared with the previous designs, instead of using tradition two-stage design, the modification of this circuit is that a source follower is added to the amplifier output. The reason for adopting this three-stage circuit will be explained as following. The amplifier in the bandgap reference is implemented with a CMOS two-stage opamp. This amplifier utilizes the second Miller compensated stage as a low-pass filter [I], the chopper circuit is placed only across the first stage of the opamp. Because chopping technique move the dc offset voltage to the higher frequency, the low-pass filter can suppress this high frequency component. However, if the chopping frequency reaches the slew-rate limited range of the opamp, the unbalanced slew rate of charging and discharging will cause an asymmetric low-pass function of the opamp and then the average value of V,, will be changed. If choppering .frequency is decreased to avoid slew-rate-limited problem, the low-pass characteristic of this circuit will disappear. In order to overcome slew-rate-limited problem and attain the low- pass function simultaneously, a source follower is added to the amplifier output as shown in Fig. 3. The simulation results of 2-stage and 3-stage choppered bandgap reference are compared and shown in Fig. 4. The simulated temperature and the offset voltage of amplifier are set to 25°C and IOmv, respectively. Both 2-stage and 3-stage configurations show a low-pass function in the curves marked with square. However, the open-circle

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curve shows that the reference voltage of the 2-stage configuration decreases about 1 with a 10 low-pass function. Under the same condition, variation of the reference voltage in 3-stage configuration is only 0.1 (solid circle). From the simulation result, this 3-stage choppered bandgap reference achieves low-pass function and overcome the slew-rate-limited problem simultaneously.

C. Voltage to Current Converter In order to interface with CA ADC, the temperature and

reference signals must be first scaled and then transformed into the current signals. In the previous work [l], this transformation is achieved by a resistor and the simple CMOS current mirrors. Because the channel length modulation of the MOS transistors degrades the performance of the current mirrors, the accuracy of the temperature sensor is limited by this inherent problem of the short-channel MOS transistors. A voltage-to-current converter (VIC) which utilizes resisters and opamps is presented here and is schematically shown in Fig. 5. Two obvious advantages can be found in this implementation. First, the problem of current mirrors mentioned above can be eliminated. The design criterion of the temperature sensor to obtain the required accuracy is then moved to optimize the mismatch between resistors. The design goal of the temperature measurement range is from -55 to 125 "C, and the ADC should provide a resolution of 1 "C. Therefore, using an 8-bit ADC can satisfy these requirements. Because the reference signal V,, is 1.25V and the temperature signal V,, vanes from 0.5V to 0.84V for the desired temperature range, these signals must be shifted and scaled to fit the 8-bit ADC conversion range and the LSB requirement for 2 mV/"C. The ac ground voltage of the analog part in this system is set to half of the supply voltage (V,,,,), so the dc level of these voltage signals must shift to the V,,,,. The shifting and scaling can be easily achieved with the VIC is another advantage. The voltage signal is then transform into the current signal via a resistor with another node of the resistor connected to a virtual-ground node of the following circuit. The feedback signals (charge/discharge) of the ZA ADC, which dynamically control the input currents, can be also merged with the VIC. The VoUT in the Fig. 5 can be expressed as:

1 2 (3)

V,, =V I,ALF+ V,, - 7 V,, charge = 1

1 2 V,,, =VIlALF+ V,, - 7 V,, discharge = 1

When the VBE is equal to 0.46875V (about -73"C), the converted digital output code is zero. This lowest temperature point is chosen because it sets a proper ratio, which makes an accurate matching of the resistors possible. The offset voltage of the opamps in VIC will influence the accuracy of this transformation, and thus the chopping technique must be applied to these opamps.

D. Sigma-Delta ADC The ZAADC is simple and suitable in this design. A

first-order EA ADC [l] is designed to convert the current signals from the VIC to the digital outputs. This ADC utilizes an integrator, a comparator and an 8-bit counter as

VREF

- Fig. 3. Schematic of the choppered bandgap voltage reference.

10' I 0' IO' I 0' Frequency (KHzj

Fig. 4. Simulation result of 2-stage and 3-stage choppered bandgap reference

Fig. 6. Photograph of the temperature sensor.

"REFT charge

discharge

- ~ - Fig. S. Schematic of voltage to current converter

a first-order digital decimation filter. The integrator also acts as a low-pass filter for the chopping signals, This 8- bit ZA ADC has been verified to convert a low-frequency signal.

IV. EXPERIMENT RESULTS The temperature sensor has been fabricated in a single-

poly triple-metal 0.6pm CMOS process. The die photograph is shown in Fig. 6 and the active area is approximately 0.7 mm2. The chopping frequency of the bandgap reference and the XA ADC are 720 kHz and 180

110

TIlnFrYvrl7-l

Fig. 7. Temperature error versus temperature.

kHz, respectively. The current consumption is 350pA at a conversion rate of 700 sampleds with a 5V supply. Fig. 7 shows the measured errors versus temperature for the temperature range varying from 40 to 130 "C . The maximum error is 3°C with a dc offset which exists from chip to chip. This error is due to the offset in the base- emitter voltage of bipolar temperature sensor. Because of this relationship, only simple one-point calibration is needed rather than complicated two-point calibration [ 11, and the expected accuracy is within *1.5"C after this

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simple calibration.

V. CONCLUSION A fully integrated CMOS temperature sensor has been

presented. Some offset reduction techniques have been developed to reduce the errors. Fabricated in a 0.6pm CMOS process, this circuit occupies an active area of 0.7mm2. In the temperature range from 40 to 130°C, the error is *1.S0C after one-point calibration.

ACKNOWLEDGMENT The authors would like to thank the Chip

Implementation Center of National Science Council for their support in chip fabrication. This work was supported by the National Science Council, Republic of China, under Grant NSC88-2215-E-009-073.

REFERENCES [I] A. Bakker and J. H. Huijsing, “Micropower CMOS

Temperature Sensor with Digital Output,” IEEE J. Solid-state Circuits, vol. 3 1, pp.933-937, July 1996

[2] M. Tuthill, “A Switched-Current, Switched-Capacitor Temperature Sensor in 0.6-pm CMOS,” IEEE J. Solid-state Circuits, vol. 33, pp. 11 17-1 122, July

[3] G. C. M. Meijer, “Thermal sensors based on transistors,” Sensors and Actuators, vol. 10, pp. 103- 125,1986.

[4] C. C. Enz, E.A. Vittoz, and F. Krummenacher, “A CMOS chopper apmlifier,” IEEE J. Solid-state Circuits, vol. SC-22, pp.335-343, June 1987.

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