[IEEE 2012 IEEE International Conference on Electronics Design, Systems and Applications (ICEDSA) -...

2-π Crosstalk Noise Model for Deep Submicron VLSI Global RC Interconnects

1V. Maheshwari, 1Anushree, 2Saupayan Mazumdar, 2R. Kar, D. Mandal, 2A.K. Bhattacharjee 1 Department of ECE, Hindustan College of Science and Technology, Mathura, U.P., INDIA

Email: [email protected] 2Department of ECE, National Institute of Technology, Durgapur-9, West Bengal, INDIA

[email protected]

Abstract—Noise estimation and avoidance are becoming very important issues in today’s high performance IC design. This paper presents a much improved, highly accurate and efficient noise model called 2-π model for the estimation of crosstalk noise. The proposed model incorporates all the physical properties including victim and aggressor drivers, distributed RC characteristics of interconnects and coupling locations of both victim and aggressor lines. Then with the help of this model, expressions for peak noise and noise width as well as sensitivity expressions to the various model parameters are calculated. We then use these sensitivity expressions to analyze and evaluate the effectiveness of various noise avoidance techniques for the reduction of this crosstalk noise.

Keywords - Crosstalk; Noise modelling; On-Chip RC Interconnect; 2-π Crosstalk Noise Model; VLSI

I. INTRODUCTION As the result of advancement in VLSI technology, feature size is reduced which affects the crosstalk noise problem and also affects the design’s timing and functionality goals [1-2]. This reduction in chip area results in the performance degradation of VLSI circuits, such as logic failure, unwanted coupling voltage between two adjacent wires, timing delay etc. In the current technology, noise analysis and avoidance are becoming equally important or in some cases, more important than the timing and power analysis. Crosstalk noise greatly affects the performance of VLSI circuits, since it exhibits a negative impact on the reliability of the VLSI circuits. In these circuits, it is very common to have wires running adjacent to another. In deep submicron design, due to the greater proximity of adjacent wires and the increase in the switching speeds of the signals, the parasitic coupling effects become significant. Hence, it has become necessary to consider the crosstalk between parallel RC interconnects lines [3]. Crosstalk noise not only leads to modified delays [4-5] but also to potential logic malfunctions [6-7]. Crosstalk is a well-known phenomenon in integrated circuit design. Coupling capacitance between neighbouring nets is a dominant component of crosstalk noise in today’s deep submicron designs. The net on which noise is being induced is called the victim net; whereas, the net that induces this noise is called the aggressor net. Crosstalk noise modelling approaches are

classified into two categories based on their trade-off between accuracy and efficiency [8]. These are called analytical modelling and SPICE simulation. Analytical modelling is preferred because the simulation using SPICE is always computationally expensive and time consuming. In addition it is done at the early stage of the designs. Several approaches have been proposed that model crosstalk effects using analytical modelling. Crosstalk noise may cause various undesirable effects such as overshooting, undershooting, glitches, increasing and reducing a signal delay. In [9-10] various telegraph equations are directly solved and an analytical formula for peak noise in capacitively coupled bus lines is obtained. But these approaches are suitable only for fully coupled bus structures, not for the partially coupled lines or general RC trees. The work in [11] derives the bounds for crosstalk noise using a lumped RC model, but it assumes a step input for aggressor. The concept of [11] is extended in [12-14] to consider a saturated ramp input and π-circuit to represent the distributed nature of on-chip VLSI interconnect. But most of these models fail to represent the distributed nature of a RC network. The model proposed in [15] considers an Elmore delay like peak noise model for general RC trees but it assumes an infinite ramp input. This assumption significantly over-estimates the peak-noise for small aggressor slews and large victim nets, which is very likely to occur in today’s deep submicron designs. The peak noise obtained in [15] may even be larger than the supply voltage. Devgan’s metric has been improved in [16]. One recent work shown in [14] is capable to handle distributed RC network and saturated ramp input. In [17-18], an improved 2-π model is introduced which considers the coupling location at victim net and distributed RC characteristics for victim net.

This paper presents an improved 2-π model for crosstalk noise in time domain and then the closed form expressions for peak noise and noise width are derived. This paper also discusses various noise avoidance techniques using sensitivity expressions to model parameters.

II. IMPROVED 2-Π CROSSTALK NOISE MODEL In this section, we first explain 2-π model and derive its analytical time domain waveform. Then closed form expressions of peak noise and noise width are derived.

2012 IEEE International Conference on Electronics Design, Systems and Applications (ICEDSA)

978-1-4673-2163-1/12/$31.00 ©2012 IEEE 225

A. 2-π Model and its Analytical Waveform For simplicity, we first explain 2-π model for the case where the victim net is a RC line. For a victim net with some aggressor nearby, as shown in Figure 1(a), let the aggressor voltage pulse at the coupling location be a saturated ramp input with transition time (i.e., slew) being tr and the interconnect length of the victim net before the coupling location, at the coupling location and after the coupling be Ls, Lc and Le, respectively. The 2-π type reduced RC model is generated as shown in Figure 1(b) to compute the crosstalk noise at the receiver. It is called 2-π model because the victim net is modelled as two π-type RC circuits, one before the coupling and one after the coupling. The victim driver is modelled by effective resistance Rd, other RC parameters Cx, C1, Rs, C2, Re, and CL are computed from the geometric information from Figure 1(a) in the following manner: The coupling node (node 2) is set to be the centre of the coupling portion of the victim net, i.e., Ls+Lc/2 from the source. Let the upstream and downstream interconnect resistance capacitance at node 2 be Rs/Cs and Re/Ce, respectively. Then capacitance values are set to be C1=Cs/2, C2= (Cs+Ce)/2 and CL=Ce/2+C1. Compared with [11,13] which consider only one lumped RC for the victim net, it is obvious that our 2-π model can model the coarse distributed RC characteristics. In addition, since we consider only the key parameters, the resulting 2-π model can be solved analytically.

Figure 1. (a) Layout of a victim net and aggressor above it; (b) 2-π crosstalk

noise model

From Figure 1 (b), we have the impedance at node 1, Z1, satisfying the following:

11

11 sCRZ d

+= (1)

Then at node 2, we have,

( )L

eS

sCR

sCRZZ 1

1112

12 +++

+=

(2)

Denote the s-domain voltage at node 2 by V2(s), then

( ) ( )sV

sCZ

ZsV agg

L

.1

2

22

+=

(3)

The output voltage Vout in the s-domain is

( ) ( )

Le

Lout

sCR

sCsVsV 1

1

.2

+= (4)

Substituting Z1, Z2 and V2 into Vout (s), we have

( ) ( )sVbsbsbs

sasasV aggout .01

22

31

22

++++= (5)

where the coefficients are as follows:

2

12 K

Ka = , ( )2

1 KCRRa xsd += ,

( ) ( )( )( )2

11122 K

CRRCCCRRCRRRRCRCCb sdLLedSdsdLex +++++= ,

( )( ) ( )( )2

121 K

CRCRCCCRRb dLeLxSd +++++= ,

20

1K

b = , 11 CRRCK sdx= , ( )212 CCRCCRRK xeLsd +=

Writing the transfer function H(s) into the poles/residues form:

( )3

3

2

2

1

1

012

23

12

2 ss

kss

kss

kbsbsbs

sasasH−

+−

+−

≡+++

+= (6)

Where s1, s2 and s3 represent the three roots of 001

22

3 =+++ bsbsbs , which can be obtained analytically using standard mathematical techniques. After each poles/residue pair is obtained, its corresponding time domain function is expressed as ( ) tS

iiiektf = (i=1, 2, 3). For the aggressor with

saturated ramp input with normalized Vdd=1 and transition time tr.

⎪⎩

⎪⎨⎧

≥

≤≤=

r

raggtt

tttt

v1

0 (7)

Its Laplace transform is given in (8).

( )r

st

agg tsesV

r

2

1 −−= (8)

Then for each pole/residue pair, the s-domain output

( ) ( )sVss

ksV aggi

iout .

−= and its inverse Laplace is the

convolution of ( )tfi and ( )tg

( ) ( ) ( ) ( ) ( ) ,.0

duugutftgtftVt

iiout ∫ −=∗=

( )⎪⎩

⎪⎨⎧

≤≤++

−= rri

tsi

ri

ii ttts

ekts

tsk i

01

22

( )

⎪⎩

⎪⎨⎧

≥++−=−

ri

i

ri

tsi

ri

ttsi tt

sk

tsek

tsek iri

22 (9)

Therefore, the final noise voltage waveform is simply the summation of the voltage waveform from each pole/residue pair

( ) ( ) ( ) ( )tvtvtvtv outoutoutout 321 ++= (10) B. Closed-Form Noise Amplitude and Width

In this subsection, the original 2-π model is simplified and closed-form formulae for noise amplitude and noise width are derived. Using dominant-pole approximation method, (5) can be simplified to (11).


226

( ) ( ) ( )( )1

1.01

1

+−=

+≈

−

vr

stx

aggout ststetsV

bsbsasV

r (11)

where the coefficients are ( ) xsdx CRRt += , (12)

( )( ) ( )12 CRCRCCCRRt dLeLxsdv +++++= . (13) In (12) tx is the RC delay term from the upstream resistance of the coupling element times the coupling capacitance, while tv represents distributed Elmore delay of victim net. Simple time domain waveform obtained by taking inverse Laplace transform of (11).

rt

t

r

xout ttet

tv v ≤≤⎩⎨⎧

⎟⎠⎞

⎜⎝⎛ −=

−01

( )

rt

tt

tt

r

x tteett vv

r

>⎩⎨⎧

⎟⎟⎠

⎞⎜⎜⎝

⎛−=

−−− (14)

In the above expression vout monotonically increases at

rtt ≤≤0 and monotonically decreases t> tr. So the peak noise will be at t=tr , its value is given by

⎟⎟⎠

⎞⎜⎜⎝

⎛−=

−v

rt

t

r

x ettv 1max

(15)

Under some circumstances, even the peak noise exceeds certain threshold voltage a receiver may still be noise immune. Given certain threshold voltage level tv , the noise width for a noise pulse is defined to be the length of time interval that noise spike voltage v is larger or equal to tv .We can compute t1 and t2 from (14) and thus the noise width is given by,

( )

⎟⎟⎟⎟⎟

⎠

⎞

⎜⎜⎜⎜⎜

⎝

⎛⎟⎟⎠

⎞⎜⎜⎝

⎛−−

=−tr

tt

trx

v vt

evttttt

vr

1ln12

(16)

Figure 2: Illustration of noise width.

In this paper, we assume the threshold voltage vt to be half of

the peak noise voltage, 2maxvvt = . So the noise width of

(16) is simplified as,

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

−

−+=−=−

−

vr

vr

tt

tt

vrwidth

e

ettttt1

1ln

2

12 (17)

III. NOISE NOISE AVOIDANCE TECHNIQUES In this section, we will investigate several noise avoidance techniques and evaluate their effects using 2-π model.

A. Driver Sizing Driver sizing can help to reduce the peak crosstalk noise, since a strong driver is more capable to sustain a noise spike. Our model does indicate some situation under which increasing driver size (i.e., reduce Rd) may help to reduce the peak noise. It also indicates the situation under which increasing driver size may not help to reduce the peak noise.

( )( )

⎥⎥⎥⎥

⎦

⎤

⎢⎢⎢⎢

⎣

⎡ +++++−=

vr

tt

v

r

v

Lxsd

r

x

d e

tt

tCCCCRR

tC

Rv

.11

21

max

δδ

(18)

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛++++= BA

ttCCCC

Rt

v

rLx

d

width21δ

δ (19)

where the values of A and B, respectively, is given by,

⎟⎟⎠

⎞⎜⎜⎝

⎛−⎟⎟

⎠

⎞⎜⎜⎝

⎛−

+−=

−−

−−−−

vr

vr

vr

vr

vr

vr

tt

tt

tt

tt

tt

tt

ee

eeeeA

11

.22

22 (20)

⎟⎟⎟

⎠

⎞

⎜⎜⎜

⎝

⎛

−

−= −

−

vr

vr

tt

tt

e

eB1

1ln

2

(21)

The equation (19) shows the sensitivity of noise width to Rd which represent victim driver size. Consider the case when ( )( ) vLxsd tCCCCRR ≤++++ 21

(i.e., Rs C1<ReCL after substituting tv) then 0max >

dRv

δδ and sizing up

a driver will reduce the noise. However, if ( )( ) vLxsd tCCCCRR >++++ 21 , (i.e., RsC1>ReCL) and tr<<tv, one may have the situation so that .0max ≤

dRv

δδ

B. Wire Spacing Wire spacing is another way which can reduce the maximum noise and noise width, with an area penalty. For a wire of fixed width, its coupling capacitance decreases while its ground capacitance increases, as its spacing to a neighbour wire increases. On the other hand, coupling capacitance of the wire increases while ground capacitance decreases, when its spacing to a neighbour wire decreases. For the proposed model,

( )⎥⎥⎦

⎤

⎢⎢⎣

⎡

⎭⎬⎫

⎩⎨⎧

+−+=−

rv

xtt

rsd

x ttte

tRR

Cv

vr 1.1

2max

δδ (22)

21

max ..v

xtt

d tteR

Cv

vr−

−=δ

δ (23)

( ) vr

tt

v

xsd e

ttRR

Cv −

+−= .. 22

max

δδ (24)

( ) vr

tt

v

xesd

L

ettRRR

Cv −

++−= .. 2max

δδ (25)

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛++= BA

ttRR

Ct

v

rsd

x

width

δδ (26)


227

⎟⎟⎠

⎞⎜⎜⎝

⎛+= BA

ttR

Ct

v

rd

width

1δδ (27)

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛++= BA

ttRR

Ct

v

rsd

width

2δδ (28)

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+++= BA

ttRRR

Ct

v

resd

L

width

δδ (29)

Changes in ground capacitance and coupling capacitance occurs due to the fact that as spacing between two wires increases, some field lines of coupling capacitance start contributing to ground capacitance.

C. Wire Sizing Wire sizing is another factor which can be used for maximum noise and noise width reduction. As the wire’s width is decreased, its resistance increases and its ground capacitance decrease. On the other hand, as the wire’s width is increased its resistance decreases and its ground capacitance increases. The effects of change in ground capacitance are explained in previous subsection. The way the noise peak and noise width are affected by changes in interconnect resistance can be explained by following sensitivity expressions:

( )⎥⎥⎦

⎤

⎢⎢⎣

⎡

⎪⎭

⎪⎬⎫

⎪⎩

⎪⎨⎧

+++−=−

r

xLx

v

xtt

r

x

s tC

CCCtt

etC

Rv

vr

22max .

δδ (30)

2max ..

v

xtt

Le t

teC

Rv

vr−

−=δ

δ (31)

( ) ⎟⎟⎠

⎞⎜⎜⎝

⎛+++= BA

ttCCC

Rt

v

rLx

s

width2δ

δ (32)

⎟⎟⎠

⎞⎜⎜⎝

⎛+= BA

ttC

Rt

v

rL

e

width

δδ (33)

In the above expressions the values of A and B are the same as that of the previous section.

D. Noise Amplitude-Width Product The effective way to reduce amplitude-width (AW) product are wire spacing, driver sizing and wire sizing which helps in reducing noise. A receiver may still be noise immune even the peak noise exceeds certain threshold voltage. This can be explained with the help of amplitude (A) versus width plots, which can then be transformed into amplitude (A) versus amplitude-width (AW) product (A-AW) plots [11]. AW product can be obtained from the expressions (15) and (17).

( ) ( )xfCRRAW xsd ..+= (34) where value of f(x) is given by,

( ) x

xx

x

xx

eee

eeexf −

−

−

−

−−

−−=

1ln

1 and

v

rt

tx = (35)

IV. SIMULATION RESULTS AND DISCUSSIONS We have generated 150 random circuits using the parameter ranges presented in Section 2 and 3 and looked at the sensitivity of noise peak to each model parameter. The units are mV/fF for capacitances and mV/Ω for resistances. Figure 3 shows the scatter diagram comparing the 2- π model (y-axis) with HSPICE (x-axis) simulations for 150 randomly generated four-pin nets. HSPICE simulations are performed on

distributed RC networks by dividing each long wire into every 100µm segment. The average errors for peak noise and noise width are 3.43% and 5.23%, respectively. Table-1 gives the comparative result of the peak noise voltage and noise width computed using SPICE and the proposed method. The peak noise obtained from the analytical model is compared to SPICE in terms of the physical separation between the signal line and the shield line, as shown in Figure 4. Figure 4 shows the coupling noise for shielded interconnect decreases with increase in the physical separation between the signal line and the shield line. When the signal width increases, the resistance of the aggressor is reduced and the coupling noise increases as shown in Figure 5. The ground capacitance of the victim line also increases, however, causing the coupling noise to decrease.

(a)

(b)

Figure 3: Comparison of 2- π model versus SPICE simulation for randomly generated 150 RC Trees for (a) peak noise ; (b) noise width.

Figure 4: Comparison of coupling noise using SPICE with the analytic model

for the separation between the signal line and the shield line.


228

Table-1: Comparison of the energy distribution for randomly generated RLC

circuit

Number of RC Trees=150 Peak Noise Voltage Noise Width

SPICE Model (m V)

Proposed Model (mV)

SPICE Model (ns)

Proposed Model (ns)

0.02 0.02 0.02 0.02 0.03 0.03 0.08 0.09 0.035 0.034 0.035 0.034 0.042 0.048 0.12 0.18 0.074 0.086 0.23 0.29 0.110 0.121 0.42 0.53 0.128 0.132 0.57 0.63 0.149 0.152 0.62 0.66 0.162 0.169 0.71 0.790.187 0.197 0.80 0.81 0.236 0.242 0.89 0.91 0.273 0.271 0.92 0.93 0.286 0.298 0.98 0.95

Figure. 5. Comparison of coupling noise using SPICE with the proposed

model for the shield line.

V. CONCLUSION

This paper presents a much improved 2‐π crosstalk noise model and various noise avoidance techniques for RC on-chip VLSI interconnects. Error presented by this model is less than 5% on average compared with SPICE simulation, for both peak noise voltage and noise width estimation. In this paper, we considered the unit step input for aggressor which is present near the victim net. Results show that the average error for noise peak is 2.2 % and for the width is 5.2% while allowing for very fast analysis. The proposed model can be used to allow time-efficient accurate analysis of multi conductor line structures. The 2‐π model shown in this paper will be useful in other applications at various levels to guide noise aware DSM circuit.

REFERENCES [1] Semiconductor Industry Association, National Technology Roadmap for

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[3] K. Rahmat and O.S. Nakagawa and S.-Y. oh and J. Moll, “A Scaling Scheme for interconnect in Deep-Submicron Process,” IEEE International Electron Devices Meeting, pp.245-248, 1995.

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[15] A. Devgan, “Efficient coupled noise estimation for on-chip interconnects,” in proc. Int. Conf. on computer aided design, pp.147-153, 1997.

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