Generalized Circuit Averaging Technique for Two Switch DC ...

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Generalized Circuit Averaging Technique for Two Switch DC-DC Converters Sumukh Surya γ , Intern, Janamejaya Channegowda δ , Member, IEEE, Kali Naraharisetti β γ e-Powertrain, KPIT, Bangalore, India, [email protected] δ Ramaiah Institute of Technology, Bangalore, [email protected] β Infineon Technologies, [email protected] Abstract—Cuk and SEPIC are some of the important DC- DC converters used for charging batteries. In this paper, a generalized circuit averaging technique is employed for Cuk and SEPIC converters. The derived equations are used to obtain the frequency response of open loop transfer function. The ratio of perturbed output voltage to duty cycle (G vd ) is simulated using LTSpice software package. The derived averaged models of the converters aids in faster and simpler simulation. The behavior of the converters in CCM and DCM was also simulated. The derived expressions can be generalized to power converters with two switches. Keywords: Circuit Averaging, Cuk, DCM, CCM Insta- bility, LTSpice, SEPIC I. I NTRODUCTION DC-DC converters have gained popularity due to the emer- gence of Electric Vehicles (EVs). DC-DC converters can be classified into isolated and non-isolated topologies. Among various non-isolated converters, fourth order converters like Cuk and SEPIC have been given prominence as they provide advantages such as non-inverted output voltage and ability to operate from an input source which has a value greater or lesser than output voltage. Determining open loop transfer function for such converters plays an important role as they provide useful info to asses converter stability and help improve controller design. In literature, several attempts have been made in examining different approaches for obtaining the transfer function. In [1], three different approaches such as: a) Small signal model, b) Circuit Averaging and c) State Space averaging for DC-DC converters in CCM and DCM was introduced. It was shown that the losses in the converters are primarily contributed by switching and not by conduction. In [2], a SEPIC operating in DCM was selected to drive a Light- Emitting Diode (LED) for constant voltage application. An average and a switching model was developed, modeled in MATLAB / Simulink and validated against the experimental results. The transfer functions G vd and G vg (Output voltage to input voltage) were derived. It was shown that the SEPIC provided lower input current harmonics. In [3], SEPIC was modelled for DCM operation by using State Space averaging technique, implemented using MAT- LAB and LTSpice simulation tools. It was shown that the Bode plots obtained from these tools closely matched experimental results at frequencies below 10 kHz. At higher frequencies, the simulation plots diverged from experimental results due to reduced order matrix. In [4], an ideal SEPIC and Cuk operating in DCM are selected and used for Power Factor Correction (PFC). The advantages of the converters is discussed in detail. The input to the converters is supplied by a single phase rectifier. The open loop transfer function obtained using the small signal model are validated against the hardware results and they were found to be closely correlated. In [5], concept of circuit averaging for converters like Buck, Boost and Buck-Boost in DCM was discussed. It was shown that the input and output ports of such converters behave like a resistive and power sink respectively. In [6], an averaged model in LTSpice was developed for ideal Buck and Boost operating in CCM was constructed using CCM block available in LTSpice software package. In [7], a mathematical model for Cuk converter operating in CCM was derived and modelled using Simulink. The importance of step size while capturing the transients was shown. In this paper, DCM analysis for practical converters, SEPIC and Cuk are carried out using Circuit Averaging using LTSpice simulation tool. It was found that the cause of discontinuity in ideal and non-ideal converters was due to the sum of inductor currents (i L1 + i L2 ) being zero. CCM-DCM block in LTSpice was used which solves for the various currents and voltages independent of the operation of the converter. II. CIRCUIT AVERAGING FOR AN I DEAL SEPIC Fig. 1: Circuit diagram of SEPIC Fig. 1 shows an ideal SEPIC with two switches MOSFET and diode. The voltage across the MOSFET and diode are named as V 1 and V 2 respectively. Similarly, the current in MOSFET and diode are named as I 1 and I 2 respectively. Circuit averaging of any converter involves three major steps: arXiv:2012.12724v1 [eess.SP] 16 Dec 2020

Transcript of Generalized Circuit Averaging Technique for Two Switch DC ...

Page 1: Generalized Circuit Averaging Technique for Two Switch DC ...

Generalized Circuit Averaging Technique for TwoSwitch DC-DC Converters

Sumukh Suryaγ , Intern, Janamejaya Channegowdaδ, Member, IEEE, Kali Naraharisettiβγe-Powertrain, KPIT, Bangalore, India, [email protected]

δRamaiah Institute of Technology, Bangalore, [email protected]βInfineon Technologies, [email protected]

Abstract—Cuk and SEPIC are some of the important DC-DC converters used for charging batteries. In this paper, ageneralized circuit averaging technique is employed for Cuk andSEPIC converters. The derived equations are used to obtain thefrequency response of open loop transfer function. The ratio ofperturbed output voltage to duty cycle (Gvd) is simulated usingLTSpice software package. The derived averaged models of theconverters aids in faster and simpler simulation. The behaviorof the converters in CCM and DCM was also simulated. Thederived expressions can be generalized to power converters withtwo switches.

Keywords: Circuit Averaging, Cuk, DCM, CCM Insta-bility, LTSpice, SEPIC

I. INTRODUCTION

DC-DC converters have gained popularity due to the emer-gence of Electric Vehicles (EVs). DC-DC converters can beclassified into isolated and non-isolated topologies. Amongvarious non-isolated converters, fourth order converters likeCuk and SEPIC have been given prominence as they provideadvantages such as non-inverted output voltage and ability tooperate from an input source which has a value greater orlesser than output voltage.

Determining open loop transfer function for such convertersplays an important role as they provide useful info to assesconverter stability and help improve controller design. Inliterature, several attempts have been made in examiningdifferent approaches for obtaining the transfer function. In [1],three different approaches such as: a) Small signal model, b)Circuit Averaging and c) State Space averaging for DC-DCconverters in CCM and DCM was introduced.

It was shown that the losses in the converters are primarilycontributed by switching and not by conduction. In [2], aSEPIC operating in DCM was selected to drive a Light-Emitting Diode (LED) for constant voltage application. Anaverage and a switching model was developed, modeled inMATLAB / Simulink and validated against the experimentalresults. The transfer functions Gvd and Gvg (Output voltageto input voltage) were derived. It was shown that the SEPICprovided lower input current harmonics.

In [3], SEPIC was modelled for DCM operation by usingState Space averaging technique, implemented using MAT-LAB and LTSpice simulation tools. It was shown that the Bodeplots obtained from these tools closely matched experimentalresults at frequencies below 10 kHz. At higher frequencies,

the simulation plots diverged from experimental results due toreduced order matrix.

In [4], an ideal SEPIC and Cuk operating in DCM areselected and used for Power Factor Correction (PFC). Theadvantages of the converters is discussed in detail. The inputto the converters is supplied by a single phase rectifier. Theopen loop transfer function obtained using the small signalmodel are validated against the hardware results and they werefound to be closely correlated.

In [5], concept of circuit averaging for converters like Buck,Boost and Buck-Boost in DCM was discussed. It was shownthat the input and output ports of such converters behave likea resistive and power sink respectively.

In [6], an averaged model in LTSpice was developed forideal Buck and Boost operating in CCM was constructed usingCCM block available in LTSpice software package.

In [7], a mathematical model for Cuk converter operatingin CCM was derived and modelled using Simulink. Theimportance of step size while capturing the transients wasshown.In this paper, DCM analysis for practical converters, SEPICand Cuk are carried out using Circuit Averaging using LTSpicesimulation tool. It was found that the cause of discontinuity inideal and non-ideal converters was due to the sum of inductorcurrents (iL1 + iL2) being zero. CCM-DCM block in LTSpicewas used which solves for the various currents and voltagesindependent of the operation of the converter.

II. CIRCUIT AVERAGING FOR AN IDEAL SEPIC

Fig. 1: Circuit diagram of SEPIC

Fig. 1 shows an ideal SEPIC with two switches MOSFETand diode. The voltage across the MOSFET and diode arenamed as V1 and V2 respectively. Similarly, the current inMOSFET and diode are named as I1 and I2 respectively.Circuit averaging of any converter involves three major steps:

arX

iv:2

012.

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4v1

[ee

ss.S

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6 D

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020

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1) Separate the switch network from the converter anddefine the ports

2) Sketch the waveform of the switch current and voltagewaveforms followed by averaging

3) Simplify equations and draw the equivalent switch net-work

Fig. 2: Separating the Switches

Fig. 3: Averaged Switch Voltages and Currents

The DCM operation occurs due to the unidirectional flowof current in the switch (Diode). Hence, the sum of inductorcurrents (iL1 +iL2) contribute to the DCM operation in Cukconverter and SEPIC.

Averaging I1 (Input Port)

< I1 > =1

2Ts∗ (D1Ts) ∗ (ipeakL1

+ ipeakL2)

(1)

ipeakL1 + ipeakL2 =(V1D1Ts)

L(2)

Substituting (2) in (1), (3)

I1 =(D2

1V1Ts)

2L(4)

where L =(L1L2)

L1 + L2(5)

Since, Ts =1

fs(6)

V1I1

=2LfsD2

1

(7)

Where Re =2LfsD2

1

(8)

And D1 = D (9)

Hence, the input port behaves like a loss free resistor, thoughphysically no resistor exits. Averaging the current waveformat the output port,we obtain:

< I2 > =1

2Ts∗ (D2Ts) ∗ (ipeakL1

+ ipeakL2)

(10)

ipeakL1 + ipeakL2 =(V2D2Ts)

L(11)

D1(V1) = D2(V2) (12)

As observed from Fig. 3, inductors charge from zero and reachthe peak value in D1Ts. However, the same currents reach zeroin D2Ts interval. Substituting (11) and (12) in (10) we get

< I2 > =1

2L∗ (D2

2V2Ts) (13)

D2 =D1V1V2

(14)

< I2 > =V 21 D

21

2V2Lfs(15)

I2V2 =V 21

Re(16)

Fig. 4: Equivalent Circuit for the switch network

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Fig. 5: Circuit Diagram of a Non-Ideal SEPIC

III. CIRCUIT AVERAGING FOR A NON-IDEAL SEPIC

Fig. 5 shows a non-ideal SEPIC. The MOSFET and thediode have to be separated from the circuit as shown in Fig.2.Fig. 6 shows the separation of the switches from the circuitwith V0 = Vc2

Fig. 6: Swicthes Separated

< V1 > = ((iL1 + iL2Ron1D1 + ((Vc1 + Vc2 + V (17)

+Rd(iL1 + iL2)D2 + Vc1D3

< V2 > = ((Vc1 + Vc2)− (iL1 + iL2)Ron1)D1 (18)

D2(Vd +Rd(iL1 + iL2)) +D3(V 0)

< I1 > = D1 ∗ (iL1 + iL2) (19)

< I1 > = D2 ∗ (iL1 + iL2) (20)

From (19) and (20), it can be observed that the governingequation to describe DCM in a non-ideal SEPIC is similar tothat of (15) and (16) Hence, the equivalent switch network issimilar to Fig. 4

Fig. 7: Ideal Cuk converter

Fig. 8: Switches Separated

Fig. 9: Waveforms of V1, V2, I1 and I2

IV. CIRCUIT AVERAGING FOR AN IDEAL CUK

Fig. 7 shows an ideal Cuk converter operating in DCM. Fig.8 shows the MOSFET and Diode separated from the converter.

Fig. 9 shows the waveforms of switch voltages and currentsat D1Ts, D2Ts and D3Ts intervals.

< V1 > = D2 ∗ (Vc1) +D3 ∗ (Vc1 + Vc2) (21)< V2 > = D1 ∗ (Vc1)−D3(V c2) (22)< I1 > = D1 ∗ (iL1 + iL2) (23)< I2 > = D2 ∗ (iL1 + iL2) (24)

Therefore, the equivalent circuit would remain the same asthat of the SEPIC.

V. CIRCUIT AVERAGING FOR A NON IDEAL CUK

Fig. 10 shows a non-ideal Cuk converter operating in DCMwith the switches separated

On Averaging the voltages and currents across the switches

< V1 > = ((iL1 + iL2)Ron1)D1 + (Vc1 + Vd+ (25)

Rd(iL1 + iL2))D2 +D3(Vc1 + V0)

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Fig. 10: Switch Separated

< V2 > = (Vc1 − (iL1 + iL2)Ron1)D1− (26)

D2(Vd +Rd(iL1 + iL2))−D3V0

< I1 > = (iL1 + iL2)D1 (27)< I2 > = (iL1 + iL2)D2 (28)

It was observed that the equivalent circuit for (27) and (28)are similar to that of Fig. 4. Hence, the derived average modelfor two switch PWM DC-DC converter is generic and canbe applied to any converter operating in DCM. The switchnetwork is replaced by the equivalent circuit using CCM–DCM1 under average.lib in LTSpice.

VI. SPECIFICATIONS OF THE CONVERTERS

Assuming the converters’ operation in DCM, the specifica-tions are selected. Table 1 and 2 show the specifications ofNon ideal SEPIC and Cuk converters

TABLE I: Specifications of Non Ideal SEPIC

Parameters Value

Input Voltage (Vg) 62 V

Output Voltage (Vo) 22 V

Output Resistance, R 52 Ω

Inductor, L1 13 mH

Inductor, L2 166 µH

Inductor ESR, RL1 130mΩ

Inductor ESR, RL2 110mΩ

MOSFET Resistance, Ron1 31mΩ

Duty Cycle, D 0.2

Capacitor, C1 0.5 µH

Capacitor, C2 1000 µH

Capacitor ESR, RC1 270mΩ

Capacitor ESR, RC2 110mΩ

Switching Frequency, fs 50kHz

Diode Drop, Vd 0.7V

Diode Forward Resistance, Rd 0.12 Ω

TABLE II: Specifications of Non Ideal Cuk

Parameters Value

Input Voltage (Vg) 25 V

Output Voltage (Vo) -21 V

Output Resistance, R 100 Ω

Inductor, L1 1 mH

Inductor, L2 1mH

Inductor ESR, RL1 0.15Ω

Inductor ESR, RL2 0.2Ω

MOSFET Resistance, Ron1 31mΩ

Duty Cycle, D 0.42

Capacitor, C1 850 µH

Capacitor, C2 47 µH

Capacitor ESR, RC1 0.2Ω

Capacitor ESR, RC2 0.3Ω

Switching Frequency, fs 20kHz

Diode Drop, Vd 0.75V

Diode Forward Resistance, Rd 0.11Ω

VII. COMBINED MODEL FOR CCM-DCM

The advantages of using such model is (a) Simulation ofCCM / DCM operation can be achieved in the same model(b) The decision is taken by the model and is made internal tothe circuit CCM/DCM 1 is an averaged block available underaverage.lib in LTSpice. A common equation satisfying CCMand DCM operation is shown below

For CCM and DCM operations, one of the governingequations is shown in [6] and (4). Where µ is the duty cyclein DCM operation.

< I1 > = V1/Re (29)< V1 > = ((1− µ)/µ)V2 (30)

Where µ is the duty cycle in DCM operation.Substituting, (30) in (4),

µ =V2

V2 + I1Re(31)

µ =1

1 + (ReI1)/V1(32)

µ = D (33)

(32) and (33) define D for the converter in CCM and DCMoperations. Combining them,

µ = max(d,1

1 + (ReI1)/V1) (34)

It can be noted from [1], that µDCM > µCCM . The modeluses two inputs viz,.(a) Leq = L1 L2/(L1+L2) and (b)fs

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VIII. RESULTS

Simulations were performed using LTSpice software pack-age. The equivalent switch network was available as a built-in library under ‘average.lib’, CCM-DCM1. D was variedfrom 0.2 to 0.9 in steps of 0.01 and V0 was analyzed. Itwas observed from Fig. 11 that V0 and iL1 increased withthe increase in duty cycle. However, iL2 decreased when theduty cycle increased which describes the working of a typicalSEPIC. Varying D, step changes in RL1 and RL2 were applied.

200mV 270mV 340mV 410mV 480mV 550mV 620mV 690mV 760mV 830mV0V

40V

80V

120V

160V

200V

240V

280V

320V

360V

400V

440V

480V

0A

8A

16A

24A

32A

40A

48A

56A

64A

72A

80A

88A

-9.6A

-8.8A

-8.0A

-7.2A

-6.4A

-5.6A

-4.8A

-4.0A

-3.2A

-2.4A

-1.6A

-0.8A

0.0A

V(n005)

I(L1)

I(L2)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\SEPIC_Chap_New.raw ---

Fig. 11: V0, IL1 and IL2 Vs. Time

V0 and iL1 were captured for the changes made. From Fig.12 it was observed that highest value of RL1 and lowestvalue of RL2 showed maximum V0. Fig. 13 shows the bodeplot of Gvd for a fixed load R. It was observed from thatthe phase crossover frequency was around 1.814 kHz, Gainmargin around 5.254 dB, gain cross over frequency around76.834 kHz, phase margin around 92.8450. Fig.14 showsthe nature of V0, iL1 and iL2 for varying D proportional tothe the control voltage, Vc for a Cuk converter. It was observedthat as D increased, V0 and iL2 decreased which defines thetypical working of the Cuk converter. Varying D, steps changesin RL1 and RL2 were applied. It can be observed from Fig.15 that highest RL1 and least RL2 showed maximum V0. Fig.16 shows the frequency response of Gvd for a fixed load R.The gain margin was to be infinity, phase cross frequency of81.982 kHz and phase margin around 200.3910.

200mV 270mV 340mV 410mV 480mV 550mV 620mV 690mV 760mV 830mV0V

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200V

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0A

8A

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24A

32A

40A

48A

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88A

V(n005)

I(L1)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\SEPIC_Chap_New.raw ---

RL1=130mΩ & RL2=110mΩ

Fig. 12: V0, iL1 Vs. Time

10Hz 100Hz 1KHz 10KHz 100KHz 1MHz-20dB

-15dB

-10dB

-5dB

0dB

5dB

10dB

15dB

20dB

25dB

30dB

35dB

40dB

-600°

-550°

-500°

-450°

-400°

-350°

-300°

-250°

-200°

-150°

-100°

-50°

0° V(n005)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\SEPIC_Chap_New.asc ---

Fig. 13: Bode plot of Gvd

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100mV 180mV 260mV 340mV 420mV 500mV 580mV 660mV 740mV 820mV 900mV-220V

-200V

-180V

-160V

-140V

-120V

-100V

-80V

-60V

-40V

-20V

0V

0A

1A

2A

3A

4A

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12A

13A

-1.4A

-1.3A

-1.2A

-1.1A

-1.0A

-0.9A

-0.8A

-0.7A

-0.6A

-0.5A

-0.4A

-0.3A

-0.2A

-0.1A

0.0A

V(n005)

I(L1)

I(L2)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\CUK_Average - NEW.raw ---

Fig. 14: V0, iL1, iL2 Vs. Time for Cuk converter

200mV 270mV 340mV 410mV 480mV 550mV 620mV 690mV 760mV 830mV-220V

-200V

-180V

-160V

-140V

-120V

-100V

-80V

-60V

-40V

-20V

0V

0A

1A

2A

3A

4A

5A

6A

7A

8A

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12A

13A

V(n005)

I(L1)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\CUK_Average - NEW.raw ---

RL1=0.15Ω and RL2=0.2Ω

Fig. 15: V0, iL1 Vs. Time for Cuk converter

10Hz 100Hz 1KHz 10KHz 100KHz-36dB

-30dB

-24dB

-18dB

-12dB

-6dB

0dB

6dB

12dB

18dB

24dB

30dB

60°

80°

100°

120°

140°

160°

180°

200°

220°

240°

260°

280° V(n005)

--- C:\Users\Lenovo\Desktop\_7ab3b523046a0b2116b56304c255ff57_week1\week1\CUK_Average - NEW.raw ---

Fig. 16: Gvd for Cuk converter

IX. CONCLUSION

In this paper, the circuit averaging technique for fourth orderconverters like Cuk and SEPIC was carried out to obtainthe frequency response for Gvd using LTSpice simulation.This method can be generalized to find the response for anytwo switch DC-DC converters operating in CCM / DCM.This helps in developing an efficient feedback control design.Higher D produced higher V0 in the converters. An appropriatecontroller to achieve sufficient gain margin and phase marginin closed loop operation and DCM analyses for isolatedconverters using CCM/DCM2 block are recommended.

REFERENCES

[1] Erickson, Robert W., and Dragan Maksimovic. Fundamentals of powerelectronics. Springer Science and Business Media, 2007.

[2] Bertoldi, Bruno, et al. ”A Non-Ideal SEPIC DCM Modeling for LEDLighting Applications.” 2018 IEEE 4th Southern Power ElectronicsConference (SPEC). IEEE, 2018.

[3] Eng, Vuthchhay, and Chanin Bunlaksananusorn. ”Modeling of a SEPICconverter operating in discontinuous conduction mode.” 2009 6th In-ternational Conference on Electrical Engineering/Electronics, Computer,Telecommunications and Information Technology. Vol. 1. IEEE,2009.

[4] Simonetti, Domingos Savio Lyrio, Javier Sebastian, and Javier Uceda.”The discontinuous conduction mode Sepic and Cuk power factor prereg-ulators: analysis and design.” IEEE Transactions on Industrial Electronics44.5 (1997): 630-637.

[5] Singer, Sigmunt, and Robert W. Erickson. ”Canonical modeling of powerprocessing circuits based on the POPI concept.” IEEE Transactions onPower Electronics 7.1 (1992): 37-43.

[6] Lee, Chien-Min, and Yen-Shin Lai. ”Averaged switch modeling of dc/dcconverters using new switch network.” 2007 7th International Conferenceon Power Electronics and Drive Systems. IEEE, 2007.

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[7] Surya, Sumukh, and Vineeth Patil. ”Cuk Converter as an Efficient Driverfor LED.” 2019 4th International Conference on Electrical, Electronics,Communication, Computer Technologies and Optimization Techniques(ICEECCOT). IEEE, 2019.