CSD17573Q5B 30-V N-Channel NexFETâ„¢ Power MOSFETs 2020. 12. 15.آ  C oss = C ds + C gd C rss =...

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Transcript of CSD17573Q5B 30-V N-Channel NexFETâ„¢ Power MOSFETs 2020. 12. 15.آ  C oss = C ds + C gd C rss =...

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    ) TC = 25°C, I D = 35A TC = 125°C, I D = 35A

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    ID = 35A VDS = 15V

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    An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

    CSD17573Q5B SLPS492B –JUNE 2014–REVISED APRIL 2017

    CSD17573Q5B 30-V N-Channel NexFET™ Power MOSFETs

    1

    1 Features 1• Low Qg and Qgd • Ultra-Low RDS(on) • Low-Thermal Resistance • Avalanche Rated • Lead-Free Terminal Plating • RoHS Compliant • Halogen Free • SON 5-mm × 6-mm Plastic Package

    2 Applications • Point-of-Load Synchronous Buck Converter for

    Applications in Networking, Telecom, and Computing Systems

    • Optimized for Synchronous FET Applications

    3 Description This 0.84-mΩ, 30-V, SON 5-mm × 6-mm NexFET™ power MOSFET is designed to minimize losses in power conversion applications.

    Top View

    Product Summary TA = 25°C TYPICAL VALUE UNIT

    VDS Drain-to-Source Voltage 30 V

    Qg Gate Charge Total (4.5 V) 49 nC

    Qgd Gate Charge Gate-to-Drain 11.9 nC

    RDS(on) Drain-to-Source On Resistance VGS = 4.5 V 1.19

    mΩ VGS = 10 V 0.84

    VGS(th) Threshold Voltage 1.4 V

    Device Information(1) DEVICE QTY MEDIA PACKAGE SHIP

    CSD17573Q5B 2500 13-Inch Reel SON 5.00-mm × 6.00-mm

    Plastic Package

    Tape and ReelCSD17573Q5BT 250 7-Inch Reel

    (1) For all available packages, see the orderable addendum at the end of the data sheet.

    Absolute Maximum Ratings TA = 25°C VALUE UNIT

    VDS Drain-to-Source Voltage 30 V

    VGS Gate-to-Source Voltage ±20 V

    ID

    Continuous Drain Current (Package Limited) 100

    AContinuous Drain Current (Silicon Limited),TC = 25°C 332

    Continuous Drain Current(1) 43

    IDM Pulsed Drain Current(2) 400 A

    PD Power Dissipation(1) 3.2

    W Power Dissipation, TC = 25°C 195

    TJ, Tstg

    Operating Junction, Storage Temperature –55 to 150 °C

    EAS Avalanche Energy, Single Pulse ID = 76, L = 0.1 mH, RG = 25 Ω

    289 mJ

    (1) Typical RθJA = 40°C/W on a 1-in2, 2-oz Cu pad on a 0.06-in thick FR4 PCB.

    (2) Max RθJC = 0.8°C/W, pulse duration ≤ 100 μs, duty cycle ≤ 1%.

    RDS(on) vs VGS Gate Charge

    http://www.ti.com/product/csd17573q5b?qgpn=csd17573q5b http://www.ti.com/product/CSD17573Q5B?dcmp=dsproject&hqs=pf http://www.ti.com/product/CSD17573Q5B?dcmp=dsproject&hqs=sandbuysamplebuy http://www.ti.com/product/CSD17573Q5B?dcmp=dsproject&hqs=tddoctype2 http://www.ti.com/product/CSD17573Q5B?dcmp=dsproject&hqs=swdesKit http://www.ti.com/product/CSD17573Q5B?dcmp=dsproject&hqs=supportcommunity

  • 2

    CSD17573Q5B SLPS492B –JUNE 2014–REVISED APRIL 2017 www.ti.com

    Product Folder Links: CSD17573Q5B

    Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated

    Table of Contents 1 Features .................................................................. 1 2 Applications ........................................................... 1 3 Description ............................................................. 1 4 Revision History..................................................... 2 5 Specifications......................................................... 3

    5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 5.3 Typical MOSFET Characteristics.............................. 4

    6 Device and Documentation Support.................... 7 6.1 Receiving Notification of Documentation Updates.... 7

    6.2 Community Resources.............................................. 7 6.3 Trademarks ............................................................... 7 6.4 Electrostatic Discharge Caution................................ 7 6.5 Glossary .................................................................... 7

    7 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 Q5B Package Dimensions ........................................ 8 7.2 Recommended PCB Pattern..................................... 9 7.3 Recommended Stencil Pattern ................................. 9 7.4 Q5B Tape and Reel Information ............................. 10

    4 Revision History

    Changes from Revision A (February 2015) to Revision B Page

    • Changed Figure 10 in Typical MOSFET Characteristics section ........................................................................................... 4 • Added Receiving Notification of Documentation Updates and Community Resources to the Device and

    Documentation Support section ............................................................................................................................................. 7 • Changed the dimension between pads 3 and 4 from 0.028 inches : to 0.050 inches in the Recommended PCB

    Pattern section's diagram to correct typo ............................................................................................................................... 9

    Changes from Original (June 2014) to Revision A Page

    • Corrected typo of Threshold Voltage units to read "V" .......................................................................................................... 1

    http://www.ti.com/product/csd17573q5b?qgpn=csd17573q5b http://www.ti.com http://www.ti.com/product/csd17573q5b?qgpn=csd17573q5b http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS492B&partnum=CSD17573Q5B

  • 3

    CSD17573Q5B www.ti.com SLPS492B –JUNE 2014–REVISED APRIL 2017

    Product Folder Links: CSD17573Q5B

    Submit Documentation FeedbackCopyright © 2014–2017, Texas Instruments Incorporated

    5 Specifications

    5.1 Electrical Characteristics TA = 25°C (unless otherwise stated)

    PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-source voltage VGS = 0 V, ID = 250 μA 30 V IDSS Drain-to-source leakage current VGS = 0 V, VDS = 24 V 1 μA IGSS Gate-to-source leakage current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate-to-source threshold voltage VDS = VGS, ID = 250 μA 1.1 1.4 1.8 V

    RDS(on) Drain-to-source on resistance VGS = 4.5 V, ID = 35 A 1.19 1.45 mΩ VGS = 10 V, ID = 35 A 0.84 1.00

    gƒs Transconductance VDS = 15 V, ID = 35 A 181 S DYNAMIC CHARACTERISTICS Ciss Input capacitance

    VGS = 0 V, VDS = 15 V, ƒ = 1 MHz 6920 9000 pF

    Coss Output capacitance 769 1000 pF Crss Reverse transfer capacitance 300 390 pF RG Series gate resistance 0.9 1.8 Ω Qg Gate charge total (4.5 V)

    VDS = 15 V, ID = 35 A

    49 64 nC Qgd Gate charge gate-to-drain 11.9 nC Qgs Gate charge gate-to-source 17.1 nC Qg(th) Gate charge at Vth 8.6 nC Qoss Output charge VDS = 30 V, VGS = 0 V 21 nC td(on) Turnon delay time

    VDS = 15 V, VGS = 10 V, IDS = 35 A, RG = 0 Ω

    6 ns tr Rise time 20 ns td(off) Turnoff delay time 40 ns tƒ Fall Time 7 ns DIODE CHARACTERISTICS VSD Diode forward voltage ISD = 35 A, VGS = 0 V 0.8 1 V Qrr Reverse recovery charge VDS= 15 V, IF = 35 A,

    di/dt = 300 A/μs 29 nC

    trr Reverse recovery time 21 ns

    (1) RθJC is determined with the device mounted on a 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu pad on a 1.5-in × 1.5-in (3.81-cm × 3.81- cm), 0.06-in (1.52-mm) thick FR4 PCB. RθJC is specified by design, whereas RθJA is determined by the user’s board design.

    (2) Device mounted on FR4 material with 1-in2 (6.45-cm2), 2-oz (0.071-mm) thick Cu.

    5.2 Thermal Information TA = 25°C (unless otherwise stated)

    THERMAL METRIC MIN TYP MAX UNIT RθJC Junction-to-case thermal resistance (1) 0.8 °C/W RθJA Junction-to-ambient thermal resistance (1) (2) 50 °C/W

    http://www.ti.com/product/csd17573q5b?qgpn=csd17573q5b http://www.ti.com http://www.ti.com/product/csd17573q5b?qgpn=csd17573q5b http://www.go-dsp.com/forms/techdoc/doc_feedback.htm?litnum=SLPS492B&partnum=CSD17573Q5B

  • GATE Source

    DRAIN

    N - C h a n 5 x 6 Q F N T T A M A X R e v 3

    M0137-01

    GATE Source

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    N - C h a n 5 x 6 Q F N T T A M I N R e v 3

    M0137-02

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    CSD17573Q5B SLPS492B –JUNE 2014–REVISED APRIL 2017 www.ti.com

    Product Folder Links: CSD17573Q5B

    Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated

    Max RθJA = 50°C/W when mounted on 1 in2 (6.45 cm2) of 2-oz (0.071-mm) thick Cu.

    Max RθJA = 125°C/W when mounted on a minimum pad area of 2-oz (0.071-mm) thick Cu.

    5.3 Typical MOSFET Characteristics TA = 25