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12
MC145406 1 MOTOROLA EIA 232–E and CCITT V.28 (Formerly RS–232–D) The MC145406 is a silicon–gate CMOS IC that combines three drivers and three receivers to fulfill the electrical specifications of standards EIA 232–E and CCITT V.28. The drivers feature true TTL input compatibility, slew–rate–limited output, 300–power–off source imped- ance, and output typically switching to within 25% of the supply rails. The receivers can handle up to ± 25 V while presenting 3 to 7 kimpedance. Hysteresis in the receivers aids reception of noisy signals. By combining both drivers and receivers in a single CMOS chip, the MC145406 provides efficient, low–power solutions for EIA 232–E and V.28 applications. Drivers ± 5 V to ± 12 V Supply Range 300–Power–Off Source Impedance Output Current Limiting TTL Compatible Maximum Slew Rate = 30 V/μs Receivers ± 25 V Input Voltage Range When V DD = 12 V, V SS = – 12 V 3 to 7 kInput Impedance Hysteresis on Input Switchpoint BLOCK DIAGRAM V DD RECEIVER V CC DO DI 1.4 V HYSTERESIS 1.8 V 1.0 V DRIVER LEVEL SHIFT 300 Tx V SS 5.4 k Rx 15 k*Protection circuit V CC V DD V DD V CC V SS + + * Order this document by MC145406/D SEMICONDUCTOR TECHNICAL DATA PIN ASSIGNMENT P SUFFIX PLASTIC CASE 648 DW SUFFIX SOG CASE 751G 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 R D V DD Rx1 Tx1 Rx2 Tx2 Rx3 Tx3 V SS V CC DO1 DI1 DO2 DI2 DO3 DI3 GND D = DRIVER R = RECEIVER R R D D 16 1 16 1 SD SUFFIX SSOP CASE 940B Motorola, Inc. 1995 REV 4 1/95 ARCHIVED BY FREESCALE SEMICONDUCTOR, INC.

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MC1454061

MOTOROLA

EIA 232–E and CCITT V.28 (Formerly RS–232–D)

The MC145406 is a silicon–gate CMOS IC that combines three driversand three receivers to fulfill the electrical specifications of standardsEIA 232–E and CCITT V.28 . The d r i ve rs fea tu re t rue TTL inpu tcompatibility, slew–rate–limited output, 300–Ω power–off source imped-ance, and output typically switching to within 25% of the supply rails. Thereceivers can handle up to ± 25 V while presenting 3 to 7 kΩ impedance.Hysteresis in the receivers aids reception of noisy signals. By combiningboth drivers and receivers in a single CMOS chip, the MC145406 providesefficient, low–power solutions for EIA 232–E and V.28 applications.

Drivers• ± 5 V to ±12 V Supply Range• 300–Ω Power–Off Source Impedance• Output Current Limiting• TTL Compatible• Maximum Slew Rate = 30 V/µs

Receivers• ± 25 V Input Voltage Range When VDD = 12 V, VSS = – 12 V• 3 to 7 kΩ Input Impedance• Hysteresis on Input Switchpoint

BLOCK DIAGRAM

VDD

RECEIVER

VCC

DO

DI

1.4 V

HYSTERESIS

1.8 V

1.0 V

DRIVER

LEVELSHIFT

300 ΩTx

VSS

5.4 k

Rx15 kΩ

*Protection circuit

VCC

VDD

VDD

VCC

VSS

+

+

*

Order this documentby MC145406/D

SEMICONDUCTOR TECHNICAL DATA

PIN ASSIGNMENT

P SUFFIXPLASTICCASE 648

DW SUFFIXSOG

CASE 751G

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

R

D

VDD

Rx1

Tx1

Rx2

Tx2

Rx3

Tx3

VSS

VCC

DO1

DI1

DO2

DI2

DO3

DI3

GND

D = DRIVERR = RECEIVER

R

R

D

D

16

1

16

1

SD SUFFIXSSOP

CASE 940B

Motorola, Inc. 1995 REV 41/95

ARCHIVED BY FREESCALE SEMICONDUCTOR, INC.

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MC1454062

MOTOROLA

MAXIMUM RATINGS (Voltage polarities referenced to GND)

Rating Symbol Value Unit

DC Supply Voltages (VDD ≥ VCC) VDDVSSVCC

– 0.5 to + 13.5+ 0.5 to – 13.5– 0.5 to + 6.0

V

Input Voltage RangeRx1–3 InputsDI1–3 Inputs

VIR(VSS – 15) to (VDD + 15)

– 0.5 to (VCC + 0.5)

V

DC Current Per Pin ± 100 mA

Power Dissipation PD 1.0 W

Operating Temperature Range TA – 40 to + 85 °C

Storage Temperature Rate Tstg – 85 to + 150 °C

DC ELECTRICAL CHARACTERISTICS (All polarities referenced to GND = 0 V, TA = – 40 to +85°C)

Parameter Symbol Min Typ Max Unit

DC Supply VoltageVDDVSSVCC (VDD ≥ VCC)

VDDVSSVCC

4.5– 4.54.5

5 to 12– 5 to – 12

5.0

13.2– 13.2

5.5

V

Quiescent Supply Current (Outputs unloaded, inputs low)VDD = + 12 VVSS = – 12 VVCC = + 5 V

IDDISSICC

———

140340300

400600450

µA

RECEIVER ELECTRICAL SPECIFICATIONS(Voltage polarities referenced to GND = 0 V, VDD = + 5 to + 12 V, VSS = – 5 to – 12 V, VDD ≥ VCC, TA = – 40 to + 85°C)

Characteristic Symbol Min Typ Max Unit

Input Turn–on Threshold Rx1–Rx3VDO1–DO3 = VOL, VCC = 5.0 V ± 5%

Von 1.35 1.80 2.35 V

Input Turn–off Threshold Rx1–Rx3VDO1–DO3 = VOH, VCC = 5.0 V ± 5%

Voff 0.75 1.00 1.25 V

Input Threshold Hysteresis Rx1–Rx3VCC = 5.0 V ± 5%

Von–Voff 0.6 0.8 — V

Input Resistance Rx1–Rx3(VSS – 15 V) ≤ VRx1–Rx3 ≤ (VDD + 15 V)

Rin 3.0 5.4 7.0 kΩ

High–Level Output Voltage (VRx1–Rx3 = – 3 V to (VSS – 15 V))*DO1–DO3

IOH = – 20 µA, VCC = + 5.0 VIOH = –1 mA, VCC = + 5.0 V

VOH4.93.8

4.94.3

——

V

Low–Level Output Voltage (VRx1–Rx3 = + 3 V to (VDD + 15 V))* DO1–DO3IOL = + 20 µA, VCC = + 5.0 VIOL = + 2 mA, VCC = + 5.0 VIOL = + 4 mA, VCC = + 5.0 V

VOL———

0.010.020.5

0.10.50.7

V

* This is the range of input voltages as specified by EIA 232–E to cause a receiver to be in the high or low logic state.

This device contains protection circuitry to pro-tect the inputs against damage due to high staticvoltages or electric fields; however, it is advisedthat normal precautions be taken to avoid applica-tion of any voltage higher than maximum ratedvoltages to this high impedance circuit. For properoperation, it is recommended that the voltages atthe DI and DO pins be constrained to the rangeGND ≤VDI≤ VCC and GND≤ VDO ≤ VCC. Also, thevoltage at the Rx pin should be constrained to(VSS – 15 V) ≤ VRx1–3 ≤ (VDD + 15 V), and Txshould be constrained to VSS ≤ VTx1–3 ≤ VDD.

Unused inputs must always be tied to an ap-propriate logic voltage level (e.g., GND or VCC forDI and Ground for Rx.)

ARCHIVED BY FREESCALE SEMICONDUCTOR, INC.

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MC1454063

MOTOROLA

ELECTRICAL SPECIFICATIONS (Voltage polarities referenced to GND = 0 V, VCC = + 5 V ± 5%, TA = – 40 to + 85°C)

Characteristic Symbol Min Typ Max Unit

Digital Input Voltage DI1–DI3Logic 0Logic 1

VILVIH

—2.0

——

0.8—

V

Input Current DI1–DI3VDI1–DI3 = VCC

Iin — — ± 1.0 µA

Output High Voltage (VDI1–3 = Logic 0, RL = 3.0 kΩ) Tx1–Tx3VDD = + 5.0 V, VSS = – 5.0 V

VDD = + 6.0 V, VSS = – 6.0 VDD = + 12.0 V, VSS = – 12.0 V

VOH3.54.39.2

3.94.79.5

———

V

Output Low Voltage* (VDI1–3 = Logic 1, RL = 3.0 kΩ) Tx1–Tx3VDD = + 5.0 V, VSS = – 5.0 VVDD = + 6.0 V, VSS = – 6.0 V

VDD = + 12.0 V, VSS = – 12.0 V

VOL– 4.0– 4.5– 10.0

– 4.3– 5.2

– 10.3

———

V

Off Source Resistance (Figure 1) Tx1–Tx3VDD = VSS = GND = 0 V, VTx1–Tx3 = ± 2.0 V

300 — — Ω

Output Short–Circuit Current (VDD = + 12.0 V, VSS = – 12.0 V) Tx1–Tx3Tx1–Tx3 shorted to GND**

Tx1–Tx3 shorted to ± 15.0 V***

ISC——

± 22± 60

± 60± 100

mA

* The voltage specifications are in terms of absolute values.** Specification is for one Tx output pin to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dissipation

limits will be exceeded.*** This condition could exceed package limitations.

SWITCHING CHARACTERISTICS (VCC = + 5 V ± 5%, TA = – 40 to + 85°C; See Figures NO TAG and NO TAG)

Drivers

Characteristic Symbol Min Typ Max Unit

Propagation Delay Time Tx1–Tx3Low–to–High

RL = 3 kΩ, CL = 50 pF tPLH — 300 500

ns

High–to–LowRL = 3 kΩ CL = 50 pF

tPHL— 300 500

Output Slew Rate Tx1–Tx3Minimum Load

RL = 7 kΩ, CL = 0 pF, VDD = + 6 to + 12 V, VSS = – 6 to – 12 V

SR

— ± 9 ± 30

V/µs

Maximum LoadRL = 3 kΩ, CL = 2500 pF

VDD = + 12 V, VSS = – 12 VVDD = + 5 V, VSS = – 5 V

4—

——

——

Receivers (CL = 50 pF)

Characteristic Symbol Min Typ Max Unit

Propagation Delay Time DO1–DO3Low–to–High tPLH — 150 425

ns

High–to–Low tPHL — 150 425

Output Rise Time DO1–DO3 tr — 250 400 ns

Output Fall Time DO1–DO3 tf — 40 100 ns

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MC1454064

MOTOROLA

Vin = ± 2 V

3

5

7

14

12

10

8 9

1 16VDD VCC

DI1

DI2

DI3

VSS GND

Tx3

Tx2

Tx1

Rout =VinI

Figure 1. Power–Off Source Resistance (Drivers)

Figure 2. Switching Characteristics

Figure 3. Slew–Rate Characterization

DRIVERS

DI1–DI33 V

0 V

VOH

VOL

Tx1–Tx3

tPLHtPHL

50%

tf tr

10%90%

RECEIVERS

Rx1–Rx3

DO1–DO3

+ 3 V

0 V

VOH

VOL

tPLHtPHL

tf tr

50%

DRIVERS

Tx1–Tx3

90%50%

3 V

– 3 V

3 V

– 3 V

tSHLtSLH

SLEW RATE (SR) =– 3 V – (3 V)

OR3 V – ( – 3 V)

tSLH tSHL

10%

PIN DESCRIPTIONS

VDDPositive Power Supply (Pin 1)

The most positive power supply pin, which is typically + 5to + 12V.

VSSNegative Power Supply (Pin 8)

The most negative power supply pin, which is typically – 5to – 12 V.

VCCDigital Power Supply (Pin 16)

The digital supply pin, which is connected to the logicpower supply (maximum + 5.5 V). VCC must be less thanor equal to VDD.

GNDGround (Pin 9)

Ground return pin is typically connected to the signalground pin of the EIA 232–E connector (Pin 7) as well as tothe logic power supply ground.

Rx1, Rx2, Rx3Receive Data Input (Pins 2, 4, 6)

These are the EIA 232–E receive signal inputs whosevoltages can range from (VDD + 15 V) to (VSS – 15 V). A volt-age between + 3 and (VDD + 15 V) is decoded as a spaceand causes the corresponding DO pin to swing to ground (0V); a voltage between – 3 and (VDD – 15 V) is decoded as amark and causes the DO pin to swing up to VCC. The actualturn–on input switchpoint is typically biased at 1.8 V aboveground, and includes 800mV of hysteresis for noise rejec-tion. The nominal input impedance is 5 kΩ. An open orgrounded input pin is interpreted as a mark, forcing the DOpin to VCC.

DO1, DO2, DO3Data Output (Pins 11, 13, 15)

These are the receiver digital output pins, which swingfrom VCC to GND. A space on the Rx pin causes DO to pro-duce a logic 0; a mark produces a logic 1. Each output pin iscapable of driving one LSTTL input load.

DI1, DI2, DI3Data Input (Pins 10, 12,14)

These are the high–impedance digital input pins to thedrivers. TTL compatibility is accomplished by biasing the in-put switchpoint at 1.4 V above GND. However, 5–V CMOScompatibility is maintained as well. Input voltage levels onthese pins must be between VCC and GND.

Tx1, Tx2, Tx3Transmit Data Output(Pins 3, 5, 7)

These are the EIA 232–E transmit signal output pins,which swing toward VDD and VSS. A logic 1 at a DI inputcauses the corresponding Tx output to swing toward VSS. Alogic 0 causes the output to swing toward VDD (the outputvoltages will be slightly less than VDD or VSS depending uponthe output load). Output slew rates are limited to a maximumof 30 V per µs. When the MC145406 is off (VDD = VSS = VCC= GND), the minimum output impedance is 300 Ω.

ARCHIVED BY FREESCALE SEMICONDUCTOR, INC.

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MC1454065

MOTOROLA

APPLICATIONS INFORMATION

The MC145406 has been designed to meet the electricalspecifications of standards EIA 232–E and CCITT V.28.EIA 232–E defines the electrical and physical interface be-tween Data Communication Equipment (DCE) and DataTerminal Equipment (DTE). A DCE is connected to a DTEusing a cable that typically carries up to 25 leads. Theseleads, referred to as interchange circuits, allow the transferof timing, data, control, and test signals. Electrically thistransfer requires level shifting between the TTL/CMOS log-ic levels of the computer or modem and the high voltage lev-els of EIA 232–E, which can range from ± 3 to ± 25 V. TheMC145406 provides the necessary level shifting as well asmeeting other aspects of the EIA 232–E specification.

DRIVERS

As defined by the specification, an EIA 232–E driver pres-ents a voltage of between ± 5 to ± 15 V into a load of be-tween 3 to 7 kΩ. A logic 1 at the driver input results in avoltage of between – 5 to – 15 V. A logic 0 results in a voltagebetween + 5 to + 15V. When operating VDD and VSS at ± 7 to± 12 V, the MC145406 meets this requirement. When operat-ing at ± 5 V, the MC145406 drivers produce less than± 5 V at the output (when terminated), which does not meetEIA 232–E specification. However, the output voltages whenusing a ± 5 V power supply are high enough (around± 4 V) to permit proper reception by an EIA 232–E receiver,and can be used in applications where strict compliance toEIA 232–E is not required.

Another requirement of the MC145406 drivers is thatthey withstand a short to another driver in the EIA 232–Ecable. The worst–case condition that is permitted byEIA 232–E is a ± 15 V source that is current limited to 500mA. The MC145406 drivers can withstand this conditionmomentarily. In most short circuit conditions the sourcedriver will have a series 300 Ω output impedance neededto satisfy the EIA 232–E driver requirements. This will re-duce the short circuit current to under 40 mA which is anacceptable level for the MC145406 to withstand.

Unlike some other drivers, the MC145406 drivers featurean internally–limited output slew–rate that does not exceed30 V per µs.

RECEIVERS

The job of an EIA 232–E receiver is to level–shift voltagesin the range of – 25 to + 25 V down to TTL/CMOS logic lev-els (0 to + 5 V). A voltage of between – 3 and – 25 V on Rx1is defined as a mark and produces a logic 1 at DO1. A volt-age between + 3 and + 25 V is a space and produces a logiczero. While receiving these signals, the Rx inputs must pres-ent a resistance between 3 and 7 kΩ. Nominally, the input re-sistance of the Rx1–Rx3 inputs is 5.4 kΩ.

The input threshold of the Rx1–Rx3 inputs is typicallybiased at 1.8 V above ground (GND) with typically 800 mV ofhysteresis included to improve noise immunity. The 1.8 V

bias forces the appropriate DO pin to a logic 1 when its Rxinput is open or grounded as called for in the EIA 232–Especification. Notice that TTL logic levels can be applied tothe Rx inputs in lieu of normal EIA 232–E signal levels. Thismight be helpful in situations where access to the modem orcomputer through the EIA 232–E connector is necessarywith TTL devices. However, it is important not to connect theEIA 232–E outputs (Tx1–Tx3) to TTL inputs since TTL oper-ates off + 5 V only, and may be damaged by the high outputvoltage of the MC145406.

The DO outputs are to be connected to a TTL or CMOSinput (such as an input to a modem chip). These outputswill swing from VCC to ground, allowing the designer to op-erate the DO and DI pins from digital power supply. The Txand Rx sections are independently powered by VDD andVSS so that one may run logic at + 5 V and the EIA 232–Esignals at ± 12 V.

POWER SUPPLY CONSIDERATIONS

Figure 4 shows a technique to guard against excessivedevice current.

The diode D1 prevents excessive current from flowingthrough an internal diode from the VCC pin to the VDD pinwhen VDD < VCC by approximately 0.6 V. This high currentcondition can exist for a short period of time during powerup/down. Additionally, if the + 12 V supply is switched offwhile the + 5 V is on and the off supply is a low impedanceto ground, the diode D1 will prevent current flow throughthe internal diode.

The diode D2 is used as a voltage clamp, to prevent VSSfrom drifting positive to VCC, in the event that power is re-moved from VSS (Pin 12). If VSS power is removed, and theimpedance from the VSS pin to ground is greater thanapproximately 3 kΩ, this pin will be pulled to VCC by internalcircuitry causing excessive current in the VCC pin.

If by design, neither of the above conditions are allowedto exist, then the diodes D1 and D2 are not required.

ESD PROTECTION

ESD protection on IC devices that have their pins accessi-ble to the outside world is essential. High static voltages ap-plied to the pins when someone touches them either directlyor indirectly can cause damage to gate oxides and transistorjunctions by coupling a portion of the energy from the I/O pinto the power supply buses of the IC. This coupling will usuallyoccur through the internal ESD protection diodes. The key toprotecting the IC is to shunt as much of the energy to groundas possible before it enters the IC. Figure 4 shows a tech-nique which will clamp the ESD voltage at approximately ±15 V using the MMVZ15VDLT1. Any residual voltage whichappears on the supply pins is shunted to ground through thecapacitors C1–C3. This scheme has provided protection tothe interface part up to ± 10 kV, using the human body modeltest.

ARCHIVED BY FREESCALE SEMICONDUCTOR, INC.

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MC1454066

MOTOROLA

0.1 µF

VCC

0.1 µF

VDD

MC145406

1 16

2 15

3 14

4 13

5 12

6 11

7 10

8 9

VSS 0.1 µF

RxI

TxO

RxI

TxO

RxI

TxO

TOCONNECTOR

MMBZ15VDLT × 6 IN4001

IN5818

D1

C1 C2

D2C3

Figure 4. ESD and Power Supply Networks

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MC1454067

MOTOROLA

17

20 kΩ

NC DO3

10 µF

RTLA**DTMFINPUT

RDSI

20 kΩ

CDSI

69

1

15

8

3.579MHz

3

11

5

14

2

13

7

12

4

19

10

18

16

VDDTLA

DSI

Xin

Xout

CD

TxD

TxA

RxA2

RxA1

ExI

FB

VAG

CDT GND CDA

LB

SQT

RxDRTx600

+10 kΩTIP

600:600

RING

VDD

VDD BYPASS

CFB

MODE

+ 5 V

1

MC145442/3

10 kΩ

10 kΩ

CCDA**0.1 µF

CCDTVSS BYPASS

14

15

12

13

10

11

8 9

6

7

4

5

2

38

2

3

7

EIA 232–EDB–25

CONNECTOR

NC

NC

VSS GND

DI3

DO2

DI2

DO1

DI1

VDD VCCMC145406

Tx1

Rx1

Tx2

Rx2

Tx3

Rx3

16

– 5 V*Line protection circuit**Refer to the applications information for values of CCDA and RTLA

0.1 µF0.1 µF

0.1 µF0.1 µF

0.1 µF

10 k 10 kΩ

*

0.1 µF

0.1 µF

0.1 µF

Figure 5. 5–V 300–Baud Modem with EIA 232–E Interface

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MC1454068

MOTOROLA

1 2 34 5 67 8 9

0* #

TWISTEDPAIR

MC34119SPEAKERDRIVER

MC145412/13/16PULSE/TONE

DIALERHOOKSWITCH

MC145503FILTER/CODEC

RINGING

MC145426UDLT

LINEINTERFACE

(TRANSFORMERAND

PROTECTION)

CONNECTIONTO EXTERNAL

TERMINALOR PC

MC145406RS–232 DRIVER

RECEIVER

MC145428DATASET

INTERFACE

+ 5 V

GND

– 5 V

MC34129SWITCHING

POWERSUPPLY

(ISOLATED)

LINEFILTER

SYNC

Figure 6. Line–Powered Voice/Data Telephone with Electrically Isolated EIA 232–E Interface

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MC1454069

MOTOROLA

CC

VC

CV

CC

V

CC

V

DD

V

CC

VC

CV

DD

VD

DV

DD

V

DD

V

DD

V

SSVSSV

SSV

SSV

SSVIN

1

ref

V

0.1

µF

0.1

µF

0.1

µF

1.0

µF*

*0.

F

0.1

µF

R5

6D

SR TxRT

S

CD

CTS R

x

SG

2 4 8 5 3 7

C14

DB-2

5

CC

V

MC1

4540

6

Rx1

Rx2

Rx3

Tx1

Tx2

Tx3

DO

1D

O2

DO

3D

I1D

I2D

I3

1 8 2 4 6 3 5 7

9 16 15 13 11 12 1014

NC

NC

NC

NC

NC

NC

R1

S1

GN

D

D2

Q1

Q1

Q2

QQ1

D1

Q2 S2 C2

14

133

14 7 12

5 6 2 8 9 10 11

NC

NC

STST ST ST ST ST

MC7

4HC7

4

RxS

BCTx

D

DL

BRC

LK

RxD

BR1

BR2

BR3

SB

TxS

RES

ETD

CO

DO

ED

CD

IE

DC

IC

M

MC1

4542

8

125

20161314151718191

2 3 4 11 6 7 8 9 10

0.1

µF

NC

NC

OU

T4O

UT2

IN4

IN3

OU

T3O

UT1

OU

T6IN

6IN

5O

UT5

IN2

MC1

4069

UB

89

147

4 5 6

1 2 3

1210

1311

20 p

F

20 p

F

10 M

4.09

6M

Hz

2.04

8 M

Hz

128

kHz

8 M

Hz

1000

pF*

NC

NC

NC

NC

NC

NC

bQa

Q1

C aa

Q2

aQ

3

bQ

1 bQ

2 bQ

3 bQ

4a

Q4aR

bQ

2G

ND

MC7

4HC3

93

34

51 14 2 7 12

11 10 9

613

8

NC

STST

4.09

6 M

Hz

21 20

18 19 17 14 12 15

1116

98

54

76

310

222

113

Rx

RE1

TDC

/RD

CTE

1M

SITx

LO1

LO2

SO1

SI1

L1SE

SIE

LBPD

CC

ISO

2SI

2VD

MC1

4542

2

D1

D2

10 k

220

220

TIP

RIN

G

TR1

NC

NCT1

89

7 6

510

1 2 3 4

*For

opt

iona

l filt

erin

g.**

TR

1 sh

ould

be

cut w

hen

this

cap

acito

r is

use

d.

ST

— S

TR

AP

NC

— N

O C

ON

NE

CT

ION

= 5

VG

ND

= 0

VA

ND

CC

V DD

VA

RE

DIS

CU

SS

ED

IN T

HE

EIA

-232

-D S

EC

TIO

NS

SV

GN

D

C1

R2

Figure 7. 80–kbps Limited Distance Modem with EIA 232–E Interface (Master)

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MC14540610

MOTOROLA

PACKAGE DIMENSIONS

P SUFFIXCASE 648–08

MIN MINMAX MAXINCHES MILLIMETERS

DIMABCDFGHJKLMS

18.806.353.690.391.02

0.212.807.50

0°0.51

19.556.854.440.531.77

0.383.307.7410°1.01

0.7400.2500.1450.0150.040

0.0080.1100.295

0°0.020

0.7700.2700.1750.0210.070

0.0150.1300.305

10°0.040

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN

FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.5. ROUNDED CORNERS OPTIONAL.

2.54 BSC1.27 BSC

0.100 BSC0.050 BSC

STYLE 1:PIN 1. CATHODE

2. CATHODE3. CATHODE4. CATHODE5. CATHODE6. CATHODE7. CATHODE8. CATHODE9. ANODE

10. ANODE11. ANODE12. ANODE13. ANODE14. ANODE15. ANODE16. ANODE

STYLE 2:PIN 1. COMMON DRAIN

2. COMMON DRAIN3. COMMON DRAIN4. COMMON DRAIN5. COMMON DRAIN6. COMMON DRAIN7. COMMON DRAIN8. COMMON DRAIN9. GATE

10. SOURCE11. GATE12. SOURCE13. GATE14. SOURCE15. GATE16. SOURCE

-A-

B1 8

916

F

HG

D 16 PL

S

C

-T- SEATINGPLANE

K JM

L

T A0.25 (0.010) M M

DW SUFFIXCASE 751G–02

1 8

916

MIN MINMAX MAXMILLIMETERS INCHES

DIMABCDFGJKMPR

10.157.402.350.350.50

0.250.10

0°10.050.25

10.457.602.650.490.90

0.320.25

7°10.550.75

0.4000.2920.0930.0140.020

0.0100.004

0°0.3950.010

0.4110.2990.1040.0190.035

0.0120.009

7°0.4150.029

1.27 BSC 0.050 BSC

-A-

-B- P 8 PL

G 14 PL

-T-

D 16 PLK

C

SEATINGPLANE

M

R X 45°

0.25 (0.010) BM M

0.25 (0.010) T A BM S S

NOTES:1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.5. DIMENSION D DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.13(0.005) TOTAL IN EXCESS OF D DIMENSIONAT MAXIMUM MATERIAL CONDITION.

F

J

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MC14540611

MOTOROLA

SD SUFFIXCASE 940B–02

DIMA

MIN MAX MIN MAXINCHES

6.10 6.30 0.240 0.248

MILLIMETERS

B 5.20 5.38 0.205 0.212C 1.75 1.99 0.069 0.078D 0.25 0.38 0.010 0.015F 0.65 1.00 0.026 0.039G 0.65 BSC 0.026 BSCH 0.73 0.90 0.029 0.035J 0.10 0.20 0.004 0.008L 7.65 7.90 0.301 0.311M 0 8 0 8 N 0.05 0.21 0.002 0.008

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND AREMEASURED AT THE PARTING LINE. MOLD FLASHOR PROTRUSIONS SHALL NOT EXCEED 0.15(0.006) PER SIDE.

4. DIMENSION IS THE LENGTH OF TERMINALFOR SOLDERING TO A SUBSTRATE.

5. TERMINAL POSITIONS ARE SHOWN FORREFERENCE ONLY.

6. THE LEAD WIDTH DIMENSION DOES NOTINCLUDE DAMBAR PROTRUSION. ALLOWABLEDAMBAR PROTRUSION SHALL BE 0.08 (0.003)TOTAL IN EXCESS OF THE LEAD WIDTHDIMENSION.

-T-

H

GD

0.120 (0.005) M T P S

N

C

A

B

0.076 (0.003)

-R-

-P-

16 8

71

L

0.250 (0.010) M R M

F

J M

NOTE 4

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MC14540612

MOTOROLA

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in differentapplications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola doesnot convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components insystems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure ofthe Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any suchunintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmlessagainst all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

MC145406/D

◊ CODELINE TO BE PLACED HERE

Literature Distribution Centers:USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036.EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England.JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan.ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.

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