A Self-Rectifying $\hbox{AlO}_{y}$ Bipolar RRAM With Sub-50-$\mu\hbox{A}$ Set/Reset Current for...

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1402 IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO. 10, OCTOBER 2012

A Self-Rectifying AlOy Bipolar RRAM WithSub-50-μA Set/Reset Current for

Cross-Bar ArchitectureX. A. Tran, W. Zhu, W. J. Liu, Y. C. Yeo, B. Y. Nguyen, and Hong Yu Yu

Abstract—In this letter, a bipolar resistive switching RAMbased on Ni/AlOy/n+-Si which exhibits high potential to realizetransistor-free operation for cross-bar array is successfullydemonstrated. The proposed device shows well-behaved bipo-lar memory performance with self-rectifying behavior in low-resistance state (> 700 at 0.2 V), a high on/off resistance ratio(> 103), a good retention characteristic (> 104 s at 100 ◦C), anda wide readout margin for cross-bar architecture (number of wordline N > 25 for worst case condition).

Index Terms—Bipolar, resistive random access memory(RRAM), resistive switching (RS), self-rectifying.

I. INTRODUCTION

R ESISTIVE random access memory (RRAM) has emergedas one of the most promising nonvolatile memory can-

didates for sub-20-nm technology node due to its low-poweroperation, simple structure, and high-speed capability [1], [2].Recently, the cross-bar architecture based on RRAM device hasattracted considerable attention for achieving high integrationdensity.

Owing to crosstalk interference during the operation of cross-bar arrays, a selector (1S), implemented either by 1-D (diode)or by a transistor, is required in each cell, wherein 1S–1R(RRAM) cross-bar architecture has been proposed for high-density 3-D integration [3], [4]. However, 1S-1R structure notonly increases the complexity of fabrication but also leads tohigher operation voltage and hence degradation of the memorystability [5]. Recently, the quest of self-rectifying resistiveswitching (RS) memory has been actively pursued for bothbipolar and unipolar types. Owing to the rectification in low-resistance state (LRS), the crosstalk phenomenon can be allevi-ated without serially connecting the selector. The memory cellcan significantly reduce the complexity of fabrication, reducethe reading voltage, and improve misreading in matrix crossbarmemory without extra selector. Thus far, almost self-rectifying

Manuscript received July 7, 2012; accepted July 25, 2012. Date of publica-tion September 6, 2012; date of current version September 21, 2012. This workwas supported in part by A∗STAR under Grant 092 151 0086. The review ofthis letter was arranged by Editor M. Jurczak.

X. A. Tran, W. Zhu, and W. J. Liu are with the School of Electrical andElectronic Engineering, Nanyang Technological University, Singapore 639798.

Y. C. Yeo is with the Department of Electrical and Computer Engineering,National University of Singapore, Singapore 117576.

B. Y. Nguyen is with Soitec, 38926 Crolles, France.H. Y. Yu is with the South University of Science and Technology of China,

Shenzhen 518055, China (e-mail: yu.hy@sustc.edu.cn).Color versions of one or more of the figures in this letter are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/LED.2012.2210855

RRAM devices are demonstrated with unipolar RS charac-teristic. However, the performance of bipolar RRAM (e.g.,power, reliability, etc.) is generally demonstrated with betterperformance than unipolar one partially due to their inherentdifferent switching mechanisms [6]. Owing to superior RScharacteristics, it is the first time that a self-rectifying bipolarRRAM cell is proposed to realize selector-free operation for3-D cross-bar integration.

In this letter, we report a self-rectifying bipolar-basedNi/AlOy/n+-Si RRAM structure with 50-μA reset/set cur-rent. The device exhibits well-behaved bipolar RS with self-rectifying characteristic in LRS. The performance of thisRRAM cell, switching mechanism, and possible passive cross-bar structure are investigated.

II. EXPERIMENT DETAILS

After RCA cleaning, on the 4-in highly doped n+ Si (ND ∼1018 cm−3) substrate, AlOy film with a thickness of ∼4.5 nmwas deposited using atomic layer deposition at 250 ◦C withAl(CH3)3 and H2O precursors. Consequently, a 100-nm Nitop electrode was deposited by sputtering at room temperature,followed by device patterning to complete final devices withareas ranging from 25 × 25 μm2 to 500 × 500 μm2. Fig. 1(a)shows the cross-sectional TEM image of the fabricated sample.The current–voltage (I–V ) characteristics of RRAM cells aremeasured by Keithley 4200 semiconductor characterizationsystem under air condition.

III. RESULTS AND DISCUSSION

The coexistence of unipolar and bipolar RS characteristicsis achievable for Ni/AlOy/n+-Si RRAM device as shown inFig. 1(b) and (c), respectively. For unipolar RS, a positivevoltage sweep (0–3.3 V) triggers the conduction abruptly, andthe resistance switches from high-resistance state (HRS) toLRS. Afterward, another voltage sweep (0–1.8 V) causes theabrupt decrease of current, and the resistance switches back toHRS [Fig. 1(b)]. The bipolar RS mode is enabled by applyingnegative dc voltage sweep (0 to −4.5 V) for the set process asshown in Fig. 1(c). The current compliance of 10 μA is appliedin the set process to protect RRAM devices from permanentbreakdown for both two modes. To activate RS, RRAM cell isinitiated by a negative forming voltage of ∼−5 V for bipolarRS mode and a positive forming voltage of ∼5 V for unipolarRS mode. It is worth noting that Ireset under bipolar RS modeis as low as 1–50 μA, in contrast with Ireset under unipolarRS mode, in the range of 1–10 mA. The presence of low Ireset

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TRAN et al.: ALOy BIPOLAR RRAM WITH SET/RESET CURRENT FOR CROSS-BAR ARCHITECTURE 1403

Fig. 1. (a) Cross-sectional TEM image of Ni/AlOy/n+-Si, (b) unipolarRS behavior of Ni/AlOy/n+-Si device, and (c) bipolar RS behavior ofNi/AlOy/n+-Si device.

Fig. 2. (a) I–V curves of the LRS in linear scale of Ni/AlOy/n+-Si device attemperatures ranging from room temperature to 120 ◦C. (b) Reverse current inLRS of Ni/AlOy/n+-Si device characterized by the Schottky emission model.(c) Temperature-dependent current with Schottky conduction model fitting inLRS of Ni/AlOy/n+-Si device at 0.4 V.

and Vreset observed in bipolar RS mode is preferred for low-power application. In addition, Fig. 1(b) and (c) also revealsthat the device exhibits a pronounced rectifying effect in theLRS. After the RRAM cell is set to the LRS, the positive currentvalue of LRS is > 700 larger than the negative current value, fora given 0.2-V reading voltage. This phenomenon is found withexcellent reproducibility and stability.

The self-rectifying effect of Ni/AlOy/n+-Si in LRS is ob-served with good stability at high temperature as well, shownin Fig. 2(a). In order to understand the origin of the rectifying

Fig. 3. (a) Cumulative plots of Ireset for unipolar and bipolar RS modes.(b) Frequency dependence of ac conductance on LRS under unipolar andbipolar RS modes.

hysteric behavior, we fabricated a control sample Ni/AlOy/Pt(details not shown here), which illustrated quasi-symmetricalI–V curve. In addition, the fabricated control samples withdifferent top electrodes (TiN, Cu, and Al) show similar self-rectifying behavior as our proposed device. As a result, webelieve that the rectifying property mainly resulted from thecontact of AlOx and n+-Si. The reverse current can be fittedwell with the Schottky current transport model as shown inFig. 2(b) and (c), respectively. The effective Schottky barrierheight of n+-Si/AlOx at the given voltage (0.4 V) can be ex-tracted as ∼0.31 eV. During the memory programming, defectsor traps can be introduced inside the AlOy dielectrics, whoseenergy level might form the Schottky barrier height with aconduction band of n+-Si in LRS. Owing to the Schottky-like barrier in Si/AlOy interface which attributed to the offsetbetween Si Fermi level and energy level of defects in AlOy , thecurrent transport would be suppressed; therefore, self-rectifyingbehavior is observed. It is worth noting that the extractedSchottky barrier height does not change with device areas,which is able to scale for high-density application.

In order to understand the switching mechanism for bothunipolar and bipolar modes, we plotted the cumulative prob-ability plot of Ireset as shown in Fig. 3(a). There is a significantdrop of the reset currents by one to two orders of magnitudefor the bipolar RS mode compared to the unipolar RS mode.Two reset modes observed in Ni/AlOy/n+-Si are believed to beinduced by different switching mechanisms. For the unipolarRS mode, the RS behavior is related to NiOx involvement atthe interface as our previous reports [7]–[9]. The conductivefilaments’ formation is determined by reduction and oxidationreactions through the interfacial layer for unipolar set process.The unipolar reset process is possibly related to local Joule-heating-induced annihilation of Ni conducting filaments at theinterfacial layer, which require high reset current in the range offew milliamperes. For bipolar RS mode, the filament formationand annihilation are caused by electric-field-assisted migrationof oxygen ions/vacancies at interfacial layer between AlOy andn+-Si substrate [10]. Due to the reset process caused by dif-ferent switching mechanisms, the unipolar RS mode illustratesa sharp-transition reset which is different with a gradual resettransition in the bipolar RS. To further investigate lower Iresetin bipolar mode, ac measurement is carried out for LRS for bothunipolar and bipolar modes, shown in Fig. 3(b). LRS current isseen to obey the barrier-correlated hopping mechanism in thehigh-frequency region, while metallic conduction behavior isdominated in the low-frequency region [9].

1404 IEEE ELECTRON DEVICE LETTERS, VOL. 33, NO. 10, OCTOBER 2012

Fig. 4. (a) Cumulative probability plots of ILRS-Forward, ILRS-Reverse, andIHRS under bipolar RS mode. (b) Retention time projected from the lifetimeextracted from HRS at different temperature points.

Fig. 5. Comparison of calculated readout margins in N ×N cross-bar arrayintegrating RRAM cells with and without self-rectifying behavior.

To further study the RS performance of RRAM cell, re-sistance distribution and rectifying ratio distribution of de-vices (200 dc cycles measured for each device) are plotted inFig. 4(a). Good HRS/LRS distribution and the large ratio ofon/off up to three orders of magnitude are achieved. The distri-bution of rectifying ratio also can be retained in all devices. Re-tention time projected from the lifetime extracted from HRS atdifferent temperature points is shown in Fig. 4(b) [11]. The pro-jected retention time at room temperature is longer than 107 s.

From the I–V characteristic of the self-rectifying bipolardevice, the readout margins are investigated under the worstcase condition. The cross-bar memory array with N ×NRRAM cells is proposed in which Ni/AlOy/n+-Si RRAM cellis integrated between word line and bit line without connectinga selector device. To estimate the readout margins of cross-bar array, a worse case read scheme, so-called one bit-linepull-up scheme, is utilized [12]. We assumed the ideal in-terconnect, same current level of all RRAM devices, and novariations in cross-point arrays. Fig. 5 shows the simulatedresult of output signal swing as a function of array size for readoperation. At 10% of the readout margin, the self-rectifyingRRAM cell illustrates an increase in the number of wordscompared with the device without self-rectifying behavior. Thenonlinearity of I–V curve and self-rectifying characteristicssignificantly enhance the number of cells [13], [14]. The max-imum word line N > 25 is demonstrated which is satisfied tocrossbar-array blocks without using a selection device. Verticalgate-all-around Si nanowire MOSFET can be realized usingmulti-RRAM stacks. In this case, multiple layers of 25 arraysizes could be built for this device; hence, high-density crossbararray is achieved [15].

IV. CONCLUSION

In this letter, a highly reliable self-rectifying bipolar RSbased on Ni/AlOx/n+Si structure has been demonstrated suc-cessfully. The demonstrated RRAM possesses excellent self-rectifying behavior in LRS (> 700 at 0.2 V), good memoryperformance, high potential for high-density cross-point mem-ory devices (number of word line N > 25 for worst casecondition), and low-fabrication-cost memory application.

REFERENCES

[1] D. Lee, D. Seong, H. Choi, I. Jo, R. Dong, W. Xiang, S. Oh, M. Pyun,S. Seo, S. Heo, M. Jo, D. Hwang, H. K. Park, M. Chang, M. Hasan, andH. Hwang, “Excellent uniformity and reproducible resistance switchingcharacteristics of doped binary metal oxides for non-volatile resistancememory applications,” in Proc. IEDM, 2006, pp. 796–799.

[2] B. Gao, H. W. Zhang, S. Yu, B. Sun, L. F. Liu, X. Y. Liu, Y. Wang,R. Q. Han, J. F. Kang, B. Yu, and Y. Y. Wang, “Oxide-based RRAM:Uniformity improvement using a new material-oriented methodology,” inProc. VLSI Symp. Technol., 2009, pp. 30–31.

[3] M.-J. Lee, Y. Park, D.-S. Suh, E.-H. Lee, S. Seo, D.-C. Kim, R. Jung,B.-S. Kang, S.-E. Ahn, C. B. Lee, D. H. Seo, Y.-K. Cha, I.-K. Yoo,J.-S. Kim, and B. H. Park, “Two series oxide resistors applicable to highspeed and high density nonvolatile memory,” Adv. Mater., vol. 19, no. 22,pp. 3919–3923, Nov. 2007.

[4] B. Cho, T.-W. Kim, S. Song, Y. Ji, M. Jo, H. Wang, G.-Y. Jung, andT. Lee, “Rewritable switching of one diode-one resistor nonvolatile or-ganic memory devices,” Adv. Mater., vol. 22, no. 11, pp. 1228–1232,Mar. 2010.

[5] R. Rosezin, E. Linn, L. Nielen, C. Kugeler, R. Bruchhaus, and R. Waser,“Integrated complementary resistive switches for passive high-densitynanocrossbar arrays,” IEEE Electron Device Lett., vol. 32, no. 2, pp. 191–193, Feb. 2011.

[6] N. Raghavan, K. L. Pey, X. Li, W. H. Liu, X. Wu, M. Bosman, andT. Kauerauf, “Very low reset current achieved in oxygen vacancy con-trolled regime,” IEEE Electron Device Lett., vol. 32, no. 6, pp. 716–718,Jun. 2011.

[7] X. A. Tran, H. Y. Yu, Y. C. Yeo, L. Wu, W. L. Liu, Z. R. Wang, Z. Fang,K. L. Pey, X. W. Sun, A. Y. Du, B. Y. Nguyen, and M. F. Li, “A high yieldHfOx based unipolar resistive RAM employing Ni electrode compatiblewith Si-diode selector for cross-bar integration,” IEEE Electron DeviceLett., vol. 32, no. 3, pp. 396–398, Mar. 2011.

[8] X. P. Wang, Z. X. Chen, X. Li, A. R. Kamath, L. J. Tang, D. M. Y. Lai,P. C. Lim, D. T. H. Li, N. Singh, P. G. Q. Lo, and D.-L. Kwong, “HfOx-based RRAM cells with fully CMOS compatible technology,” in Proc.ICSIC, 2012, vol. 32, pp. 1–6.

[9] X. A. Tran, B. Gao, J. F. Kang, L. Wu, Z. R. Wang, Z. Fang, K. L. Pey,A. Y. Du, B. Y. Nguyen, M. F. Li, and H. Y. Yu, “High performanceunipolar AlOy/HfOx/Ni based RRAM compatible with Si diodes for3-D application,” in Proc. VLSI Symp. Technol., 2011, pp. 44–45.

[10] L. Goux, Y.-Y. Chen, L. Pantisano, X.-P. Wang, G. Groeseneken,M. Jurczak, and D. J. Wouters, “On the gradual unipolar and bipolarresistive switching of TiN/HfO2Pt memory systems,” Electrochem. Solid-State Lett., vol. 13, no. 6, pp. G54–G56, Apr. 2010.

[11] B. Gao, J. F. Kang, H. W. Zhang, B. Sun, B. Chen, L. F. Liu, X. Y. Liu,R. Q. Han, Y. Y. Wang, B. Yu, Z. Fang, H. Y. Yu, and D.-L. Kwong,“Oxide-based RRAM: Physical based retention projection,” in Proc. ESS-DERC, 2010, pp. 392–395.

[12] A. Flocke and T. G. Noll, “Fundamental analysis of resistive nano-crossbars for the use in hybrid nano/CMOS-memory,” in Proc. 33rdESSCIRC, 2007, pp. 328–331.

[13] J. Liang and H.-S. P. Wong, “Cross-point memory array withoutcell selectors-device characteristics and data storage pattern dependen-cies,” IEEE Trans. Electron Devices, vol. 57, no. 10, pp. 2531–2538,Oct. 2010.

[14] S. Yu, J. Liang, Y. Wu, and H.-S. Wong, “Read/write schemes analysisfor novel complementary resistive switches in passive crossbar mem-ory arrays,” Nanotechnology, vol. 21, no. 46, pp. 465 202-1–465 202-5,Nov. 2010.

[15] L. Xiang et al., “RRAM cell with vertical GAA nanowire transistor realiz-ing 4F 2 footprint and ultra-low current switching,” IEEE Electron DeviceLett., submitted for publication.