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Page 1: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

1

EXPERIMENT-1. TRANSISTOR CE AMPLIFIER

AIM: 1. To Measure the voltage gain of a CE amplifier

2. To draw the frequency response curve of the CE amplifier

APPARATUS:

Transistor BC547

Resistors 33KΩ, 4.7KΩ, 3.3KΩ, 2.2KΩ, 1.5KΩ, 1KΩ, 330Ω,

Capacitors [100µF, 10µF -2No,]

Regulated power Supply (0-30V, 1A)

Function Generator

CRO, Bread Board, and Connecting Wires

THEORY:

The CE amplifier provides high gain & wide frequency response. The emitter lead is

common to both input & output circuits and is grounded. The emitter-base circuit is

forward biased. The collector current is controlled by the base current rather than

emitter current. The input signal is applied to base terminal of the transistor and

amplifier output is taken across collector terminal. A very small change in base current

produces a much larger change in collector current. When positive half-cycle is fed to

the input circuit, it opposes forward bias of the circuit which causes the collector

current to decrease, which in turn causes to the voltage to become more negative.

Thus when input cycle varies through a negative half-cycle, increases the forward bias

of the circuit, which causes the collector current to increases thus the output signal is

common emitter amplifier is in out of phase with the input signal.

Points to Remember:

1. It is the only configuration having both voltage and current gain.

2. There is 1800 phase difference between input & output.

3. The roll off is approximately 20db per decade.

4. Prove that the Gain Bandwidth product is constant.

Page 2: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

2

Design Points:

1. Half the supply voltage across the transistor.

2. R3 should be reasonably low to have better frequency response.

3. 1/10 Vcc across the emitter resistance.

4. The base voltage is emitter voltage + 0.7V.

5. 10 times the base current is to be assumed flowing through R5 & R6.

6. S=10

CIRCUIT DIAGRAM:

Page 3: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

3

Design: A. Transistor has the following h-parameters.

hfe=100; hie=1k; hoe=17μ mhos; hre=0.35x10-3.

Vcc= 15V, IC=1mA, S=10.

AVmid : RC = 2.5K

Assume VCEQ = Vcc /2, VE= VCC /10 , RE= VE/IC ,

VRC = Vcc - ( VCEQ+ VE). RC = VRC /IC,

VB = VE+VBE = VCC (R2/(R1+R2)), RB= R1R2/R1+R2

From the above equations calculate the values of R1 and R2 which are the base

biasing resistors.

Calculation of SI & SII

,

PROCEDURE:

1. Connect the circuit as shown in circuit diagram

2. Apply the input of 1V peak-to-peak and 1 KHz frequency using Function Generator

3. Measure the Output Voltage Vo (p-p)

A.) for various load resistors like 1K,5 K

(0r)

B.) Till you get unclipped output sine wave

4. Tabulate the readings in the tabular form.

5. The voltage gain can be calculated by using the expression

A.) VV

Ai

V

0 (and)

B.) Theoretically hRh

Aie

cfe

f

Page 4: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

4

6. For plotting the frequency response the input voltage is kept Constant at 20mV

peak- to-peak and the frequency is varied from 100Hz to 1MHz Using function

generator.

7. Note down the value of output voltage for each frequency with and without CE.

8. All the readings are tabulated and voltage gain in dB is calculated by Using The

Expression

9. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log

graph.

10. The band width of the amplifier is calculated from the graph using the expression,

Bandwidth, BW= f2-f1, Where f1 - lower cut-off frequency of CE amplifier

f2 - upper cut-off frequency of CE amplifier

11. Calculate the gain bandwidth product of the amplifier using the expression

Gain Bandwidth product = 3-dB Midband gain X Bandwidth

FREQUENCY RESPONSE (with gain expressed in db):

Page 5: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

5

OBSERVATIONS: With an Input voltage, Vi = 1v

LOAD

RESISTANCE

(KΩ)

OUTPUT

VOLTAGE

(V0)

Gain

Gain in db

With Ce With out Ce With Ce With out CE

FREQUENCY RESPONSE:

Input voltage Vi = 1v

FREQUENCY(Hz)

OUTPUT

VOLTAGE (V0)

GAIN in dB

Av=20 log10 (V0/Vi)

With CE With out CE With CE With out CE

Page 6: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

6

RESULT: The voltage gain and frequency response of the CE amplifier are

obtained. Also gain bandwidth product of the amplifier is calculated.

VIVA QUESTIONS:

1. What is phase difference between input and output waveforms of CE amplifier?

2. What type of biasing is used in the given circuit?

3. If the given transistor is replaced by a p-n-p, can we get output or not?

4. What is effect of emitter-bypass capacitor on frequency response?

5. What is the effect of coupling capacitor?

6. What is region of the transistor so that it is operated as an amplifier?

7. How does transistor acts as an amplifier?

8. Draw the h-parameter model of CE amplifier?

9. On what factor the frequency response of an amplifier depends?

INFERENCE:

Output verified by Signature of faculty with date

Page 7: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

7

EXPERIMENT:2 A.

TWO STAGE RC COUPLED AMPLIFIERWITH VOLTAGE SERIES FEEDBACK

AIM: To calculate voltage gain of two stage cascaded amplifier with and without

voltage series feedback also to observe frequency response.

APPARATUS:

i. Transistors - BC 547- 2 Nos,

ii. Resistors - [33k-2Nos, 4.7K,3.3K-2Nos,1k-2Nos,

330 - 2Nos,100-1Ns,]

iii. Capacitors - [10uF- 3Nos, 100uF- 2Nos]

iv. Switch - SPDT -1Nos

v. Bread Board,

vi. Regulated power supply

vii. Cathode ray oscilloscope,

CIRCUIT DIAGRAM:

THEORY:

Page 8: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

8

This is the most popular type of coupling as it pro vides maximum bandwidth

with less complexity.

A coupling capacitor is used to connect output of first stage to input of second

stage. Resistances R1, R2, RE form biasing and stabilization network. Emitter

bypass capacitor prevents a. c. signal to pass through RE. Cascade stages amplify

signal and overall gain i increases the overall gain of two stages is

A=A1*A2, Where A1 = voltage gain of first stage

A2 = voltage gain of second stage.

When ac signal is applied to the base of the transistor, its amplified output appears at

the collector of Q1. It is coupled to the second stage for further amplification.

Frequency response curve is obtained by plotting a graph between frequency and gain

in db .The gain is constant in mid frequency range and gain decreases on both sides

of the mid frequency range by 20db/decade. The gain decreases in the low frequency

range due to the input time constant feature RC and at high frequencies due to the

internal junction capacitances and effective output resistance.

PROCEDURE:

1. Connect the circuit diagram as per the circuit with switch initially at position 1

2. Apply input voltage from the function generator to the circuit.

3. Observe the output waveform on CRO.

4. Measure the voltage at

a. Output of first stage, b. Output of second stage.

5. From the readings calculate voltage gain of first stage, second stage and overall

gain of two stages. Disconnect second stage and then measure output voltage gain

of first stage.

6. Compare it with voltage gain obtained when second stage was connected.

7. Note down various values of gain for different frequencies.

8. A graph is plotted between frequency and voltage gain.

9. Repeat steps 2 to 8 by connecting the switch to node position 2.

Page 9: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

9

OBSERVATIONS:

APPLIED

FREQUENCY

In Hz

O/P VOLTAGE

(Vo)

VOLTAGE GAIN in db

= )20( 0

10log

VV

i

With Ce Without Ce With Ce Without Ce

100

300

700

1K

3K

7K

10K

30K

70K

100K

300K

700K

1M

30M

70M

100M

PRECAUTIONS:

Transistor terminals must be identifying properly.

Page 10: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

10

FREQUENCY RESPONSE (with gain expressed in db):

RESULT:

Calculate the voltage gain of two stages cascaded amplifier with and without voltage

series feedback, also observed the frequency response of that.

VIVA QUESTIONS:

1) Which type of coupling is preferred and why?

2) What is loading effect?

3) Why it is known as RC coupling?

4) What is the purpose of emitter bypass capacitor?

5) What is the necessity of cascading?

6) What is 3dB bandwidth?

7) Why RC coupling is preferred in audio range?

8) Explain various types of Capacitors?

9) What are advantages of FET-BJT cascading?

INFERENCE:

Output verified by Signature of faculty with date

Page 11: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

11

EXPERIMENT:2B. TWO STAGE JFET AND BJT RC COUPLED AMPLIFIER

AIM:

a) To determine the frequency response of a two stage BJT and JFET Cascaded RC

coupled amplifier, to measure upper and lower cutoff frequencies of a CS and CE

cascading amplifiers.

b) Also to determine the input and output impedances, Zi and Zo respectively

APPARATUS:

1. Transistors - [ 2N3819 or BFW21 - 1No, Bc547- 1no]

2. Resistors - [680K 1No.,10k 2No.,3.3k 2No.,1k 2nos, 820 1No. ]

3. Capacitors – [22 uF-2, 2.2uF -2, 1uF -2]

4. Oscilloscope(Scope/CRO)

5. Function Generator( FG) or Signal Generator

6. Digital millimeters (DMM)-

Circuit Diagram:

Page 12: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

12

THEORY:

Multistage amplifiers are made up of single transistor amplifiers connected in

cascade. The first stage usually provides a high input impedance to minimize

loading the source (transducer). The middle stage usually account for most of the

desired voltage gain. The final stage provides a low output impedance to prevent

loss of signal (gain), and to be able to handle the amount of current required by the

load. When analyzing multi stage amplifiers, the loading effect of the each stage

must be considered, since the input impedance of the next stage acts as the load

impedance for the previous stage.

Therefore, the ac analysis of a multi stage amplifier is usually done starting

with the final stage, The individual stages are usually coupled either with a

capacitor, or by direct coupling. Capacitive coupling is most often used when the

signals being amplified are ac signals. With capacitive coupling, the stages are

separated by a capacitor, which blocks the dc voltages between each stage. This dc

blocking prevents the bias point of each stage from being upset. Dc coupling

requires more attention to detail in the bias network, but allow for good low-

frequency response (usually down to dc).

The CS_CC cascade two –stage amplifier is a good multistage configuration

because the CS and CC amplifiers together provide some very desirable characters.

The CS amplifier makes up first stage and is capable of providing high voltage gain.

The input impedance of the CS is a function of RG1 and RG2 and is generally very

high. The output impedance of the CS is approximately equal to Rd, which is usually

in the kilo ohms range. The CE amplifier makes up the second stage.

In a cascade configuration, the overall voltage and current gains are given by:

AAA eSecondStagvfirststagevoverallV )()()(*

Page 13: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

13

PROCEDURE:

Construct the amplifier shown in figure. Measure the following Values

a) Q-point: Vce, Vbe, Ve ,Ib, andIc( BC547) , and Vds, Vgs, Vs, Id(2N7000)

b) Voltage gain of each stage

c) Voltage , current and power gains

d) Maximum undistorted peak-to-peak output voltage

e) Input and output resistance

f) Low and high cutoff frequencies( half power point)

The input impedance is given by IV

Rin

in

in

The output impedance is given by IVV

Rout

loadoc

out

)(

Voltage gain is given by v

VA

in

out

v

PRECAUTIONS:

Transistor terminals must be identifying properly.

RESULT: Determined the frequency response of a two stage BJT and JFET

Cascaded RC coupled amplifier, measured upper and lower cutoff frequencies of a

CS and CE cascading amplifiers. Also to determined the input and output

impedances, ZZ oi, respectively.

Page 14: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

14

VIVA QUESTIONS

1. If the given transistor is replaced by a p-n-p, can we get output or not?

2. What is effect of emitter-bypass capacitor on frequency response?

3. What is the effect of coupling capacitor?

4. What is region of the transistor so that, it is operated as an amplifier?

5. How does transistor acts as an amplifier?

6. Draw the h-parameter model of CE amplifier using FET?

7. On what factor the frequency response of an amplifier depends?

INFERENCE:

Output verified by Signature of faculty with date

Page 15: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

15

Experiment:3. Class A power amplifier

Aim :

To construct and verify the efficiency of class A power amplifier circuit.

Apparatus :

1.) Power transistor – SL100

2.) Resistor – [4.7K , 1.2K, 330, 330 (variable),100, 22 ,]

3.) Capacitors - [470f, 100f ,22f .]

4.) RPS

5.) CRO

6.) Signal generator

7.) Bread board

Circuit Diagram:

Theory :

Page 16: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

16

The power amplifier is said to be class A amplifier if the Q point and the

Input signal are selected such that the output signal is obtained for a full input cycle.

In directly coupled type, the load is directly connected in the collector circuit. The

transistor is a power transistor. The value of Rb is selected in such a way that the Q

point lies at the centre of the d.c load line.

Design procedure:

For example to design a class A power amplifier which delivers a 150mW power to a

100 load.

Given ffvmW CCCRVP elBE 47,10,100,300,7.,150

210

P0VV

RV

cc

l

cc 95.108

2

0954.11.475.52

VRIVV

V ccecq

cc VandCECE qq

V

RIVRIV EcqCEQlcqcc

mAI

I

cq

cq

8.43

095.1475.5*100954.10

mAI

Icq

B146.0

75010

25*300

10,25

1.0 RR

IV

Re

b

cq

cc

e

.

)( IIRVIRV cqbEbebbth

VV th90815.1

KRVV

R b

th

cc 303.41

Page 17: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

17

KR

VV

R b

cc

th

908.

)1(

12

,

100,6.72*8.3 RV lppV

WR

VP

l

pp

ac0722.0

100*88

6.722

,

47742.0*8.43*9.10 103

IVP cqccdc

%12.15100*% PP

dc

ac

Procedure:

Select different components and place them in the grid.

1. Apply the input ac signal voltage of 160mV (p-p) and simulate the circuit.

2. Observe the output wave form on CRO and measure the output voltage V0.

3. Now connect the ammeter at collector terminal of transistor.

4. Disconnect the ac signal from input and measure the collector current Ic in

ammeter.

5. calculate the efficiency by using practical calculations compare it with

theoretically calculated efficiency

Efficiency 100*%pP

dc

ac

8.) For 1 KHz input varies the input amplitude till we get unclipped output.

9.) Connect a decade resistance box and calculate the power for various values of RL

from 4 to 150

Page 18: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

18

Observations:

Theoretical calculations:

RL

RL

RL

VP

VVV

VII

IIVVP

VP

II

RV

I

cc

cao

cc

cc

ca

cc

cdin

c

cq

L

cc

cq

8

)(

)(

8

))((

2

2

2

2

).(

minmax

minmax

minmaxminmax

).(0

2

).(

% of efficiency = 100*

)2

(

)8

(

100*2

2

).(

).(0

RL

RL

V

V

PP

cc

cc

cdin

ca =

Practical calculations:

I c

P cdin ).(= IV cqcc

*

RL

VP ca 8

2

0

).(0

% Efficiency= 100*

).(

).(0

PP

cdin

ca =

Page 19: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

19

Result:

Constructed a class A power amplifier circuit and verified its efficiency

VIVA QUESTIONS:

1.) What is the efficiency of class A power amplifier when resistor is used as a load?

2.) Does Crossover distortion is there in class a amplifier?

3.) Where will you locate the quiescent point?

4.) Explain different types of distortions in amplifiers

5.) How do power amplifiers differ from ordinary amplifiers?

6.) Give different type of power amplifiers

7.) What is the purpose of heat sink?

8.) What is the optimum load for maximum power transfer?

9.) What is the reference of maximum power transfer theorem?

INFERENCE:

Output verified by Signature of faculty with date

Page 20: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

20

Page 21: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

21

EXPERIMENTS:4.

COMPLEMENTARY SYMMETRY POWER AMPLIFIER

Aim: To determine the efficiency of complementary Symmetry push pull power

amplifier and observe the crossover distortion.

Apparatus:

1. Components

a. Transistors - [ BC859A, BC849B]

b. Diode - IN4148-2

c. Resistors - [100-2, 8 1-2 ]

d. Capacitors - 470 f-2

2. Signal generator

3. Oscilloscope

4. Regulated power supply

Circuit Diagram :

Page 22: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

22

Theory:

The complementary symmetry push pull amplifier has two transistors, one is PNP

and other is NPN . Q1 and Q2 from two unbiased emitter follower. Q1 only conducts

when the input is positive and Q2 only conducts when the input is negative. The

conduction angle is therefore180. When the input is zero, neither conducts ie quiescent

power dissipation is zero. Peak efficiency of the class B output stage is 78.5%, much

higher than class A. Unlike class A , power dissipation Varies with output amplitude.

There are two output devices, so power dissipation is shared between them.

A small base-emitter voltage is needed to turn on a transistor and avoid cross –

over distortion

Q1 actually only conducts when .7.0 VV in

Q2 conducts when Q2 input ie VV in7.0 .

When 0.7> ,7.0V in nothing conducts and the output is zero. ie input-output

relationship is not at all linear. The distortion here is called cross-over distortion.

Design procedure:

Given RP L,

0 so that RPV LCC 8 0

V

VV

RR

BE

BE

CC )2

(

2

1

take RRRR and3241

IVP dcCCin

R

VP

l

out

pp

8

2

Where V pp is peak to peak output voltage

Observed from CRO

Efficiency is given by PP

in

out

,

%PP

in

out *100

When VKmW VRRRP bel3.,1,82,250

320

Page 23: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

23

,80.128 0

vRPV lCC

)(

)2

(

2

1

V

VV

RR

BE

BE

cc

, 34.20,34.201

2

1 RRR , KR 34.20

2 , 34.20

4R

Procedure:

1. Connect the circuit as shown in figure

2. Connect the signal generator on the input side

3. Set the signal generator input till unclipped output is obtained at 1KHz.

4. Observe the output voltage

5. Observe the collector current Ic.

6. Calculate the efficiency by finding PP andi 0

.

7. Observe the output waveform in the CRO.

Observations:

watmAv IVPIV dcccinDcDCpp234.,32.181

wattspp

R

VP

l

ac0184.

8

2

0 , Efficiency %78100*

)(

)(0

PP

dcin

ac

Precautions:

1. Connections should be made properly

2. Choose the transistor with same value.

3. Vcc should not exceed the designed value.

Result:

Efficiency of class B complementary symmetry power amplifier is found t o be

78.8%. Crossover distortion is also observed on output.

Page 24: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

24

VIVA QUESTIONS:

1.) What is the efficiency of class B complementary symmetry power amplifier?

2.) What do you mean by Crossover distortion?

3.) Explain different types of distortions in amplifiers?

4.) How can you avoid the distortion in class B power amplifier?

5.) What are the advantages of class B power amplifier?

6.) What is the conduction angle in class B power amplifier?

7.) How can you reduce the distortion by using the push pull configuration?

8.) Give different type of power amplifiers?

9.) What is the purpose of two diodes D1 and D2 in the circuit?

10.) What is the optimum RL for maximum power transfer?

11.) What types of harmonics are stimulated in class B push – pull

12.) Why emitter follower configuration is used?

13.) What is the necessity of complementary PNP , NPN transistors

14.) What is the difference between single and dual supply operation?

INFERENCE:

Output verified by Signature of faculty with date

Page 25: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

25

EXPERIMENT:5.

VOLTAGE-SERIES FEEDBACK AMPLIFIER

AIM : To Design and test the Voltage – Series Feedback amplifier and to

calculate the following parameters with and with out Feedback

1.) Mid Band Gain.

2.) Bandwidth and Cut-off Frequencies

3.) Input and Output impedance

APPARATUS :Transistor - BC 547(2)

sistors

Capacitor - 1uf, 33uF(3)

Power Supply - (0-30)V

CRO - (0-20)MHz

Function generator - (0-1)Mhz

Switch - SPDT

Circuit-Diagram:

Page 26: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

26

THEORY:

When any increase in the output signal results into the input in such a way

as to cause the decrease in the output signal, the amplifier is said to have negative

feedback.

The advantages of providing negative feedback are that the transfer gain of the

amplifier with feedback can be stabilized against variations in the hybrid parameters of

the transistor or the parameters of the other active devices used in the circuit. The

most advantage of the negative feedback is that by proper use of this, there is

significant improvement in the frequency response and in the linearity of the operation

of the amplifier. This disadvantage of the negative feedback is that the voltage gain is

decreased.

In Voltage-Series feedback, the input impedance of the amplifier is

decreased and the output impedance is increased. Noise and distortions are reduced

considerably.

Procedure:

1. Connect the circuit as per the circuit diagram with switch S1 connecting to node A.

2. Set ),(1 sayVV i using the signal generator.

3. Keeping the input voltage constant, vary the frequency.

4. From 10 Hz to 1 MHz in regular steps and note down the corresponding output

voltage.

5. plot the graph: Gain(db) Vs Frequency.

6. Find the input and output impedance:

INPUT IMPEDANCE, Z if

OUTPUT IMPEDANCE Z o

7. CALCULATE THE BANDWIDTH FROM THE GRAPH.

8. NOTE DOWN THE PHASE ANGLE, BANDWIDTH, INPUT AND OUTPUT IMPEDANCE.

Page 27: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

27

9. CONNECT CR ffand

22 TO CIRCUIT BY CHANGING SWITCHS1 TO NODE B AND

REPEAT THE PROCEDURE (2) TO (7).

)REQUENCY RESPONSE(FODELGRAPHM

THEORETICAL PRACTICAL

With out

feedback

With

feedback

With out

feedback

With

feedback

INPUT IMPEDANCE

OUTPUT IMPEDANCE

GAIN(MIDBAND)

BANDWIDTH

Page 28: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

28

OBSERVATIONS: with Vi =1V

FREQUENY WITH OUT FEEDBACK WITH FEED BACK

)(0

VoltsV GAIN

=VV

i

0

GAIN IN DB =

20 LOG( )VV

i

o

)(0

VoltsV GAIN=

VV

i

0 GAIN IN DB =

20 LOG( )VV

i

o

Page 29: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

29

PRECAUTIONS :

1. While taking the observations for the frequency response, the input voltage must be

maintained constant at 20mV.

2. The frequency should be slowly increased in steps.

3. The three terminals of the transistor should be carefully identified.

4. All the connections should be correct.

Result: Tested the voltage series feedback amplifier and found its input, output

impedance along with frequency response.

VIVA QUESTIONS

1. What is meant by Feedback?

2. What are the types of feedback amplifiers? Explain?

3. Draw the circuit for voltage series feedback?

4. What are the differences between positive and negative feedback?

5. What is the effect of negative feedback on gain of an amplifier?

6. Give the expression for voltage gain with negative feedback?

7. With what different names positive and negative feedback circuits are called?

8. Give the expression for input resistance of a voltage series feedback?

9. Give the expression for output resistance of a voltage series feedback?

INFERENCE:

Output verified by Signature of faculty with date

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Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

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Page 31: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

31

EXPERIMENT:6.

CURRENT-SERIES FEEDBACK AMPLIFIER

AIM: To measure the voltage gain of current - series feed back amplifier.

APPARATUS:

Transistor - BC 107

Resistors - [33kΩ, 4.7k Ω, 3.3kΩ, 2.2k Ω, 1.5kΩ, 1 k Ω.330Ω,]

Capacitors - [10µF - 2Nos, 100µF ]

Breadboard

Regulated Power Supply (0-30V, 1A)

Function Generator

CRO (30 MHz, dual trace)

CIRCUIT DIAGRAM:

Page 32: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

32

THEORY:

When any increase in the output signal results into the input in such a way as to cause

the decrease in the output signal, the amplifier is said to have negative feedback.

The advantages of providing negative feedback are that the transfer gain of the

amplifier with feedback can be stabilized against variations in the hybrid parameters of

the transistor or the parameters of the other active devices used in the circuit. The

most advantage of the negative feedback is that by proper use of this, there is

significant improvement in the frequency response and in the linearity of the operation

of the amplifier. This disadvantage of the negative feedback is that the voltage gain is

decreased.

In Current-Series Feedback, the input impedance and the output

impedance are increased. Noise and distortions are reduced considerably.

PROCEDURE:

1. Connections are made as per circuit diagram.

2. Keep the switch S1 in the circuit open circuited.

3. Keep the input voltage constant at 20mV peak-peak and 1 kHz frequency. For

different values of load resistance, note down the output voltage and calculate the

gain by using the expression

Av = 20log (V0 / Vi ) dB

4. Close the Switch S1 and repeat STEP 3. And observe the effect of feedback on the

gain of the amplifier.

5. For plotting the frequency the input voltage is kept constant at 20mV peak-peak and

the frequency is varied from 100Hz to 1MHz.

6. Note down the value of output voltage for each frequency. All the readings are

tabulated and the voltage gain in dB is calculated by using expression Av = 20log

(V0 / Vi ) dB

7. A graph is drawn by taking frequency on X-axis and gain on Y-axis on semi log

graph sheet

Page 33: AEC Lab Manual

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8. The Bandwidth of the amplifier is calculated from the graph using the expression

Bandwidth B.W = f2 – f1.

Where f1 is lower cut off frequency of CE amplifier

f 2 is upper cut off frequency of CE amplifier

9. The gain-bandwidth product of the amplifier is calculated by using the expression

Gain-Bandwidth Product = 3-dB midband gain X Bandwidth.

MODEL WAVEFORM:

Page 34: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

34

OBSERVATIONS: Voltage Gain: Vi = 20 mV

S.N Frequency With out feedback With feedback

Voltage (V0) Gain(db) Voltage(V0) Gain(db)

Page 35: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

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Frequency response:

PRECAUTIONS:

1. While taking the observations for the frequency response, the input voltage must be

maintained constant at 20mV.

2. The frequency should be slowly increased in steps.

3. The three terminals of the transistor should be carefully identified.

4. All the connections should be correct.

RESULT: The effect of negative feedback (Current-Series Feedback) on the amplifier

is observed. The voltage gain and frequency response of the amplifier are obtained.

Also gain-bandwidth product of the amplifier is calculated.

Page 36: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

36

VIVA QUESTIONS

1. State the reason for the usage of negative feedback in an amplifier?

2. what are the fundamental assumptions that are made in studying feedback

amplifiers?

3. What are the advantages of providing negative feedback amplifier?

4. What is the other name for current series feedback amplifier?

5. What is the effect of negative feedback on the Bandwidth of an amplifier

6. What are the ideal characteristics of a voltage amplifier?

7. Draw the circuit for the current series feedback?

8. What is the effect of Current-Series Feedback amplifier on the input impedance of

the amplifier?

9. Give the expression for input resistance of a current series feedback?

10. Give the expression for output resistance of a current series feedback?

INFERENCE:

Output verified by Signature of faculty with date

Page 37: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

37

EXPERIMENT: 7. SINGLE TUNED AMPLIFIER

Aim:

To analyze the variation of magnitude of gain of a single tuned amplifier

as a function of frequency.

APPARATUS:

1. Transistor – BC547.

2. Resistors – [56KΩ, 100KΩ ,33KΩ,560Ω ]

3. Capacitor – 0.1 µF

4. Inductor - 100mH

5. Regulated Power Supply

6. Function generator

7. CRO

8. Bread board

Circuit diagram:

Page 38: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

38

Theory:

These amplifiers amplify signals with narrow frequency band centered about a

Frequency )(0

verradioreceiW The ordinary common emitter amplifier is converted in

to a tuned band pass amplifier by including a parallel-tuned

Circuit. Assuming 0, 1 rRR bbcl the gain, centre frequency and bandwidth of

the amplifier are given by the following expressions

The current gain of amplifier is then

)(1)(1( 0

0

0

RCj

R

C

RRCj

R ggA

mm

i

,

Where Lc

12

0

Q of the tuned input circuit at resonant frequency 0 to be

RCRL

Qi 0

0

For high quality (Q) approximation

Gain is maximum at 0

and is RgA mi .

The 3db Bandwidth can be given by Bandwidth=RCQ

fflh

2

1

21

0

)(1

0

o

i

m

i

Q

gA

j

R

Page 39: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

39

Procedure:

1. Connections are made as per the circuit diagram.

2. Set Vi = 50mV using the signal generator

3. Keeping the input voltage constant, vary the frequency from 10Hz to 1MHz in

regular steps and note down the corresponding output voltage.

4. Plot the graph of gain in dB vs Frequency (Hz).

5. Calculate the bandwidth from the graph.

Observations:

Theoritical : When L = 100mH, C = 0.1 μf

KHzLC

f 6.1

))*1.**100(2(

1

2

1

101063

PRACTICAL CALCULATIONS:

Td = F = T d

1 =

Model IN PUT WAVE FORM:

Page 40: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

40

MODEL OUT PUT WAVE FORM:

Result: Observed the variation in magnitude of gain of single tuned amplifiers as a

function of frequency.

VIVA QUESTIONS:

1. What is the purpose of tuned amplifier?

2. Why should we prefer parallel resonant circuit in tuned amplifier.

3. What is Quality factor? If it is less , what happens?

4. What is meant by Stagger tuning?

5. What type of tuning we need to increase gain and bandwidth.?

6. What are the limitations of single tuned amplifier?

7. What is the conduction angle of an tuned amplifier if it is operated in class B

mode?

8. What are the applications of tuned amplifier?

INFERENCE:

Output verified by Signature of faculty with date

Page 41: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

41

EXPERIMENT: 8A. RC PHASE SHIFT OSCILLATOR

AIM: To calculate the frequency of the RC phase shift oscillator & to measure the phase

angles at different RC sections.

APPARATUS:

1. Transistor - BC107

2. Resistors: -[100KΩ , 10KΩ -3No, 8/10KΩ ,1.2KΩ ]

3. Capacitors - [10µF–2Nos , 1µf , 0.001µf – 3 Nos]

4. Regulated power Supply

5. CRO

CIRCUIT DIAGRAM:

Page 42: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

42

THEORY:

RC-Phase shift Oscillator has a CE amplifier followed by three sections of

RC phase shift feed back Networks the out put of the last stage is connected to the

input of the amplifier. The values of R and C are chosen such that the phase shift of

each RC section is 60º.Thus The RC ladder network produces a total phase shift of

180º between its input and output voltage for the given frequencies. Since CE

Amplifier produces 180 º phases shift the total phase shift from the base of the

transistor around the circuit and back to the base will be exactly 360º or 0º. This

satisfies the Barkhausen condition for sustaining oscillations and total loop gain of this

circuit is greater than or equal to 1, this condition used to generate the sinusoidal

oscillations.

Theoretical Analysis:

))6((

1

0)1

2(

0)1

2(

)(

1(

223

32

321

21

)51(

jR

solving

CjRR

RCJ

RR

RCj

R

EI

II

III

EII

i

i

Where CR

1

E0

))6()51(( 222

j

Ei where RIE 30

Hence ]6()51[(

122

0

jEE

i

For determining the frequency of oscillators, the phase shift (ie) the imaginary part

must be equal to ZERO

Page 43: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

43

Hence

6)(

10)6(

2

C pr

The frequency of oscillations of RC-Phase Shift Oscillator is,

6*2

1

RCf

By substituting 6 in the above equation, we can get

=-29

1

29

1 180

0

Transistor with gain <29 cannot be made to oscillate in circuit and

frequency of oscillation may be varied by changing any impedance element in

the phase shifting network.

PROCEDURE:

1. Make the connection as per the circuit diagram as shown above.

2. Observe the output signal and note down the output amplitude and time period

(Td).

3. Calculate the frequency of oscillations theoretically and verify it practically (f=1/Td).

4. Calculate the phase shift at each RC section by measuring the time shifts (Tp)

between the final waveform and the waveform at that section by using the below

formula.

Page 44: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

44

OBSERVATIONS:

THEORITICAL CALCULATIONS:

R = 10KΩ, C = 0.001 μf

6*2

1

RCf

PRACTICAL CALCULATIONS:

Td =

f = T d

1

360*1

1

TT

d

p

,

360*2

2

TT

d

p

, 360*3

3

TT

d

p

MODEL WAVE FORMS:

OUT PUT WAVE FORM :

MODEL OUT PUT WAVE FORM : θ = 600

Page 45: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

45

OUT PUT WAVE FORM : θ = 1200

OUT PUT WAVE FORM : θ = 180

RESULT: The frequency of RC phase shift oscillator is calculated and the phase shift

at different RC sections is noted.

Page 46: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

46

VIVA QUESTIONS:

1. Does an amplifier has given positive or negative feedback to act as an amplifier?

2. what is the other type of oscillators?

3. What is the difference between damped oscillations undamped oscillations?

4. How the Barkhausen criterion is satisfied for RC phase shift oscillator

5. Give the expression for frequency of oscillations?

6. What is the total phase shift produce by the RC ladder network?

7. give the expression of gain of RC phase shift oscillator?

8. What are the applications of RC oscillators?

9. How many resistors and capacitors are used in RC phase shift network

10. why RC oscillators will not work at higher frequencies?

11. can we use more than three rc phase shift networks? If so what modifications are

required?

12. can we have asymmetric RC phase shift network? i.e different RC values?

INFERENCE:

Output verified by Signature of faculty with date

Page 47: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

47

EXPERIMENT:8B.

RC PHASE SHIFT OSCILLATOR USING FET

AIM: To calculate the frequency of the RC phase shift oscillator using FET & to measure

the phase angles of different RC sections.

APPARATUS:

1. FET

2. Resistors:

3. Capacitors:

4. Regulated power Supply

5. CRO

CIRCUIT DIAGRAM:

Page 48: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

48

Theory:

The circuit is drawn to show clearly the amplifier and feedback network. The circuit

consists of a common source FET amplifier followed by a three section R-C phase shift

network. The amplifier stage is self-biased with a capacitor bypassed source resistor Rs

and a drain bias resistance RD. The output of the last section is supplied back to the

gate. If the loading of the phase-shift network on the amplifier can be assumed to be

negligible, a phase shift of 180° between the amplified output voltage Vout and the input

voltage Vin at the gate is produced by the amplifier itself. The three-section R-C phase

shift network produces an additional phase shift, which is a function of frequency and

equals 180° at some frequency of operation. At this frequency the total phase shift from

the gate around the circuit and back to gate will be exactly zero. This particular

frequency will be the one at which the circuit will oscillate provided that the magnitude of

the amplification is sufficiently large. In a FET phase-shift oscillator voltage series

feedback [that is, feedback voltage proportional to the output voltage Vout and supplied

in series with the input signal at the gate is used.

The frequency of the oscillator output depends upon the values of capacitors C and re-

sistors R used in the phase shift network. Using basic RC circuit analysis technique, it

can be shown that the network phase shift is 180° when

Xc = √6 R or 1 / 2∏fc = √6 R or f = 1 / / 2∏ R c √6

The frequency can be adjusted over a wide range if variable capacitors are used. As

well as phase shifting; the R-C network attenuates the amplifier output. Network

analysis shows that when the necessary phase shift of 180° is obtained, this network

attenuates the output voltage by a factor of 1/29. This means that the amplifier must

have a voltage gain of 29 or more. When the amplifier voltage gain is 29 and feedback

factor of R-C network, β= 1/29 then the loop gain is β A = 1, the amplifier phase shift of

– 180° combined with the network phase shift of + 180° gives a loop phase shift of zero.

Both of these conditions are necessary to satisfy the Barkhausen criteria. If the

amplifier gain is much greater than 29, the oscillator output waveform is likely to be

Page 49: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

49

distorted. When the gain is slightly greater than 29, the output is usually a reasonably

pure sinusoidal.

The advantages and disadvantages of phase shift oscillators are given below :

PROCEDURE:

1.).Make the connection as per the circuit diagram as shown above.

2.) Observe the output signal and note down the output amplitude and time period

(Td).

3.) Calculate the frequency of oscillations theoretically and verify it practically (f=1/Td).

4.) Calculate the phase shift at each RC section by measuring the time shifts (Tp)

between the final waveform and the waveform at that section.

MODEL WAVE FORMS:

OUT PUT WAVE FORM :

PRACTICAL CALCULATIONS:

Td = f = T d

1

360*1

1

TT

d

p

360*2

2

TT

d

p

360*3

3

TT

d

p

RESULT: The frequency of RC phase shift oscillator using FET, is calculated and the

phase shift at different RC sections is noted.

Page 50: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

50

VIVA QUESTIONS:

1. Does an amplifier in negative feedback, act as an amplifier?

2. What is the principle of other type of oscillators?

3. What is the difference between damped oscillations undamped oscillations?

4. How the Barkhausen criterion is satisfied for RC phase shift oscillator

5. Give the expression for frequency of oscillations?

6. What is the total phase shift produce by the RC ladder network?

7. Give the expression of gain of RC phase shift oscillator?

INFERENCE:

Output verified by Signature of faculty with date

Page 51: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

51

Experiment: 9-WEIN BRIDGE OSCILLATOR

AIM: To study and calculate frequency of Wein Bridge Oscillator.

APPARATUS:

Transistor BC 107 -2 No

Resistors [33 K ,10K-4No,6.8 K, 2.2 K - 2 No,1 K-3 No]

Capacitors [100 F ,10 F 2 No, 0.01 F 2 No]

RPS (0 – 30 V)

Potentiometer

Bread Boar CRO Connecting wires

CIRCUIT DIAGRAM:

Page 52: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

52

THEORY:

The Wein bridge oscillator is a standard circuit for generating low frequencies in the

range of 10 Hz to about 1MHz.

The main characteristics of Wein bridge is , it produces “ ZERO” phase shift at one

frequency f0 .At all other Frequencies it produces phase shift. Hence for a given

resonant frequency f0, two stage amplifier is required to Produce a ZERO 0r 360

phase shift. The overall gain should be 3 for a symmetric Wein bridge RC.

Consists of a lead-lag network ( ) and voltage divider( ). The lead lag

network provides a positive feedback to the input of first stage and voltage divider

provides a negative feedback to emitter of .

If bridge is balanced

Where and are reactance of capacitor

By equating real and imaginary parts on both side =

If = and = ratio of to > 2 will provide a sufficient gain for

the circuit to oscillate at the desired frequency.

This oscillator is used in commercial audio signal generator

To find gain

= = C

From the feedback circuit

Page 53: AEC Lab Manual

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Department of Electrical & Electronics Engineering A.Y. 2011-2012

53

=

We know that A =1 , A= =

Substituting S=J when when = in the above equation

We get A=3. Hence gain of Wein bridge oscillator using BJT equals to 3 for oscillations.

Design :

.The gain of a BJT amplifier is

.RR

e

cA

1 st stage = 11

1

K

K

2 nd stage = 5220

1

K

Gain of 3 is adjusted with negative feedback by adjusting 1K pot.

PROCEDURE:

1. Connections are made as per the circuit diagram

2. Feed the output of the oscillator to a C.R.O by making adjustments in the

Potentiometer connected in the +ve feedback loop, try to obtain a stable sine Wave.

3. Measure the time period of the waveform obtained on CRO. & calculate the

Frequency of oscillations.

4. Repeat the procedure for different values of capacitance in the Wein bridge.

OBSERVATION:

Given R=10kΩ, C=0.01μF

)2(

1

RCf

t

, Tf

p

1

, A mplitude,V0 =

Page 54: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

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RESULT:

The frequency of the Wein bridge oscillator is calculated and is verified.

VIVA QUESTIONS:

1. Give the expression for frequency of oscillations in Wein bridge oscillators?

2. Give the expression for gain of Wein bridge oscillator?

3. What is the total phase shift provided by the oscillator?

4. Why do we use lead-lag network in Wein bridge oscillator?

5. which type of feedback is used in Wein bridge oscillator

6. What are the conditions for wien bridge oscillator to generate oscillations?

7. What is the difference between damped oscillations undamped Oscillations?

8. Why the output oscillations amplitude varies with frequency? What are the

methods adopted to stabilize the output amplitude.

Inference:

Output verified by Signature of faculty with date

Page 55: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

55

EXPERIMENT10. COLPITT’S OSCILLATOR

AIM: To study and calculate frequency of oscillations of Colpitt’s oscillator.

APPARATUS: Transistor - BC 547

Resistors - [100k,6.8k, 1k]

Capacitors -[47µF -1No,10µF -2Nos, 0.1µF -2Nos]

Decade Inductance Box (DIB)

Decade Resistance Box (DRB)

Cathode Ray Oscilloscope (CRO)

Regulated Power Supply (0-30V)

Connecting Wires

CIRCUITDIAGRAM:

Shunt Fed (CKT1)

Page 56: AEC Lab Manual

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Series Fed : (CKT2)

THEORY:

The tank circuit is made up of L1, C4 and C5 .The resistance R2 and R3

provides the necessary biasing. The capacitance C2 blocks the D.C component. The

frequency of oscillations is determined by the values of L1, C4 and C5, and is given by

)2(

1

1LCT

f

,

Where )(

21

21

CCCC

CT

CC

h fe

5

4

The energy supplied to the tank circuit is of correct phase. The tank circuit provides

1800 out of phase. Also the transistor provides another 1800. In this way, energy

feedback to the tank circuit is in phase with the generated oscillations.

PROCEDURE:

1. Make the connections as per circuit diagram1.

2. Connections can be made as per any of the circuit diagrams.

3. Connect CRO output terminals and observe the waveform.

Page 57: AEC Lab Manual

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4. Calculate practically the frequency of oscillations by using the expression

f = T

1 (T= Time period of the waveform)

5. Repeat the above steps 2,3 for different values of L, and note down the

practically values of oscillations of the Collpitts oscillator.

6. Compare the values of oscillations both theoretically and practically.

7. Make the connections as per circuit diagram2 and repeat steps 2 to 5.

OBSERVATIONS:

Inductance ( mH ) Theoretical Frequency

( Hz )

Practical Frequency

( Hz )

MODELWAVEFORM:

Page 58: AEC Lab Manual

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PRECAUTIONS:

1. Transistor terminals should be identified properly.

RESULT: Frequency of oscillations of colpitts oscillator is measured practically and

compared with theoretical values.

VIVA QUESTIONS:

1. What is the condition for sustained oscillations in this oscillator?

2. What type of feedback is used in oscillators?

3. Is an oscillator DC to AC converter?

4. How does Colpitt’s differ from Hartley?

5. What is the loop gain and loop phase shift of an oscillator?

6. Which part in Colpitts circuit forms stabilizing circuit

7. What are the applications of LC oscillators?

8. What is the expression for the frequency of oscillations of Colpitt’s oscillator??

9. State the function of input and output capacitor in Colpitts oscillator?

10. What is the purpose of RF choke?

INFERENCE:

Output verified by Signature of faculty with date

Page 59: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

59

EXPERIMENTS 11: HARTLEY OSCILLATOR

AIM: To study and calculate frequency of oscillations of Hartley oscillator. Compare the

frequency of oscillations, theoretically and practically.

APPARATUS: Transistor - BC 107

Resistors – [100K ,6.8K, 1K ]

Capacitors – [10 μF, 0.1μF]

Decade inductance box (DIB)

Decade resistance box (DRB)

Cathode ray oscilloscope

Bread board

Regulated power supply (0-30V)

Connecting wires

CIRCUITDIAGRAM:

Page 60: AEC Lab Manual

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THEORY:

Hartley oscillator is very popular and is commonly used as a local

oscillator in radio receivers. It has two main advantages viz. Adaptability to wide range

of frequencies and easy to tune. The tank circuit is made up of L1, L2, and C1. The

coil L1 is inductively coupled to coil L2, the combination functions as auto transformer.

The resistances R2 and R3 provide the necessary biasing. The capacitance C2 blocks

the d. c component. The frequency of oscillations is determined by the values of L1, L2

and C1 and is given by,

))((2(

1

121 CLLf

, and

LL

h fe

2

1

The energy supplied to the tank circuit is of correct phase. The auto transformer

provides 180˚ out of phase. Also another 180˚ is produced by the transistor. In this

way, energy feedback to the tank circuit is in phase with the generated oscillations.

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Connect CRO at output terminals and observe wave form.

3. Calculate practically the frequency of oscillations by using the

expression.

F=1/T, Where T= Time period of the waveform

4. Repeat the above steps 2, 3 for different values of L1 and note

Down practical values of oscillations of colpitts oscillator.

5. Compare the values of frequency of oscillations both theoretically

And Practically.

Page 61: AEC Lab Manual

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61

OBSERVATIONS:

CAPACITANCE(μF)

Theoritical frequency

(KHZ)

Practical frequency

(KHZ)

MODEL GRAPH:

Page 62: AEC Lab Manual

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PRECAUTIONS:

1. All the connections should be verified before staring experiment.

2. Transistor terminals must be identified properly.

RESULT:

Frequency of oscillations is calculated and compared with theoretical values.

VIVA QUESTIONS:

1. What are the applications of LC oscillations?

2. What type of feedback is used in oscillators?

3. What the expression for frequency of oscillations?

4. Whether an oscillator is dc to ac converter?

5. What is the loop gain of an oscillator?

6. What is the difference between amplifier and oscillator?

7. What is the condition for oscillations?

8. How many inductors and capacitors are used in Hartley Oscillator?

9. How the oscillations are produced in Hartley oscillator?

10. What is the difference between damped oscillations undamped oscillations?

11. What is the purpose of R.F. CHOKE?

Inference:

Output verified by Signature of faculty with date

Page 63: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

63

EXPERIMENT:12. CRYSTAL OSCILLATOR

AIM: To study and calculate frequency of oscillations of crystal . Compare the

frequency of oscillations, theoretically and practically.

APPARATUS: Transistor - BC- 547

Resistors - [ 5K, 1.7K, 1K ]

Capacitors - 0.001μF, 100 pf,1000pf

1 Mhz Crystall

Decade resistance box (DRB)

Cathode ray oscilloscope

Bread board, R.P.S. (0-30V), Connecting wires

CIRCUIT DIAGRAM:

Page 64: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

64

THEORY:

The frequency of the rc and lc crystal oscillator circuit are controlled by the

electrical constant of the circuit and they are known as self controlled oscillators. The

values of the circuit elements will be effected by the operating conditions and so the

frequency of self controlled oscillators has a tendency to drift. To maintain the output

of an oscillator at constant value may be used to control the frequency of oscillation.

This type of oscillator is called a crystal controlled oscillator. crystal oscillators

generates oscillations due to piezo – electric effect. the frequency of vibration will be

equal to the resonant frequency of the crystal determined by its structural

characteristics. When the frequency of applied voltage is equal to

Its resonant frequency of the crystal, the amplitude of vibration will be maximum.

There are X-cut crystal and y-cut crystal.

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Connect CRO at output terminals and observe wave form.

3. Calculate practically the frequency of oscillations by using the

Expression.

F=1/T, Where T= Time period of the waveform

4. Compare the values of frequency of oscillations both theoretically

And Practically.

Page 65: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

65

OBSERVATIONS:

CAPACITANCE (μF) Theoritical frequency

(KHZ)

Practical frequency

(KHZ)

MODEL GRAPH:

PRECAUTIONS:

3. All the connections should be verified before staring experiment.

4. Transistor terminals must be identified properly.

RESULT:

Frequency of oscillations of a crystal oscillator is calculated and compared with

theoretical values.

Page 66: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

66

VIVA QUESTIONS:

1.)What are the applications of LC oscillations?

2. What are different types of crystals ?

3. give the effect of temperature on crysatll?

4. state piezo electric effect?

5. How to stabilize resonant frequency against variations in temerature?

6. Draw the effect of frequency vs reactance curve of crystal oscillator?

7.)Draw the electrical equivalent circuit of crystal?

Inference:

Output verified by Signature of faculty with date

Page 67: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

67

EXPERIMENT:13. DIFFERENTIAL AMPLIFIER

AIM: To construct and study the operation of differential amplifier and determine

CMMR.

APPARATUS: Transistor - 2N2222A

Resistors - [50,2.2k, 4.7K, 1.7K, 10K ]

Capacitors - 0.001μF, 100 pf,1000pf

Cathode ray oscilloscope

Bread board, R.P.S. (0-30V), Connecting wires

CIRCUIT DIAGRAMS:

Page 68: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

68

THEORY:

The basic building block of a operational amplifier is direct coupled differential

amplifier, it has high gain with negative feedback.. The differential amplifier is a versatile

circuit which serves as the input stage to most of the operational amplifiers. The circuit

has two inputs V1 and V2 and the output is

V0 = Ad (V1 –V2).

Where Ad is the gain of the differential amplifier i.e, any signal which is common

to both

inputs will have no effect on the output voltage.

Two types of inputs are given

1.) Same input to both the input terminals .either A.C or D.C.

2.) Out of phase signals for the two inputs, or either +1V and -1V D.C

Page 69: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

69

Design :

4.) Collector D.C. Voltage is approximately 7.5V

2.) Short point A to ground algebraic sum of )21

( VV

47100

7.4

)(

)(12

K

VVVV

ABA

d 20log Ad

3) isAc Very small 20 log Ac

4.) CMMR = 20log AA

c

d

PROCEDURE:

1. Connections are made as per the circuit diagram

2. Apply the input voltage Vi1 = 50mV(p-p) and Vi2 = 20mV(p-p) amplitude and

1KHz frequency is applied and output voltage is noted.

3. The voltage gain is calculated by using the expression

Ad = Vo/ (Vi1 – Vi2 )

PRACTICAL CALCULATIONS :

Vi1 = 50mV

Vi2 = 20mV

Vo =

Page 70: AEC Lab Manual

Analog Electronic circuits Lab Manual- III-B.Tech-I-Sem,

Department of Electrical & Electronics Engineering A.Y. 2011-2012

70

)(21

0

VVV

Aii

d

20log Ad

20log Ac =

)log(20AA

C

DCMMR

RESULT: The differential voltage gain of dual input, balanced output differential

amplifier is verified.

VIVA QUESTIONS:

1. What is meant by differential amplifier?

2. Define common mode rejection ratio?

3. Draw the small signal equivalent circuit model of differential amplifier?

4. What is the phase difference between input and output waveforms of inverting

amplifier/

5. What are the applications of differential amplifier?

Inference:

Output verified by Signature of faculty with date