I

HPOOPIKH

APXE TEXNOOIA OIMIKOY

B'

I

K T M H/Y

ATPA 2001

HPOOPIKH

APXE TEXNOOIA OIMIKOY

B'

EITOYPIKA YTHMATA I

AYO YPAKH

K T M H/Y

AANAIO XATZHAKO

A. K T

E A

ANAITH INTEA

T M

HIA TAYPOOYO

IANNH AANOOYO

,

TYPORAMA

/ 19972001

ISBN: 9605383330

K : H 11/2

Copyright 2000

& , 26222 : (0610) 314094, 314206 : (0610) 317244

. 2121/1993,

.

............................................................................................................................................................................. 11

K 1

:

, , , ............... 13

1.1 .............................................................................................................................................. 15

1.2 ................................................................................... 16

1.3 .................... 18

1.3.1 (1940) .......................................................................................................... 18

1.3.2 (1950 1960) .............................................................................................. 18

1.3.3 (1959 1965) .......................................................................................... 20

1.3.4 (1965 1980) ................................................................................................. 20

1.3.5 (1980 1990) .......................................................................................... 21

1.3.6 (1990 ) ..................................................................................... 22

................................................................................................................................................................................... 23

......................................................................................................................................... 23

.................................................................................................................................................. 24

K 2

, , , ............... 25

2.1 ............................................................................................................................................................. 27

2.2 ...................................................................................................................... 27

2.3 .............................................................................................. 28

2.3.1 ........................................................................................................ 28

2.3.2 20 .................................................................................. 29

2.4 .............................................................................................................. 31

6 E I T O Y P I K A Y T H M ATA I

2.5 ............................................................................................................................. 33

2.5.1 ................................................................................................................................ 34

2.5.2 .................................................................................................................... 35

2.6 .............................................................................. 37

................................................................................................................................................................................... 38

......................................................................................................................................... 39

.................................................................................................................................................. 40

K 3

, , , ............... 41

3.1 ................................................................................................................................................................. 44

3.2 ........................................................................................................................ 44

3.3 ........................................................................................................................... 45

3.4 ........................................................................................................................................ 47

3.5 ............................................ 48

3.6 .............................................................................................................................. 56

3.7 ( ) ........................................... 57

3.7.1 ........................................................................................................ 57

3.7.2 (Semaphores) ....................................................................................................... 58

3.7.3 ................................................ 60

3.7.4 ....................................................................................... 65

3.7.5 .............................. 75

3.7.6 V hardware ............................................................................... 76

3.7.7 ................................................................................................. 79

3.8 .......................................................... 79

3.9 ................................................ 80

3.9.1 (The Bakery Algorithm) ............. 81

................................................................................................................................................................................... 83

......................................................................................................................................... 85

.................................................................................................................................................. 85

K 4

(Memory Management)

, , , ............... 87

4.1 (Preliminaries) ................................................................................................................. 92

4.2 (Bare machine) .......................................................................................................... 96

4.3 (Resident Monitor) ................................................................................ 98

4.3.1 (Protection Hardware) ................................................................ 98

4.3.2 (Relocation) ..................................................................................................... 100

4.4 (Swapping) ........................................................................................................................... 103

4.4.1 (Backing Store) ............................................................................ 103

4.4.2 (Swap Time) ................................................................................... 104

4.4.3 (Overlapped Swapping) ................................... 105

4.5 (Multiple Partitions) ......................................... 108

4.5.1 ....................................................................................................................... 109

4.5.2 (Fixed Regions) ............................................................................. 111

4.5.3 (Memory Fragmentation) .................................................. 118

4.5.4 (Variable Partitions) ...................................................... 119

4.5.5 (Compaction) ........................................................................................................ 125

4.6 (Paging) ............................................................................................................... 128

4.6.1 (Hardware) ....................................................................................................................... 129

4.6.2 ................................................................................. 132

4.6.3 ..................................................................................... 135

4.6.4 ............................................................................................................................... 138

4.6.5 ......................................................................................................................................... 138

7 E P I E X O M E N A

8 E I T O Y P I K A Y T H M ATA I

4.6.6 (Two Views of Memory) ............................... 141

4.7 (Segmentation) .................................................................................................. 143

4.7.1 ................................................................... 143

4.7.2 ...................................................................................................................................................... 144

4.7.3

(Implementation of Segment Tables) ......................................................................... 147

4.7.4 .............................................................................................. 148

4.7.5 ( ) ................................ 151

4.8 (Combined Systems) ............................................................ 152

4.8.1 (Segmented Paging) .............................. 152

4.8.2 (Paged Segmentation) .......................... 153

................................................................................................................................................................................ 156

...................................................................................................................................... 158

............................................................................................................................................... 159

K 5

(Virtual Memory)

, , , ........... 161

5.1 ................................................................................................................................................... 165

5.2 .......................................................................................................................... 166

5.3 ..................................................................................... 173

5.4 ....................................................................................................................... 177

5.5 ............................................................................................................. 180

5.6 ...................................................................................... 182

5.6.1 FIFO ....................................................................................................................................................... 183

5.6.2 (Optimal Replacement) ......................................... 186

5.6.3 LRU (Least Recently Used) ............................................................................................... 187

5.6.4 LRU .............................................................................................................. 189

5.6.5 bits .................................................................................................... 190

5.6.6 ........................................................................... 191

5.6.7 ...... 191

5.6.8 .................... 192

5.6.9 .......................................................................................................................... 196

5.6.10 Ad Hoc ................................................................................................................ 197

5.7 ......................................................................................................................... 198

5.7.1 ............................................................................................ 199

5.7.2 ................................................................................ 200

5.7.3 .......................................................................................................... 201

5.8 (Thrashing) ........................................................................................................................... 203

5.8.1 ........................................................................................................................................ 204

5.8.2 (Working Set Model) ....................................... 205

5.8.3 ...................................................................................... 208

5.9 ..................................................................................................................................... 209

5.9.1 ........................................................................................................... 209

5.9.2 I/O (/0 Interlock) ............................................................. 210

5.9.3 .......................................................................................................................... 212

5.9.4 () ............................................................................. 214

5.9.5 ........................................................................................................... 216

................................................................................................................................................................................ 218

...................................................................................................................................... 220

............................................................................................................................................... 221

9 E P I E X O M E N A

1999 2000, -

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code) (object code).

, -

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1 91 . 3

2 0 K E A A I O 1 . E :

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( E/E)

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1.3.3 (1959 1965)

1959 63 -

.

hardware, , (data channel),

/ /.

I/ (),

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I/ () .

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. , -

. -

, I/ .

.

(software buffering), ,

, (queuing) -

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1.3.4 (1965 1980)

() -

IBM 360. 360

, , . -

(OS 360), ,

, .

, (multi

programming).

(partitions), () -

. -

( I/O) -

.

( ) , -

. Spooling ( Simultaneous

Peripheral Operations on Line). Spooling

.

-

(time sharing), , -

-

(interactive) -

CPU.

timesharing

MULTICS ( CTSS, MIT, Bell Labs General

Electric Unix), .

MULTICS Ken

Thomson ( Bell Labs) UNIX (

MULTICS PDP).

UNICS (Uniplexed Information and Computing Service), -

, B. Kernigham, UNIX.

Bell Labs, D. Ritchie, UNIX

() C (

Ritchie). Bell UNIX -

(..

VAX, Motorola .). .

1.3.5 (1980 1990)

(PCs). -

-

(user friendly) (.. XENIX, DOS .) ,

,

(multi tasking OS).

2 11 . 3

2 2 K E A A I O 1 . E :

1.3.6 (1990 )

(Internet Web)

. -

, .

, processes (

),

Client Server ( ) -

(.. sockets), IP.

hardware,

. PCs

Windows, multi tasking -

UNIX (.. Solaris, POSIX .),

Windows N multi tasking . , -

Windows

(.. 1998 2000).

(), /

,

[ (CDs), video

(DVD), ]. -

, -

-

.

( high end)

, UNIX -

.

/ , -

(interfaces) Web -

. . , -

(WANs),

(NMS).

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/ /

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,

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: ()

, () () -

.

. , -

, ,

/ .

, -

(swapping) -

.

,

, 1940 ,

. -

,

-

.

)

Brooks, The mythical manmonth: Essays on software engineering, reading MA:

AddisonWesley, 1975.

Corbato, On building systems that will fail, commun. CACM, vol. 34, June 1991,

pp. 72 81.

Deitel, Operating Systems, 2nd edition, Reading MA: AddisonWesley, 1990.

2 31 . 3

2 4 K E A A I O 1 . E :

Finkel, An operating systems vade mecum, 2nd edition, Englewood Cliffs, NJ:

Prentice Hall, 1988.

Lampson, Hints for computer systems design, IEEE software, vol. 1, Jan. 1984, pp.

11 28.

)

Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:

AddisonWesley, 1991.

Tanenbaum, , Prentice Hall and ,

1993.

Assembler:

Batch system:

CPU:

Data channel:

I/O (input/output): /

Interrupt handling:

Library routines:

Linking loaders:

Load:

Multiprogramming:

Object code: ,

Programming aids:

Queuing:

Real time system:

Relocatable code:

Software buffering:

Source code:

Swapping:

System program:

Timesharing:

-

: .

, ,

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. PCB

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(

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2 6 K E A A I O 2 :

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:

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2.2

2.3

2.4

2.5

2.6

2.1

-

.

.

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, software hardware /.

, (kernel). -

hardware.

2.2

-

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(PCB)

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.

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2.3.1

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(, , ),

CPU (

CPU) :

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CPU

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(Process

Control Block PCB). -

(process descriptor) (state vector).

, PCB.

2 92 . 3

()

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E T

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K

2.2

3 0 K E A A I O 2 :

, PCB

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PCB :

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(

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(resources)

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NAI

NAI

NAI

YAE TOY~KATAXPHTE~

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1

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(nonpreemptive).

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CPU.

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2.6

(kernel).

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.[1]

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(assembly), -

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(.. UNIX 1000 -

)

, -

(maintainable).

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[1] , - , .

3 8 K E A A I O 2 :

:

(. 2.5.2)

(. 2.4)

(dispatching) (. 2.4)

(. 2.4)

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.

)

Andrews and Schneider, Concepts and Notations for Concurrent Programming,

Computing Surveys, vol. 15, March 1983, pp. 3 43.

BenAri, Principles of Concurrent Programming, Englewood Cliffs, NJ: Prentice

Hall International, 1982.

Dubois et al., Synchronization, Coherence, and Event Ordering in Multiprocessors,

IEEE Computers, vol. 21, Feb. 1988, pp. 9 21.

)

Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:

AddisonWesley, 1991.

3 9B I B I O PA I A

4 0 K E A A I O 2 :

Blocked process:

Dispatching:

Dispatcher:

Hardware:

Interrupt:

Kernel:

Maintainable:

Mode:

nonpreemptive:

Preemptive:

Process Control Block (PCB):

Process descriptor:

Queue:

Qvantum:

Ready or runnable process:

Resource:

Resume:

Running process:

Software:

State vector:

Status flag:

Supervisor call:

Supervisor mode:

Suspend:

User mode:

Volatile environment:

-

,

,

. -

,

.

, .

.

(

) . -

,

.

/ .

.

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synchronization)

,

.

:

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-

3

4 2 K E A A I O 3 :

.

.

.

. ,

.

.

send receive.

,

P(u) [wait(u)) V(u) (signal(u)];

;

-

,

.

region b do

. ;

: monitor ,

.

block wakeup -

.

-

.

.

Cobegin, coend

Send, receive

Wait, signal

Await

Test and set

Monitor

Block, wakeup

:

3.1

3.2

3.3

3.4

3.5

3.6

3.7

3.8

3.9

4 3

4 4 K E A A I O 3 :

3.1

, , -

(. ) -

.

(concurrent) -

. , -

(true

parallelism). ,

-

.

(indeterminism). -

indetermision .

( -

).

. -

, -

, ,

.

3.2

( )

cobegin s1 ; s2 ;; sn coend

S0

Sn

Sn+1

S1S2

parbegin s1 ; s2 ;; sn parend

3.1

s1 , s2 ,, sn (, -

). , s0 ; cobegin s1 ; s2;; sn coend ; sn+1 3.1. ,

, ,

,

.

.

3.3

-

. -

, -

-

.

, 1, 2 cursor

(1)

( , -

) (2). -

(interactive text processing). i (i = 1, 2)

1 P2 [ -

i (i = 1, 2) , ]:

4 53 . 3

BEGIN P1 BEGIN 2

cursor , cursor ,

1. cursor 1. cursor

I 2

2. 1 2. 2

CURSORPOSITION CURSORPOSITION

END END

CURSORPOSITION ( )

cursor . i ()

i.

CURSORPOSITION , .., 653.

4 6 K E A A I O 3 :

cursor , ,

, . ,

CURSORPOSITION -

CURSORPOSITION mod .

cursor 342, 1

CURSORPOSITION 342. ,

, 1

CURSORPOSITION 654.

cursor (..

). ,

CURSORPOSITION 342.

P1 P2:

2: cursor 2 (2 = 654)

2 CPU,

. 1 .

1: cursor 1 (1 = 342)

1: 1 CURSORPOSITION (CURSORPOSITION = 342)

1 CPU,

. 2 .

2: 2 CURSORPOSITION (CURSORPOSITION = 654)

CURSORPOSITION! ( CURSORPOSITION

654 342).

total tally -

, :

Const n = 50;

var tally : shared integer;

procedure total begin (* main program *)

var count : integer; tally := 0;

begin cobegin

for count := 1 to n do total;

tally := tally + 1; total;

A 3.1

:

, / -

(

, ).

, -

! , -

.

, , , (

), .

() -

( ) . -

, , .., (,

I/O ) .

CURSORPOSITION .

1 2 CURSORPOSITION ( 1 , 2

).

,

. ( -

) (mutual exclusion rule).

3.4

u , -

, , -

u

u

, -

/ ( ). -

4 73 . 4

end coend;

writeIn(tally)

end

tally ,

total.

4 8 K E A A I O 3 :

: u T,

( u)

.

(critical region) :

var u : shared T ;

u ( -

). u (.. INTEGER, QUEUE, LIST

.)

region u do S ;

S u.

:

( -

u) .

,

.

.

3.5

(

) Q,

() R. Q R

( R).

. Q

R . -

, .

; -

P Q free -

. , (free = False), . (free

= True), .

, free, .

1

var free : shared boolean ;

begin

free := true ;

cobegin

P repeat Q repeat

repeat until free; repeat until free;

free := false ; free := false ;

[ R] [ R]

free := true ; free := true ;

forever forever

coend

end

free . Q -

free . (, .., Q -

repeat until free ). , -

free ( )

R ! ( .)

: ,

. free, Pturn,

R. Pturn = True

( False Q).

2

var Pturn : shared boolean ;

begin

Pturn := true;

cobegin

P repeat Q repeat

repeat until Pturn ; repeat until (not Pturn) ;

[ R] [ R]

Pturn := false ; Pturn := true ;

forever forever

4 93 . 5

5 0 K E A A I O 3 :

coend

end

H 2 , Pturn true

( false) .

R Q , ,

. , .., P R,

,

Q , R . -

-

loors ( repeat until), -

(busy waiting).

;

A 3.2

,

boolean -

. :

(), () -

, , ,

.

3

var Pturn , Qturn : shared boolean ;

begin

Pturn : false ; Qturn := false ;

cobegin

P repeat Q repeat

Pturn := true ; Qturn := true ;

repeat until (not Qturn) ; repeat until (not Pturn) ;

[x R] ; [x R];

Pturn := false ; Qturn := false ;

forever forever

coend

end

5 13 . 5

: -

R. ( -

), , -

-

. ,

: ;

1

2 :

;

.

_______________;

_______________.

.

_______________ .

A -

.

( ) 2,

Pturn, Qturn, .

A 3.3

3. -

; ;

A 3.4

Dekker

1965.

5 2 K E A A I O 3 :

4 (Dekker)

var outside 1, outside 2 : shared boolean ;

turn : shared 12 ;

begin

outside 1 : true ; outside 2 := true ; turn := 1 ;

cobegin

P repeat Q repeat

begin begin

repeat repeat

outside 1:= false ; outside 2:= false ;

repeat repeat

if outside 2 then go to enter ; if outside 1 then go to enter ;

until turn = 2 ; until turn = 1 ;

outside 1: = true ; outside 2: = true ;

repeat until turn = 1 ; repeat until turn = 2 ;

forever ; forever ;

end end

enter P inside ; enter Q inside ;

[ R] ; [ R] ;

turn: = 2 ; turn: = 1 ;

outside 1:= true ; outside 2:= true ;

P outside ; Q outside ;

forever forever

coend

end

Dekker R. Dijkstra

n .

:

Dekker

-

. . -

-

. , ,

, -

.

5 3X X X

:

outside 1 := false /* 1

R */.

If outside 2 then goto enter /* 1 2 -

R.

.

outside1, outside2 turn

1; -

2; ; turn

,

2;

-

. , loop :

(enter)

TON . .

(turn = 2)

(out 1 = True)

.

; ;

A 3.5

Dijkstra Hansen (1972)

region u do S.

. compiler ;

. Dekker -

A 3.6

5 4 K E A A I O 3 :

. . , region u do S -

Dekker ( ) .

. -

Dekker .

:

. (, compiler -

.)

. .. Dekker:

var R : shared T ;

cobegin

P Q

repeat repeat

region R do [ R]; region R do [ R];

forever forever

coend

. Dekker.

,

, .

-

, .

-

. (noop = )

var flag: shared array[0..1] of boolean; /* FALSE */

turn : shared 0..1;

pi (i = 0 1. i = 0, j = 1, ).

repeat

A 3.7

5 5X X X

flag[i] = TRUE;

while (turn != i) do begin

while (flag[j]) do noop;

turn := i;

end

flag[i] = FLASE;

until FALSE;

, -

p0 p1, -

. :

turn := 1,

P0: flag[0] := true;

P0: while (turn != 0)

P0: while (flag[1])

P0: turn := 0;

P0:

P0: flag[0] = false;

P1: flag[1] := true;

P1: while (turn != 1)

P1: while (flag[0])

P0: flag[0] = true;

P0: while (turn != 0)

P0:

P1: turn = 1;

P1: ].

5 6 K E A A I O 3 :

3.6

3

(Pturn = true)

.

,

, .

( ),

, , . -

3 ;

:

repeat until (not Qturn)

repeat

begin

Pturn := false;

;

Pturn := true;

end ;

until (not Qturn) ;

( Q),

[, , (Q)

Q (P)].

2. ,

R ( , , -

, ) -

(indefinite postponement).

indefinite postponement,

(fair).

3. -

:

A 3.8

3.7 ( )

3.7.1

P C, P

C, C

(Producer, Consumer). -

, (messages). P C -

, (P) -

(C) (..

C ). -

,

,

. (buffer) (. 3.2). O

.

5 73 . 7 ( )

) ,

: -

.

) , -

: .

) .

Bp q

3.2

-

, :

1. -

.

2.

.

-

:

5 8 K E A A I O 3 :

()

-

.

-

.

. , , -

var B: buffer max of T;

, max , .

send (M,B);

,

receive (M,B);

-

.

send receive ( ),

, send receive

.

: send, receive -

(by value) (by reference)

-

. -

send receive;

A 3.9

3.7.2 (Semaphores)

.

.

, ,

. , ,

. -

(semaphore). :

var v: semaphore;

send receive

signal (u) [ V(u)] wait (u) [ (u)].

V ( ) , -

. P V

, .

5 93 . 7 ( )

V(u) P(u) sent receive.

u 3 :

1. s(u):

2. r(u):

3. c(u):

.

:

0 r(u) s(u) + c(u) r(u) + maxint

maxint .

, , u,

u = s(u) + c(u) r(u)

[ u = c(u)].

:

1. P(u) [ wait(u)]: P(u) u > 0, u := u1 -

P(u) .

A 3.10

6 0 K E A A I O 3 :

3.7.3

var R : shared T ;

cobegin

coend

P V :

var R : record content : T;

mutex : semaphore;

begin

mutex := 1;

cobegin

P1 Pn

begin begin

wait (mutex); wait (mutex);

process P1region R do S1

process P2region R do S2

process Pnregion R do Sn...

...

P(u) u = 0, -

u, qu,

.

2. V(u) [ signal (u)]: To V(u) u 1 qu ,

,

( pcb qu

ready queue), P(u)

, 1 u.

qu ( -

, -

, -

). ,

qu .

S1; Sn ;

signal (mutex); signal (mutex);

end end

coend

end

:

wait (P) signal (V),

0 s(mutex) r(mutex)

,

0 r(mutex) s(mutex) + 1

0 r(mutex) s(mutex) 1

r(mutex) s(mutex)

P V,

. , (1)

.

:

6 13 . 7 ( )

, , -

( ).

: , -

.

Dekker.

,

hardware,

memory interlock, . ,

,

-

hardware.

A 3.11

1.

6 2 K E A A I O 3 :

2. region v do S P

V, Compiler -

.

mutex :=1

wait(mutex); signal(mutex);

S; S;

wait(mutex); wait(mutex);

(A) (B)

() ()

;

:

H () . ()

.

A 3.12

,

.

,

()

. ,

. -

.

.

A 3.13

6 33 . 7 ( )

:

#define TRUE 1

#define FALSE 0

typedef int semaphore;

semaphore mutex =1; /*

*/

semaphore west = 1; /* */

semaphore east = 1; /* */

share int west_count = 0, east_count = 0; /*

*/

void east(void) { void west(void) {

while (TRUE) { 0while (TRUE) {

wait(&east); wait(&west);

east_count++; west_count+;

if(east_count ==1) if(west_count==1)

wait(&mutex); wait(&mutex);

signal(&east); signal(&west);

move_east(); move_west();

wait(&east); wait(&west);

east_count; west_count;

if(east_count == 0) if(west_count == 0)

signal(&mutex); signal(&mutex);

signal(&east); signal(&west);

} }

} }

6 4 K E A A I O 3 :

, -

.

(.. )

, ,

.

:

#define TRUE 1

#define FALSE 0

typedef int semaphore;

semaphore mutex = 1; /*

east_count west_count*/

semaphore turn = 1;/*

*/

share int west_count = 0, east_count = 0; /*

*/

share int flag = 0; /* -

*/

void east(void) { void west(void) {

while (TRUE) { while (TRUE) {

wait(&mutex); wait(&mutex);

east_count++; west_count+;

signal(&mutex); signal(&mutex);

if(flag ==0){ if(flag==1) {

move_east(); move_west();

wait(&mutex); wait(&mutex);

east_count; west_count;

A 3.14

3.7.4

.

, -

.

var u : shared T

region u do

begin

So ;

await B;

S1

end

boolean , u.

u,

Qu ( u).

, ,

.

6 53 . 7 ( )

if(west_count != 0) if(east_count != 0)

flag = 1; flag = 0;

signal(&mutex); signal(&mutex);

} }

} }

} }

6 6 K E A A I O 3 :

, B(u)

( wait). , S1

. ,

, Qe,u [event queue Q(e,u)].

Qu. await

boolean . ,

Qe.

, Q(e,u) Qu,

.

u

Qe,u

Qe,u

3.3

6 73 . 7 ( )

1. ;

;

2. Qu

;

:

1.

u,

.

2. Qu FIFO;

A 3.15

c

p

3.4

.

c

. full

, empty, .

1. .

2. .

A 3.16

6 8 K E A A I O 3 :

:

full (

) . full = 0. -

empty . empty = max.

type B = shared record /* record*/

buffer : shared array 0max 1 of T ;

p, c : shared 0max 1;

full : shared 0max 1;

p = c = full = 0;

procedure send (m : T ; var b : B) ;

region b do

begin

await full < max ;

buffer (p) := m ;

p := (p +1) mod max;

full := full + 1;

end

procedure receive(var m : T; b : B);

region b do

begin

await full > 0;

m := buffer(c);

c := (c + 1) mod max;

full := full 1;

end

6 93 . 7 ( )

type B = record

v : shared record

buffer : shared array 0max 1 of T;

p,c : shared 0max 1;

full, empty : semaphore;

p = c = full = 0;

empty = max ;

procedure send (m : T; var b : B);

begin

with b do

begin

wait (empty);

region u do

begin

buffer (p) := m ;

p:= (p + 1) mod max;

end

signal(full);

end

end

procedure receive (var m : T; b : B) ;

begin

with b do

7 0 K E A A I O 3 :

begin

wait (full) ;

region u do

begin

m: = buffer(c);

c: = (c + 1) mod max ;

end

signal (empty);

end

end

3.1:

:

( )

(.. multimedia web document).

, -

. , -

.

(,

, , ,

, ).

:

:

1. multimedia web document

2. , ( )

3. document

-

.

document ( )

.

ar =

rr =

aw =

rw =

ar = rr = aw = rw = 0

:

1. 0 0 rw > 0) ( -

)

5. .

( aw = 0).

7 13 . 7 ( )

. -

grant reading,

,

grant writing, .

( , !

,

. .

.

:

()

type T = record

ar, rr, aw : shared integer ;

A 3.17

7 2 K E A A I O 3 :

var u : shared T ;

reading, writing, w : semaphore ;

ar = rr = aw = rw = reading = writing = 0, w = 1.

cobegin

begin reader

region u do

begin

ar : = ar + 1 ;

grant reading (u, reading);

end

wait (reading);

read ;

region u do

begin

rr := rr + 1;

ar := ar 1;

grant writing (u, writing) ;

end

end

begin writer

region u do

begin

aw := aw + 1;

grant writing (u, writing);

end

7 33 . 7 ( )

end

begin writer

region u do

begin

aw := aw + 1;

grant writing (u, writing);

end

wait (writing);

P(w);

write;

V(w);

Region u do

begin

rw := rw + 1;

aw := aw 1;

grant reading (u, reading);

end

end

coend

procedure grant reading (var u : T ; reading : semaphore) ;

begin

with v do

if rr = 0 then

while rw < aw do

7 4 K E A A I O 3 :

begin

rw : = rw + 1;

signal (writing);

end

end

var u : shared record

rr, aw : shared integer

rr = aw = 0

cobegin

begin reader

region u do

begin await aw = 0; rr := rr + 1 end

read;

region u do rr := rr 1

end

begin writer

region u do

begin aw = aw + 1 ; await rr := 0 end

write;

region u do aw := aw 1;

end

coend

7 53 . 7 ( )

3.7.5

S s ( true

false [ 0 1]) mutexS, delayS, ( V

).

mutexS, delayS : binary semaphore;

S : semaphore;

NS : shared integer;

mutexS = 1, delayS = 0, NS = S;

cobegin

egin P (S)

P (mutexs);

Ns : = Ns 1;

if Ns

7 6 K E A A I O 3 :

3.7.6 V hardware

1

. -

. -

, , , 1

. To hardware / :

testandset, (

)

var X : shared boolean

X : true;

:

egin P(S)

P V

.

; 0

1;

V(mutexs);

P (delays);

P;

-

:

P P, V V P V.

( !). -

3.7.2.

P V; .

A 3.18

L: if TS(S) then go to L ;

End

Begin V(S)

S: = false;

End

7 73 . 7 ( )

FA(m,r) m

r m

m.

FA .

:

procedure FA (var m: integer, r: integer)

var temp: integer;

begin

temp := m;

m := m + r;

return (temp);

end

FA :

var lock, key: shared integer;

noop .

procedure pi

begin

lock := 0;

key := 1;

A 3.19

7 8 K E A A I O 3 :

repeat

while (FA (lock, key) > 0) noop;

;

lock := 0;

until false;

end

:

(-

3.5);

:

. -

, -

, ,

, ,

.

-

FA -

.

:

var lock: shared integer;

var waiting: shared array[0..n1] of boolean; false.

noop .

procedure pi

var j: integer; (j: 0 .. n1)

key: integer;

begin

key := 1;

repeat

7 93 . 8

waiting[i] := true;

while (waiting[i] and (FA (lock, key) > 0)) do noop;

waiting[i] := false;

;

j := (i + 1) mod n;

while ((j != i) and (!waiting[j])) do

j := (j + 1) mod n;

if( j == i) then lock := 0;

else waiting[j] := false;

until false;

end

3.7.7

Monitor: ,

, .

(Event Queues)

:

var e : event u

( e u).

( u) e

: await (e).

( (e) Qu u, : cause (e).

monitors -

.

3.8

. () -

Block Wakeup.

8 0 K E A A I O 3 :

3.9

. ,

, . -

.

;

;

:

-

. , ,

. , -

, -

. ,

,

.

PCB i boolean wakeup waiting

wws(i). block wakeup :

Block (i):

if (not ww(i) then Block process(i)

else wws(i) := false;

Wakeup(i):

If ready (i) then wws(i) := true

else Activate process (i);

Block process(i) i . Activate i

ready queue. ready(i) true i

running ready. false .

Block Wakeup , -

.

A 3.20

, -

. , -

:

1. (local) , -

,

2. (specific flags), /

,

.

, -

Pi : ()

()

. , flags, -

-

.

-

. ( flags)

(

testing),

.

O

. , , -

: -

, .. (breakdown)

.

3.9.1 (The Bakery Algorithm)

Lamport 1974. ( -

) -

,

.

P0, P1,, Pn1 -

, .

, -

( ) .

8 13 . 9

8 2 K E A A I O 3 :

:

var choice : array [0(n1)] of boolean;

number array [0(n1)] of integer ;

false 0 .

choice [i], number [i]

flags Pi. Pi

. j (j i) .

[(a,b) < (c,d)] [a < c (a = c b < d)]

Pi ( j

Pi).

choice [i] = true ;

number [i] = 1 + max(number [0]+number[n1]) ;

choice [i] = false ;

for j = 0 to n 1, i j

begin

wait until not choice [j] ;

wait until number [j] = 0 or

(number [j], i) < (number [j], j)

end ;

;

Number [i] = 0 ;

-

( n 1

). value [i]

. -

(;)

-

, -

. -

, -

, .

.

-

, -

. -

, -

.

,

: () ,

, () -

()

.

3.4

Dekker, -

.

. (

), -

.

:

.

:

-

,

, -

,

8 3 Y N O H

8 4 K E A A I O 3 :

-

. send(M, B) receive(M, B),

.

.

(var u: semaphore)

, .

[ : signal(u) V(u)] [

: wait(u) P(u)] .

( )

, . , -

,

.

, : -

, , monitor

,

test and set . , -

-

.

Andrews and Schneider, Concepts and Notations for Concurrent Programming,

Computing Surveys, vol. 15, March 1983, pp. 343.

BenAri, Principles of Concurrent Programming, Englewood Cliffs, NJ: Prentice

Hall International, 1982.

Dubois et al., Synchronization, Coherence, and Event Ordering in Multiprocessors,

IEEE Computers, vol. 21, Feb. 1988, pp. 921.

Silberschatz et al., Operating System Concepts, 3rd edition, reading, MA:

AddisonWesley, 1991.

Breakdown:

Buffer:

Busy waiting:

By reference:

By value:

Concurrent:

Consumer: ,

Critical region/section:

Deadlock:

Fair:

False:

Indeterminism: (

)

Infinite postponement:

Memory interlock,

storage arbiter:

8 5B I B I O PA I A

8 6 K E A A I O 3 :

store ,

-

Message:

Monitor:

Mutual exclusion:

New line:

Producer: ,

Reader:

Resource:

Semaphore:

True:

True parallelism: -

Writer:

(Memory Management)

, ,

:

/

(nonvolatility).

(

).

,

CPU, .

, , -

,

. , , -

CPU. , CPU . -

,

. 1,

. timespace tradeoffs (

)

( ).

,

. , ,

-

. -

tradeoffs,

, .

.

,

. ,

.

4

[1] .

8 8 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

, -

/ . -

, . -

, / -

. -

. -

. -

. .

-

. , ,

.

/

, -

, . -

,

.

, :

. ,

.

-

.

-

: , ,

, , ,

.

.

.

.

.

.

.

( )

.

.

-

.

.

.

; ( ) -

;

;

-

. ;

.

. ,

. ,

, , -

;

-

.

.

-

.

8 9

9 0 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

-

2, .

-

,

-

.

-

.

.

;

,

, ,

()

()

: ,

Round robin, FCFS

, , ,

( )

:

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

9 1

9 2 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

4.1 (Preliminaries)

.

4.1, /

(/) .

bytes, bytes -

. ,

bytes ,

.

, .

byte m bits,

o m 2m = . CPU

I/O /

/ . , CPU (fetches)

(stores) .

MNHMHKMEYTHMA~

E/E

4.1

(

). , -

. 4.2

.

-

, . ,

(source program) .

-

. ,

. , -

-

, -

. , , -

. -

. / []

(bind)

(relocatable addresses).

(object module), . -

, , ,

, ..

01110 = 14 byte

. (linkage editor) -

(loader), ,

(absolute addresses) (.. 000010000100000 = 1056 byte

32768 bytes).

(address space) .

/ -

, , ,

.

.

( ) . -

(instruction cycle).

,

. -

-

.

/ -

(

,

).

. (

), ..

( 4.5).

.

CPU.

.

9 34 . 1 ( P R E L I M I N A R I E S )

9 4 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

M~~

~

(Compiler or Assembler)

(Source Program)

(Object Module)

(Linkage Editor)

(Load Module)

(Loader)

(In-core core Image)

~module

X~

X~E

4.2

-

-

1. [2] /

R.[3]

2. PC[4] .

3. .

4. , -

.

5. , , CPU.

6. .

7. ( ).

8. 1 .

(operands) ( )

. 3 4

.

. [5]

(opcode) x bits (.. x = 8) -

. -

, bits

. bits

(,

, ) -

CPU. : (1)

, (2) , (3) . -

.

9 54 . 1 ( P R E L I M I N A R I E S )

[2] (control unit) .

[3] IR (instruction register) - CPU .

[4] PC (program counter register) CPU , , .

[5] (opcode) . (instruction set). O , , , , .

9 6 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

,

. -

, , ,

.

.

-

,

, / -

, / /

( ). -

, -

. ,

( 4.5.4), -

( 4.6). -

/

, .

, -

.

.

. -

/ , -

. -

, , ,

,

, -

. , -

.

4.2 (Bare Machine)

, 4.3, 4.4 4.5,

. -

-

.

,

. -

( 4.3).

9 74 . 2 ( B A R E M A C H I N E )

XPHTH

0

32 K

4.3

. -

,

. .

.

: .

, -

[6] (resident monitor) ( 4.3)

[7] (system calls)

. , (dedicated

systems),

.

[6] (interrupts) - . , I/O. I/O . I/O - , chip I/O. -, .

[7] (system calls) - (). . .

9 8 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

4.3 (Resident Monitor)

-

, ( )

( 4.4).

, , , .

, -

(..

, , , ..

/, , .. .).

-

. , bytes -

, bytes (

010 110 ,

) , bytes

. .

IAIKAIA

EOTH

K

(Fence Register)

0

M

E-1

4.4

Fortran Monitoring System 7094,

.

, CP/M.

4.3.1 (Protection Hardware)

(0 1). 1.

-

( ) , -

.

. 4.5. (-

)

(fence address).

, -

, . -

, .

(trap or interrupt)

( ). (

(.. This program has

performed an illegal operation and will be shut down) -

(memory dump) .

9 94 . 3 ( R E S I D E N T M O N I T O R )

> =~

A

MNHMHKME 4.5

-

-

.

,

, 995ns 980ns.

,

(effective access time).

, (monitor mode), -

.

,

1 0 0 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

, .

-

. -

(fixed constant). , 2116

(basic binary loader) 777008 777778 ( 32 bytes).

-

777008, .

, ,

,

, . -

,

. -

( ) -

. .. (buffer space)

(device drivers)[8]. ( -

) ,

,

. -

(transient monitor code),

.

( ).

, -

.

.

(special privilege instruction).

.

.

4.3.2 (Relocation)

. -

[8] (device drivers) /. .

0, ,

. -

.

. ,

(absolute code). -

. , , -

, . ,

(relocatable code). ,

. ,

. -

, , -

. ,

() , -

. ,

.

-

. -

PDP 11 4.6. -

, , -

.

-

.

1 0 1X X X

IAIKAIA

EOTH

0

64 K

K

4.6

1 0 2 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

CDC6600

.

(dynamic relocation) -

, 4.7.

(relocation or base register).

, -

. , 1400,

0 -

1400, 346 1746.

1400K B

+

17460346MNHMHKME

4.7

-

-

.

346, -

, , ,

346. (

) .

-

. (memory mapping hardware) -

.

, -

(moving)

.

, -

.

, , : -

( 0 max) ( R+0 R+max -

R).

0 max. ,

.

( )

. -

I/O.

. (logical address

space) .

4.4 (Swapping)

, .

: CTSS

Q32.

-

. ,

( -

) .

( 4.8).

1 0 34 . 4 ( S WA P P I N G )

XPO~IAIKAIA

EOTH

K

1

E M

E

2

4.8

-

4.4.1 (Backing Store)

. .

,

, -

. (ready queue) -

1 0 4 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

. -

. -

, (dispatcher).

, , (swaps out)

(swaps in) .

, -

, .

. -

.

4.4.2 (Swap Time)

-

.

34 .

2.

A 4.1

-

:

. , -

, ,

: CPU I/O

. , -

20 bytes -

(fixedhead drum) (average latency)

8ms (transfer rate) 250.000 bytes .

, 20 bytes :

8ms + (20K bytes / 250.000 bytes/sec) = 8ms + (2/25) sec

= 8 ms + (2000/25)ms

= 88ms

, -

176ms.

Q32 10ms

363.000 bytes/sec, -

130ms 20 bytes.

CPU,

. , .. round robin -

( 4.5) CPU (time

quantum) 0,176 . -

(transfer time).

. 32, -

12, 20. ,

4. 4 24ms

88ms 20. , -

-

. ,

. , -

(dynamic memory requirements)

(.. request memory / release memory), -

.

-

. , Large Storage (LCS)

IBM Extended Core Storage CDC. LCS

8ms 400.000 bytes/sec. 100ms

20. To ECS 3ms 10.000.000

bytres/sec. , 20K 4ms.

(.. mass core, mass semiconductor bubble ) -

. -

27 .

4.4.3 (Overlapped Swapping)

. -

4.9. -

. , CPU (idle) -

1 0 54 . 4 ( S WA P P I N G )

1 0 6 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

. ,

1 -

2.

X E

K

E

A 1

A 2

~

4.9

. ;

, -

: (buffer).

A 4.2

, CPU,

2 -

. , -

. , -

2 ,

4.10. ( )

2. ,

(memorytomemory swap).

1 0 74 . 4 ( S WA P P I N G )

K

E

A 1

A 2

~

4.10

-

-

;

:

1 () -

2. 2

( ) 1, -

CPU /

/ .

A 4.3

. ECS

, (memory cycles) -

CPU. , CPU -

ECS, CPU .

, CPU -

, .

CPU.

.

, . -

I/O . -

I/O,

. , , I/O,

, I/O, -

. I/O

I/O . 1

1 0 8 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

2, I/O -

.

: () I/O

(pending I/) () I/O -

. -

.

4.5 (Multiple Partitions)

(configuration) : -

CPU

.

; (regions)

(partitions), .

(..

).

, -

,

. , -

, , -

. ()

( ) (

,

). , , () -

.

, -

(scheduler)

, . -

. ,

II.

, -

.

(ROUND ROBIN)

O -

, -

. ,

(quantum), . -

, CPU -

.

, CPU .

(FIRST COMEFIRST SERVE FCFS)

/

. ,

, -

. -

, , -

CPU -

/.

4.5.1

:

, -

. ( 4.3.2).

( 4.10 4.11) -

. -

.

1 0 94 . 5 ( M U LT I P L E PA R T I T I O N S )

E

0

128 K

1

2

3

4

K

4.11

(bound registers).

(. = 174640). -

.

1 1 0 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

(base and limit registers). -

(range)

(.. = 100040 = 74600).

, 0 -

( + ).

4.12,

.

(assembly time). -

. -

, ,

. .

CDC 6600 .

> =NAINAI

OXI

MNHMHKME

K

=

d

p d'

4.33

GE 645

(Multics)

1 5 6 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

/ -

.

.

CPU, ,

. .

( , -

, , , ,

, ) . -

-

:

. -

, -

, -

(mapping tables)

.

(Performance). ,

.

(;)

. -

-

. , , ,

. -

-

.

(Fragmentation). , -

-

. -

.

(allocation units),

, . -

, -

, .

(Relocation). -

.

.

,

. -

, -

.

(Swapping). .

,

CPU,

.

.

(Sharing). -

-

. , ,

, ( -

) . -

,

.

(Protection). , -

,

, . -

, -

, ,

.

1 5 7 Y N O H

1 5 8 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

Randell [1969]. To

(fixed partitions)

IBM OS/360, . -

(variable partitions) IBM OS/360,

.

Knight [1968], Madnick and Donovan [1974, Section (3. 3)], Hoare and McKeage

[1972]. -

Atlas [Kilburn et al. 1961, 1962]. -

XDS 940, Lichtenberger and Pirtle [1965]

Lampson et al. [1966].

Knuth, The art of computer programming vol. 1: fundamental algorithms, 2nd edition

reading, MA: AddisonWesley, 1973.

Silberschatz et al., Oretating system concepts, 3rd edition reading, MA:

AddisonWesley, 1991.

Absolute addresses:

Address space:

Affective access time:

Bare machine:

Base register:

Basic binary loader:

Bind:

Buffer space:

Control card:

CPU scheduling: CPU

CPU utilization: CPU

Dedicated system:

Device driver:

Dispatcher:

Dynamic relocation:

Fence address:

Fetch:

Indexing:

Interrupt vector:

Job sequencing:

Linkage editor:

Literal addresses:

Loader:

Logical address space:

Memory dump:

Memory mapping hardware:

1 5 9

1 6 0 K E A A I O 4 : ( M E M O R Y M A N A G E M E N T )

Module:

Monitor mode:

Moving:

Operand:

Program counter:

Protection hardware:

Ready queue:

Relocatable addresses:

Relocatable code:

Relocation register:

Resident monitor:

Source program:

Special privilege instruction:

Store:

Stream: ,

Swap out:

Swap in:

Swap time:

System call:

Time quantum:

Transfer rate:

Transient monitor code:

Trap:

(Virtual Memory)

.

: ,

. , , -

, .

-

. -

. ,

.

-

(demand paging) ( 5.2)

.

,

, -

. -

, -

. ,

.

, :

-

.

.

. -

;

-

.

5

1 6 2 K E A A I O 5 : ( V I R T U A L M E M O R Y )

.

;

. ; -

; ;

. -

;

.

-

, -

.

-

. ;

Belady; ;

I/ -

.

.

;

( )

-

. -

.

. CPU

;

()

.

.

, -

( ) : -

, , , , -

, , , ,

.

FIFO (First In First Out)

LRU (Least Recently Used)

Adhoc

elady

1 6 3

1 6 4 K E A A I O 5 : ( V I R T U A L M E M O R Y )

K

I

:

5.1

5.2

5.3

5.4

5.5

5.6

5.7

5.8

5.9

5.1

. 4

,

,

,

0. -

:

( ) ( ) . -

: ,

() -

. : -

-

.

1 6 55 . 1

( 4) -

, , -

.

:

.

( ) ,

.

(array), (tables)

, .

100100, 1010. -

3000 ,

200 .

, , ,

.

,

.

A 5.1

1 6 6 K E A A I O 5 : ( V I R T U A L M E M O R Y )

.

. ()

(virtual address space), -

.

, -

, -

(utilization) (throughput) CPU,

(response time)

(turnaround time).

I/O

, .

, -

.

:

-

(overlaying) . , -

(.. ) -

( , -

).

: , ,

(,

.) .

5.2

(demand paging) -

( 5.2). .

, ,

: ( ) . , -

, , -

.

1 6 75 . 2

~

K~P

O E

1 2 10 K

2 K

5 K

14 K

~A

K M

~B

E~

E~

3210

111098

15141312

1916

23222120

7654

1817

5.1

-

2 -

5.2

-

-

;

1 6 8 K E A A I O 5 : ( V I R T U A L M E M O R Y )

,

, , ( bit -

: [ 5.3]).

M

2

1

0

5

4

3

8

7

6 C

11

10

9

14

13

12

16

15

ED

E M

C

F

BA

/ bitA

40

1

62

v

i

v

i3

4

95

6

i

v

i

i7

0~1~2~3~4~5~6~7

A

F

M

5.3

-

-

;

:

, , -

-

. ,

, -

.

A 5.2

1 6 95 . 2

, (page fault).

,

4, -

:

. , (

)

, -

. , , , -

CPU.

5.4

bit -

.

A 5.3

E

LoadM

1. H

4.

3. A

2. E~

5. ~

6. Reset~ Page~ Table

i

M

5.4

1 7 0 K E A A I O 5 : ( V I R T U A L M E M O R Y )

(,

.) , -

( ), -

,

.

() .

:

,

/ bit bits -

.

, .

( cache

memory). , , -

:

() -

(PCB) , -

. ,

.

() , -

.

() , (..

).

() ,

().

() ,

-

.

() -

(illegal address trap).

.

.

. .

.

(instruction fetch), -

. -

, , -

.

, ADD

, C. -

:

() (ADD).

() .

()

() .

() C.

C (

C ), -

, -

. ,

,

. , (

) .

-

. , MVC ( -

) 370, 256 bytes

( ) .

( ) ,

, . ,

, -

, .

,

. , -

.

, , .

1 7 15 . 2

1 7 2 K E A A I O 5 : ( V I R T U A L M E M O R Y )

,

,

.

. ,

. -

,

.

PDP11,

,

(autodecrement) (autoincrement).

-

, .

-

(operand address),

. , : MOV ((R2) +,(R3)) -

2

3. 2 ( ,

PDP11 bute ) -

, 3 ( ) -

.

3.

,

. PDP11/45

11/70 (SR1 Status Register 1)

-

.

.

, ,

-

.

: CPU

. ,

. , , -

(fatal error), -

-

.

5.3

-

. ,

(effective access time) .

(memory access time), ma, -

100ns 2s. -

, ma. , ,

, -

.

p (0 p 1). -

p ,

. :

= (1p)x ma + p x

, -

.

:

1. .

2. (-

).

3. .

4.

.

5. :

-

.

(device

seek / latency time)1.

1 7 35 . 3

[1] latency seek time . .

1 7 4 K E A A I O 5 : ( V I R T U A L M E M O R Y )

.

6. CPU (cpu sheduling).

7. ( I/O).

8. .

9. .

10. ,

.

11. CPU .

12. , -

.

. -

, 5 CPU -

I/O. CPU,

I/O .

-

:

.

.

.

, -

, .

100 1000ns. 9ms. ,

8ms latency 1ms

(tranfer time). (

), (seek time).

-

30ms. ,

(device service time).

( -

), (device queueing

time),

. , , .

-

. 1970

1msec 10msec, . 2000 100nsec 1000nsec -

.

, :

. ,

, ,

, .

1 7 55 . 3

1. : ,

, -

(

;), .

2. , -

p*N A

.

: ,

, . -

: p*N -

( ), , .

, p , .

10ms

1s :

= (1 p) x (1 s) + p x (10 ms)

= ((1 p) + 10000 x p s

= (1+9999 x p) s

(page fault rate).

, 11s. -

10 .

A 5.4

1 7 6 K E A A I O 5 : ( V I R T U A L M E M O R Y )

. , -

, .

10%;

:

1,10 > 1 + 9999 x p

0,10 > 9999 x p

p < 0,00001

,

, 100.000

.

A 5.5

/ 1sec. 2 -

. 90%

, . ,

, -

0,5sec.

20msec. -

1,2sec.

:

,

:

0,9 * 1sec + 0,1 * (1 + 0,5) sec

= (0,9 + 0,15) sec

= (1,05) sec

f . ,

A 5.6

5.4

, -

, , ,

, .