LOW VOLTAGE AND HIGH BANDWIDTH CLASS AB VOLTAGE FOLLOWER USING DTMOS AND SUPER

SOURCE FOLLOWER1Rashmi Pandey

Student, Dept. of Electronics and Communication

Engineering, IGDTUW, Kashmere Gate, Delhi-110006,

Indiaer.rashmi.ec@gmail.com

2Saumya PandeyStudent, Dept. of Electronics

and Communication Engineering, IGDTUW,

Kashmere Gate, Delhi-110006, India

3Dr. Jasdeep Kaur Dhanoa

Associate Professor, Dept. of Electronics and

Communication Engineering, IGDTUW, Kashmere Gate,

Delhi-110006, Indiajasdeepkaur@yahoo.com

ABSTRACTThis work presents the approach to enhance the bandwidth of Class AB voltage follower. This is based on utilizing body effect in a MOS transistor by connecting the gate and bulk terminals together for signal input. A low voltage class AB voltage follower is designed using 180nm CMOS technology. The proposed circuit is developed by using super source follower based on DTMOS and bulk-driven MOS and it is operating in subthreshold region at 0.2V of power supply and consumes only 18.2µW power. The proposed VF can operate at low voltage without undergoing any dc level shift between output and input terminals. The output impedence is reduced up to 9ohm at mid-band frequency and even lower at higher frequencies thus fulfilling requirement of low output impedence. Bandwidth of proposed voltage follower is increased upto 2.05GHz. The simulation results show that the output impedence of Class AB follower is reduced even at higher frequencies and the transition frequency is increased to 2.05GHz. Circuit is simulated using PSPICE 0.18µm technology and simulation results are attatched herewith.

KeywordsVoltage follower (VF), Class AB voltage follower (VF), super source follower, body effect, Dynamic Threshold MOS(DTMOS), bulk-driven MOS.

INTRODUCTIONThe demand for low power and low voltage devices due to increase in the digital integration and analog circuits within a single chip, has become a challenge in the research for analog designers. This trend of smaller size has forced most basic analog building blocks to be redesigned, so as to guarantee their performance same or even better than their operation for larger power supplies. This makes traditional circuit design to be replaced by new circuit design techniques. Various design techniques are being used by the circuit designers to maintain the tradeoff between the demand of small size, low voltage and low power circuits. In case of portable electronic devices, need for reduced voltage and power is even more immense. Voltage reduction is one of the most effective means of minimizing power consumption and

even without requiring any special circuits and techniques.Also bandwidth can be increased by utilising body effect of a MOS. The dynamic threshold MOS transistor (DTMOS), proposed in [1], is very suitable to be employed in circuits used in ultra low voltage conditions. In DTMOS, body terminal is shorted to the gate terminal making threshold voltage(VT), of MOS transistor a function of the gate input voltage. There is an increasing demand in the suitability of DTMOS for analog applications [2, 3]Voltage followers (VFs) are one of the useful basic building blocks in several mixed-signal ICs and analog devices. Generally, VFs are required to have their characteristics such as low harmonic distortion, large driving capability, large output voltage swing, large bandwidth, low output impedence and ability to operate at low supply voltage. VFs must have low output impedence to satisfy a wide bandwidth input signal. Various applications of Voltage Followers include filters, comparators, current-conveyors and operational transconductance amplifier (OTA). Some of the applications of voltage followers require low output impedence in order to ensure a unity gain or suppress voltage variations.So many Class-AB VFs have been proposed [4]-[7]. Class AB Voltage follower proposed in [7] is operating at 0.6V of supply voltage. This circuit use conventional CMOS to design Class AB voltage follower. This circuit gives power dissipation of 38µW. Bandwidth of this circuit is 155MHz and output impedence is 50Ω over mid-band frequency.In this work, Class AB voltage follower is operating in subthreshold region at 0.2V of bias voltage, in order to minimise the power consumption. Here, Conventional MOS are replaced by DTMOS to increase the bandwidth of voltage follower. Thus by utilising body effect of MOS the bandwidth is increased to 2.05GHz. Due to operation of VF in subthreshold region power consumption is 18.2µW. Output impedence of proposed VF is 9Ω in midband frequency and even lower at higher frequencies. Simulation results are in good agreement with the analytical predictions and so making proposed VF suitable for low frequency and high frequency applications.

1. DTMOS TECHNIQUEIn DTMOS technique, gate and body of transistor are connected together to overcome the difficulty of higher threshold voltage in several devices thus making it suitable for low voltage and low power applications. Bulk-driven technique is also an approach to reduce threshold voltage but it has higher input referred noise, lower gain bandwidth and poor frequency response as compared to conventional MOS[8].In this paper, our proposed circuit is based on utilising both bulk/body and gate terminals of a MOS transistor as signal input. Because of gate and body terminals shorted together, threshold voltage (VTH) of the transistor becomes function of input signal, as shown in fig. 1

Figure. 1 MOS transistor using dynamic body bias technique and its equivalent circuit

The junction of substrate source is forward biased by the input gate voltage and this causes body effect in MOSFET. Threshold voltage(VT) decreases in the ON state and it remains in its original high value for gate turned OFF so the threshold voltage can be dynamically changed as shown by the relation. This equation is written for NMOS transistor with long channel and drain induced barrier lowering (DIBL) neglected.

VTH = VT0 + γ(√ϕ0 + VSB - √ϕ0 ) (1)

where VTH is threshold voltage due to body effect i.e. due to applied VSB, VT0 is the threshold voltage when source to body voltage(VSB) is zero and mainly depends on the manufacturing process. γ is body effect coefficient, generally equal to 0.4V0.5 and it depends on the silicon permittivity, gate oxide capacitance, doping level and other parameters. ϕ0 is surface potential in strong inversion and is typically 0.6V. In DTMOS, VGS = VBS is maintained all the time and the same bias voltage is applied at gate and body terminals, that’s why source-body junction gets forward biased when input signal is increased. VT0 can be represented by,

VT0 = VFB + ϕ0 + γ (2)

Here VFB represents flat band voltage. In DTMOS, the potential in channel region is strongly controlled by the body and gate terminals, causing a high transconductance owing to faster current transport[2].Small signal equivalent circuit of DTMOS is shown in

fig. 2. Small signal equivalent circuit of DTMOS has two transconductances, the gate transconductance gm and body transconductance gmb.

Figure. 2 Small signal equivalent model of DTMOS in fig. 1

Relation b/w both transconductance of DTMOS is

gmb / gm = 𝜂 (3)

where η is the specific parameter and its value depends on bias conditions and on the technology used. DTMOS is implemented using triple well CMOS technology and so latch-up is absent. This method exhibits advantages over other body bias techniques in terms of higher transconductance-to-drain current ratio and elimination of additional circuitry for bias voltage generation[2].

2. SUPER SOURCE FOLLOWERSuper source follower is a simple structured circuitry in which output voltage follows the voltage at input terminal. It has 2 MOS transistor M1 and M2 such that M1 is PMOS and M2 is NMOS, as shown in fig. 3. In super source follower bias current of M1 transistor is determined by source current IB and is independent of output current, which results in constant gate to source voltage (VGS1) thus output voltage follows input voltage. Transistor M2 forms negative feedback loop, so reduces output impedence. Also M2 is responsible for driving load.The qualitative analysis of super source follower circuit shows that, when the input voltage is constant and the output voltage increases, the drain current of M1is also increased, resulting in increased gate-source voltage of M2 transistor. Voltage followers using Super source follower technique is proposed and modified[4,7]. It resulted in good performance such as low output impedance, good linearity and high bandwidth but it may also result in reducing output voltage swing.

Figure. 3 Super Source Follower circuit[9]

In this work, class AB voltage follower using super source follower circuit is proposed. This proposed circuit is operating in subthreshold region at 0.2V of bias voltage. It uses both bulk-driven and dynamic body biased MOS structure.

3. PREVIOUS VOLTAGE FOLLOWER CIRCUITIn previous voltage follower ckt, illustrated in fig. 4, is a low voltage class AB voltage follower based on super source follower technique. This circuit by Skawrat Wangtaphan and Varakorn Kasemsuwan is operating at 0.6V and bias current of 30µA.

Figure. 4 SSF based class AB voltage follower by S. Wangtaphan[7]

In this circuit, bulk driven technique is employed to transistor M1while quasi-floating gate is used for the transistor M2. This VF can operate at low voltage without DC level shift between the input and output terminals. Power dissipation of this circuit is found to be 38µW. The main advantages of this circuit is that the effective transconductance of the input transistor M1 increases and bias voltage at the input is decoupled from the input signal, allowing large input signal swing. Output impedence of circuit in fig. 4 is found to be 50Ω

over mid band frequency while the bandwidth is 155MHz.

4. PROPOSED CIRCUITIn the proposed circuit, shown in fig. 5, dynamic body bias technique is used in transistors M2, M3, M4 while transistor M1 is bulk-driven. Transistors M1 and M2 forms the super source follower circuit. This proposed class AB voltage follower is operating in subthreshold region of operation at 0.2 V dc.This circuit can operate at low voltage without undergoing any dc level shift between input and output node. Due to use of techniques such and dynamic body bias and bulk driven MOS, bandwidth of circuit is increased to 2.05GHz. And circuit dissipates only 18.2µW power.Super source follower technique increases the output voltage swing and and also decreases output impedence. Output impedence of proposed circuit is 9Ω in mid band frequency range and even lower at higher frequencies, thus making this voltage follower suitable to operate at lower as well as higher frequencies.

Figure. 5 Proposed DTMOS and SSF based class AB voltage follower

Proposed voltage follower in fig. 5, as shown, is similar to voltage follower in fig. 4 except quasi floating gate technique is removed and dynamic threshold MOS replaced conventional MOS transistors M2, M3, M4 while transistor M1 is bulk-driven.

5. SIMULATION RESULTSProposed VF in fig. 5 is simulated in 180nm CMOS technology from TSMC. This VF has been simulated at VDD = 0.2V and bias current = 30µA. Width and length of transistors in the circuit is given in table 1.

Table 1. W and L of various transistors

Fig. 6 shows the dc characteristic of input and output voltage, where it can be seen that output voltage closely follows input voltage in the region of operation. In the output node load of 5KΩ is connected in parallel to 50pF capacitance. The transient response of circuit is shown in fig. 7 which depicts that output signal traces the input signal in large range.

V6

-200mV -160mV -120mV -80mV -40mV 0V 40mV 80mV 120mV 160mV 200mVV6 V(5)

-250mV

0V

250mV

500mV

Figure. 6 DC characteristics of input and output voltage

Time

0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms 20msV(5) V(6)

-200mV

-100mV

-0mV

100mV

200mV

-250mV

Vout

Vinput

Figure. 7 Transient variation of input and output waveform

Frequency

10mHz 100mHz 1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHzV(5) / (IS(M1)+ID(M3)+ID(M2))

8.90

8.95

9.00

9.05

Figure. 8 Output Impedence of proposed circuit

Output impedence of the proposed circuit as obtained from simulation result is 9Ω in mid band frequency and even lower at higher frequencies. Ouput impedence characteristic is shown in fig. 8. Fig. 9 shows the ac analysis of voltage gain of proposed voltage follower. Bandwidth of 2.05GHz is obtained.

Frequency

1.0Hz 10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz 10MHz 100MHz 1.0GHz 10GHz 100GHzDB(V(5)/V(6))

-30

-20

-10

0

Figure. 9 Frequency response of proposed VF

Various parameters of proposed voltage follower are compared with voltage follower in fig. 4. Table 2 shows the comparison of both VF.

Table 2. Simulation result of proposed and previous VF

6. CONCLUSIONSSF based Voltage Follower operating at 0.2V dc voltage, using DTMOS, is realised using PSPICE software. CMOS 180nm technology is used to simulate the circuit. Proposed VF gives a high bandwidth of 2.05GHz and dissipate small power of 18.2µW.

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voltage MOSFET (DTMOS) for ultra low voltage VLSI”, IEEE Trans. on Electronic devices,Vol. 44, No.3, pp.414-417, 1997.

[2] Niranjan, V. et.al,, “Maximum bandwidth enhancement of current mirror using series-resistor and dynamic body bias technique”, Radioengineering, Vol.23, No.3, pp. 922-930, 2014

[3] Atilla Uygur, Hakan Kuntman, “An ultra low-voltage, Ultra Low Power DTMOS-Based CCII Design for Speech Processing Filters”Electrical and Electronics Engineering (ELECO), 2013 8th International Conference on , vol., no., pp.31,35, 28-30 Nov. 2013.

[4] Y. Haga and I. Kale, “Class-AB Rail-to-Rail CMOS Buffer with Bulk Driven Super Source Followers,” Proc. European Conf. Circuit. Theory and Design, Antalya, Turkey, pp. 695-698. 2009.

[5] J. Ramirez-Angulo, S. Gupta, R.G. Carvajal and A.J. Lopez-Martin, “New Improved CMOS Class AB Buffers Based on Differential Flipped Voltage Follower,” Proc. IEEE Int. Symp. In Circuits and Systems (ISCAS), pp. 3914-3917, 2006.

[6] A.J. Lopez-Martin, L. Acosta, C.G. Alberdi, R.G. Carvajal and J. Ramirez-Angulo, “Power-efficient analog design based on the class AB super source follower,” Int. J. Circ. Theor. Appl., 2011.

[7] Skawrat Wangtaphan and Varakorn Kasemsuwan “A 0.6 Volt Class-AB CMOS Voltage Follower with Bulk-Driven Quasi-Floating Gate Super Source Follower” IEEE, 2012

[8] KHATEB, F., DABBOUS, S. B. A., VLASSIS, S. A survey of non-conventional techniques or low-voltage low-power analog circuit design. Radio engineering, 2013, vol. 22, no. 2, p. 415–427

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