The Study of a Dual-Mode Ring Oscillator B90022/ > Accepted for publication in IEEE TCAS - II...

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Transcript of The Study of a Dual-Mode Ring Oscillator B90022/ > Accepted for publication in IEEE TCAS - II...

  • > Accepted for publication in IEEE TCAS - II <

    1

    Abstract—An analytical investigation of a dual-mode ring

    oscillator is presented. The ring oscillator is constructed in a CMOS 0.18-μm technology with differential 8-stage delay cells employing auxiliary input devices. With proper startup control, the oscillator operates in two different modes covering two different frequency bands. A nonlinear model along with linearization method is used to obtain the transient and steady-state behaviors of the dual-mode ring oscillator. The analytical derivations are verified through HSPICE simulation. The oscillator operates at the frequency bands from 2 ~ 5 GHz and from 0.1 ~ 2 GHz, respectively.

    Index Terms—Fractional-N frequency synthesizer, multiphase signals, ring oscillators, voltage-control oscillators (VCOs).

    I. INTRODUCTION ing oscillators are found in various of communication systems and clock generators. Compared with their

    LC-VCO counterparts, ring oscillators have the advantage of small size, highly integration, multiphase outputs, and wide oscillation range. Multiphase signals are required by communication systems, such as phase-array transceivers, clock data recovery circuits (CDR) and fractional-N frequency synthesizers (FNFS). In delta-sigma FNFS, multiphase ring oscillators are used to reduce quantization noise [1], thus allowing a wide loop bandwidth to achieve faster settling time and better immunity to VCO induced phase noise. In view of the demand for a large number of distinct phases, the number of delay stages must be large, which leads to lower oscillation frequency and poorer phase spacing resolution. Delay cells with auxiliary input devices are often employed to achieve high oscillation frequencies in long-chain ring oscillators [2]-[7]. Wide range oscillators are also demanded by communication systems that are intended to cover different standards at various frequency bands. In ring oscillators, wide oscillation range is achieved by tuning the tail current and loading resistance of each delay cell, or by dividing and mixing the output signal.

    Multiple oscillation modes are often found in ring oscillators which employ delay cells with auxiliary input devices [4][6]. Constraint for stable oscillation at the desired mode is

    This work was supported by National Science Council (NSC) under

    Contract 99-2220-E-002-023-. The authors are with the Department of Electrical Engineering and the

    Graduate Institute of Electronics Engineering, National Taiwan University, Taipei 106, Taiwan.

    Copyright (c) 2011 IEEE. Personal use of this material is permitted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs-permissions@ieee.org.

    explained in [6]. However, the characteristics of multi-mode ring oscillators remain unidentified. Motivated by these ambiguous multi-mode phenomena, in this brief, we provide a thorough analysis of multi-mode ring oscillators. A dual-mode 8-stage ring oscillator with delay cells utilizing auxiliary input devices is presented as an example. A startup circuit is proposed to control the dual-mode ring oscillator to operate in either the two modes. A nonlinear model of the ring oscillator is also introduced. The voltage-to-current transfer function of nonlinear devices is modeled with polynomial equations. Further, by applying linearization methods as addressed in [8][9], behaviors including the output phase relation, amplitude, oscillation frequency, and criterion of oscillation at either the two modes are given. Analytical expressions of the criterion of oscillation explain the conditions which provoke the ring oscillator to shift to different modes, and the situations for it to remain in one of the multiple modes. The analytical equations presented permit an accurate prediction of the ring oscillator and the results are verified by simulations.

    In section II, the generic concept of the dual-mode ring oscillator is presented. The startup circuit and its operation are also provided. In section III, a nonlinear model is used to describe the behavior, as well as the stability, of the two oscillation modes. In section IV, simulation results are presented to illustrate the validity of the derived analytical equations. A conclusion is then given in section V.

    V 4

    V 4b

    in+ aux+

    in- aux-

    V 1

    V 1b

    V 3

    V 3b

    in+ aux+

    in- aux-

    V 8b

    V 8

    V 2

    V 2b

    in+ aux+

    in- aux-

    V 7b

    V 7

    V 1

    V 1b

    in+ aux+

    in- aux-

    V 6b

    V 6

    V 5b

    V 5

    V 5b

    V 5

    V 6b

    V 6

    V 4b

    V 4

    V 7b

    V 7

    V 3b

    V 3

    V 8b

    V 8

    V 2b

    V 2

    in- aux-

    in+ aux+

    in- aux-

    in+ aux+

    in- aux-

    in+ aux+

    in- aux-

    in+ aux+

    V 1

    Fig. 1 Dual-mode ring oscillator.

    II. DELAY CELL WITH AUXILIARY INPUT DEVICES Figure 1 shows the diagram of the presented dual-mode ring

    oscillator. The topology is chosen because it achieves two oscillation modes, one of high oscillation frequency and the other of low oscillation frequency. Moreover, as will be explained later, both modes retain 16 distinct output phases. Differential delay cells are used for greater common-mode noise rejection. The schematic of each delay cell is depicted in Fig. 2(a). Each delay cell is constructed with a pair of main input devices M1,2 and a pair of auxiliary input devices M3,4 that

    The Study of a Dual-Mode Ring Oscillator Zuow-Zun Chen and Tai-Cheng Lee, Member, IEEE

    R

  • > Accepted for publication in IEEE TCAS - II <

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    forms a secondary delay path. Furthermore, transistors M5,6 operate in the triode region and work as output resistive loads. The equivalent resistance can be adjusted through control signal vctl1. The sum of the two differential pair tail current II and IA is designed to be constant, Itotal = II + IA. In this brief, to ensure the dual-mode oscillation, a startup circuit is employed to control the tail current of main input devices and auxiliary input devices via vctl2, Fig. 2(b). The operation of the startup circuit is explained below.

    V aux

    V DD M 5 M 6

    M 1 M 2 V in

    M 3 M 4

    V ctl1 V out

    V b,in1 V b,in2

    V b,aux1 V b,aux2

    I I I A M 7

    M 8

    M 9

    M 10

    (a) V DD

    V ctl2

    I A + I I

    V b,in1

    V b,in2

    V bias

    V b,aux1 V b,aux2

    M c1

    M c3

    I A + I I M c2

    M c4 M c5M c6

    M c8M c7 (b)

    Fig. 2 (a) Schematic of delay cell. (b) Schematic of startup circuit. V in V out

    V aux g m,aux g m,aux

    g m,in g m,in

    (a)

    V aux V out

    V in

    g m,aux g m,aux

    g m,in g m,in (b)

    Fig. 3 Dual-delay-path ring oscillator. (a) Mode 1. (b) Mode 2.

    Mode 1: To ensure mode 1, vctl2 is at first set low. The bias current will mainly flow through main input devices M1,2. After the oscillator reaches steady-state oscillation at mode 1, vctl2 can then be brought to a higher value to activate the auxiliary pair and shift up the oscillation frequency. The half-circuit equivalent of the ring oscillator is shown in Fig. 3(a). The ring oscillator can be regarded as a main delay path formed with main input devices plus an additional delay path constructed by auxiliary input devices. gm,in and gm,aux represent the equivalent transconductance of the main input devices and auxiliary input devices, respectively. The equivalent output resistance and capacitance are also depicted in Fig. 3(a). Miller effect capacitances are ignored here for simplicity.

    Mode 2: To ensure mode 2, vctl2 is set high at first. The bias current will then flow mainly through auxiliary input devices M3,4. After the oscillator reaches stable oscillation at mode 2, vctl2 can be brought to a lower value to decrease the oscillation frequency. As shown in Fig. 3(b), the ring oscillator operating at mode 2 can also be regarded as a main delay path plus an

    additional delay path. However, in contrast to mode 1, now the auxiliary input devices form the main delay path, and the main input devices construct the additional delay path. Therefore, with aid of Fig. 3(b) the block diagram of Fig. 1 can be redrawn as Fig. 4 for mode 2 oscillation. The phase relation of the two modes is shown in Fig. 5. Although the order of the output phases is different, the number of distinct phases is the same, both contain 16 distinct phases. Nevertheless, different circuit topologies, such as number of stages, delay cell architecture, and interconnections affect the possible oscillation modes and output phase relations [6]. These characteristics can be determined through solving for the general solutions of the ring oscillator using small-signal linear approximation.

    V 8

    V 8b

    in+ aux+

    in- aux-

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    V 7b

    V 5

    V 5b

    in+ aux+

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    V 4b

    V 2

    V 2b

    in+ aux+

    in- aux-

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    V 1b

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    V 7

    in+ aux+

    in- aux-

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    V 6

    V 3

    V 3b

    V 3b

    V 3

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    V 6b

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    V 8b

    V 1b

    V 1

    V 5

    V 5b

    V 4b

    V 4

    V 2

    V 2b

    in- aux-

    in+ aux+