Suppression of Random Dopant-Induced Threshold Voltage Fluctuations in Sub-0.1m MOSFETs with Epitaxial and -Doped Channels A. Asenov and S. Saini, IEEE Trans. on Electron Devices, Aug 1999 Changhwan Shin Department of Electrical Engineering and Computer Sciences University of California, Berkeley, CA 94720 March 2, 2009 Outline Introduction MOSFET design to suppress the RDFs Summary
Bulk MOSFET and its scaling challenges Random Dopant Fluctuations (RDFs) MOSFET design to suppress the RDFs Adjusting the channel doping profile Summary Outline Introduction MOSFET design to suppress the RDFs Summary
Bulk MOSFET and its scaling challenges Random Dopant Fluctuations (RDFs) MOSFET design to suppress the RDFs Adjusting the channel doping profile Summary 3 Bulk-Si MOSFET Scaling Challenges
Lg Leakage drain current reduce Tox,eq and Xj gate current use high-k gate dielectric Tox Substrate Gate Source Drain XJ Leff Nsub Incommensurate gains in ION with scaling limited carrier mobilities strain Si to enhance meff parasitic resistance use metallic (silicide) source/drain extensions Performance variation Sources of Variability
Sub-wavelength lithography: Resolution enhancement techniques are costly and increase process sensitivity Statistical dopant fluctuations Atomistic effects become significant in nanoscale FETs SiO2 Gate Source Drain A. Brown et al., IEEE Trans. Nanotechnology, p. 195, 2002 A. Asenov, Symp. VLSI Tech. Dig., p. 86, 2007 Outline Introduction MOSFET design to suppress the RDFs Summary
Bulk MOSFET and its scaling challenges Random Dopant Fluctuations (RDFs) MOSFET design to suppress the RDFs Adjusting the channel doping profile Summary 6 Random Dopant Fluctuations (RDFs)
Intrinsic variation in MOSFET parameters Arising from the small number of discrete dopants and their random position in the channel depletion regions SiO2 Gate Source Drain A. Brown et al., IEEE Trans. Nanotechnology, p. 195, 2002 7 Outline Introduction MOSFET design to suppress the RDFs Summary
Bulk MOSFET and its scaling challenges Random Dopant Fluctuations (RDFs) MOSFET design to suppress the RDFs Adjusting the channel doping profile Summary 8 MOSFET designs to suppress RDFs
Radical solutions Un-doped channel MOSFET (UTB, FinFET, DG, gate-all-around) More demanding of technological modification Fluctuation-resistant architectures viaappropriate tailoring of the channel doping profile Thin, low doped layer in the channel Conventional Epitaxial Epitaxial w/ -doping 9 3D atomistic simulation results
Epitaxial MOSFET Vt is evaluated via 3D atomistic simulator Results Vt dramatically reduced for the first 10nm of epilayer Maximum depi should be considered with Tox, Xj, Leff Leff/depi > 5 Boron diffusion into epi-layer; tolerable up to 1017cm-3 Dependence of Vt on the back-doping; Screening effect The holes in the heavily doped region screen the charge of the discrete random acceptors in the thin depletion layer 10 3D atomistic simulation results
Epitaxial MOSFET with the delta doping Results If the -doping is only partially depleted (i.e. depi is deep enough, or screen effect is valid), the doping concentration NAb increase will result in Vt reduction. Additional degree of freedom in tailoring the threshold voltage Epitaxial Conventional Epitaxial w/ -doping 11 Outline Introduction MOSFET design to suppress the RDFs Summary
Bulk MOSFET and its scaling challenges Random Dopant Fluctuations (RDFs) MOSFET design to suppress the RDFs Adjusting the channel doping profile Summary 12 Summary Fundamental issue; RDFs in deep sub-micron MOSFET
3D statistical atomistic simulations to study RDFs Random dopant-induced threshold voltage fluctuationscan be significantly suppressed in MOSFETs with low- doped epitaxial channels. 13 Q & A Thank you for your attention!!! Questions?