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TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015
TPS22907 3.6-V, 1-A, 44-mΩ ON-Resistance Load Switch With Controlled Turnon1 Features 2 Applications1• Integrated P-Channel Load Switch • Battery-Powered Equipment• Low Input Voltage: 1.1 V to 3.6 V • Portable Industrial Equipment• ON-Resistance (Typical Values): • Portable Medical Equipment
• Portable Media Players– RON = 44 mΩ at VIN = 3.6 V• Point-of-Sale Terminal– RON = 50 mΩ at VIN = 2.5 V• GPS Devices– RON = 58 mΩ at VIN = 1.8 V• Digital Cameras– RON = 83 mΩ at VIN = 1.2 V• Portable Instrumentation• 1-A Maximum Continuous Switch Current• Smart Phones and Tablets• Maximum Quiescent Current (IQ) < 1 µA
• Maximum Shutdown Current (ISD) < 1 µA3 Description• Low Control Input Thresholds Enable Use of 1.2-The TPS22907 is a small, low RON load switch withV, 1.8-V, 2.5-V, and 3.3-V Logiccontrolled turnon. The device contains a P-channel
• Controlled Slew-Rate to Avoid Inrush Currents MOSFET that operates over an input voltage range of– tR = 25 µs at VIN = 3.6 V 1.1 V to 3.6 V. The switch is controlled by an on and
off input (ON), which can interface directly with low-– tR = 36 µs at VIN = 1.8 Vvoltage control signals.• ESD Performance Tested Per JESD 22The TPS22907 is available in a space-saving 4-– 3000-V Human Body Modelterminal WCSP with 0.5-mm pitch (YZT). The device(A114-B, Class II) is characterized for operation over the free-air
– 1000-V Charged-Device Model (C101) temperature range of –40°C to 85°C.• Ultra-Small 4-Terminal Wafer-Chip-Scale Package
Device Information(1)(WCSP)PART NUMBER PACKAGE BODY SIZE (NOM)– Nominal Dimensions Shown – See Addendum
TPS22907 DSBGA (4) 0.90 mm × 0.90 mmfor Details(1) For all available packages, see the orderable addendum at– 0.9 mm × 0.9 mm, 0.5-mm Pitch, 0.5-mm
the end of the data sheet.Height (YZT)
Typical Application
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015 www.ti.com
Table of Contents1 Features .................................................................. 1 8 Detailed Description ............................................ 11
8.1 Overview ................................................................. 112 Applications ........................................................... 18.2 Functional Block Diagram ....................................... 113 Description ............................................................. 18.3 Feature Description................................................. 114 Revision History..................................................... 28.4 Device Functional Modes........................................ 115 Pin Configuration and Functions ......................... 3
9 Application and Implementation ........................ 126 Specifications......................................................... 39.1 Application Information............................................ 126.1 Absolute Maximum Ratings ...................................... 39.2 Typical Application ................................................. 126.2 ESD Ratings.............................................................. 3
10 Power Supply Recommendations ..................... 146.3 Recommended Operating Conditions....................... 411 Layout................................................................... 146.4 Thermal Information .................................................. 4
11.1 Layout Guidelines ................................................. 146.5 Electrical Characteristics........................................... 411.2 Layout Example .................................................... 146.6 Switching Characteristics: VIN = 3.6 V ...................... 5
12 Device and Documentation Support ................. 156.7 Switching Characteristics: VIN = 1.8 V ...................... 512.1 Trademarks ........................................................... 156.8 Switching Characteristics: VIN = 1.1 V ...................... 512.2 Electrostatic Discharge Caution............................ 156.9 Typical DC Characteristics........................................ 612.3 Glossary ................................................................ 156.10 Typical AC Characteristics...................................... 8
13 Mechanical, Packaging, and Orderable7 Parameter Measurement Information ................ 10Information ........................................................... 15
4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (September 2013) to Revision B Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementationsection, Power Supply Recommendations section, Layout section, Device and Documentation Support section, andMechanical, Packaging, and Orderable Information section ................................................................................................. 3
Changes from Original (November 2009) to Revision A Page
• Changed Feature from: Ultra-Low ON-State Resistance to: Ultra-Low ON-State Resistance (RON) ..................................... 1• Changed the Feature for the Wafer-Chip-Scale Package...................................................................................................... 1• Changed Application from: Point Of Sales Terminal to: Point of Sale Terminal .................................................................... 1• Changed Application from: Smartphones to: Smartphones / Tablets .................................................................................... 1• Deleted the Ordering Information table .................................................................................................................................. 1• Changed the IIN Test Condition from: IOUT = 0 to IOUT = 0 mA................................................................................................ 4• Changed the IIN(OFF) Test Condition from: VON = GND to VON = 0 V ...................................................................................... 4• Changed the IIN(LEAKAGE) Test Condition from: VON = GND, VOUT = 0 to VON = 0 V, VOUT = 0 V............................................. 4• Changed Table 1, Device Feature List................................................................................................................................. 11
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B
1 2
A
B
2 1
A
TPS22907www.ti.com SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015
5 Pin Configuration and Functions
YZT PackageYZT Package4-Pin DSBGA4-Pin DSBGA(Laser Marking View)(Bump View)
Pin FunctionsPIN
I/O DESCRIPTIONNO. NAMEA1 VOUT O Switch outputA2 VIN I Switch input, bypass capacitor recommended for minimizing VIN dip. See Feature Description.B1 GND -— GroundB2 ON I Switch control input, active high. Do not leave floating.
6 Specifications
6.1 Absolute Maximum Ratingsover operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNITVIN Input voltage –0.3 4 VVOUT Output voltage –0.3 (VIN + 0.3) VVON Input voltage –0.3 4 VIMAX Maximum continuous switch current 1 A
Maximum pulsed current (100-µs pulse, 2% duty cycle), TA = –40°C toIPLS 2.7 A+85°CTJ Maximum junction temperature 125 °CTLEAD Maximum lead temperature (10-s soldering time) 300 °CTstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratingsonly, which do not imply functional operation of the device at these or any other conditions beyond those indicated under RecommendedOperating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD RatingsVALUE UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) ±3000V(ESD) Electrostatic discharge VCharged-device model (CDM), per JEDEC specification JESD22-C101, all ±1000
pins (2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating ConditionsMIN MAX UNIT
VIN Input voltage range 1.1 3.6 VVOUT Output voltage range VIN VVIH High-level input voltage, ON 0.85 3.6 VVIL Low-level input voltage, ON 0.4 VCIN Input capacitor 1 (1) μFTA Operating free-air temperature –40 85 °C
(1) See Application Information.
6.4 Thermal InformationTPS22907
THERMAL METRIC (1) (2) YZT (DSBGA) UNIT4 PINS
RθJA Junction-to-ambient thermal resistance 189.4RθJC(top) Junction-to-case(top) thermal resistance 1.9RθJB Junction-to-board thermal resistance 37.2
°C/WΨJT Junction-to-top characterization parameter 10.2ΨJB Junction-to-board characterization parameter 37RθJC(bot) Junction-to-case(bottom) thermal resistance —
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
6.5 Electrical CharacteristicsUnless otherwise noted, the specification applies over the operating ambient temperature -40°C ≤ TA ≤ 85°C and VIN = 1.1 Vto 3.6 V. Typical values are for VIN = 3.6 V and TA = 25°C.
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNITIQ Quiescent current IOUT = 0 mA, VIN = VON Full 0.07 1 µAISD Off supply current VON = 0 V, OUT = Open Full 0.05 1 µAIIN(LEAKAGE) Leakage current VON = 0 V, VOUT = 0 V Full 0.05 1 µA
25°C 44 60VIN = 3.6 V, IOUT = –200 mA
Full 6725°C 50 63
VIN = 2.5 V, IOUT = –200 mAFull 70
25°C 58 72RON ON-state resistance VIN = 1.8 V, IOUT = –200 mA mΩ
Full 8025°C 83 106
VIN = 1.2 V, IOUT = –200 mAFull 117
25°C 97 125VIN = 1.1 V, IOUT = –200 mA
Full 140ION ON input leakage current VON = 0 V to 3.6 V Full 0.005 1 µA
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6.6 Switching Characteristics: VIN = 3.6 VTA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITtON Turn-ON time RL = 500 Ω, CL = 0.1 μF 28 μstOFF Turn-OFF time RL = 500 Ω, CL = 0.1 μF 40 μstr VOUT rise time RL = 500 Ω, CL = 0.1 μF 25 μstf VOUT fall time RL = 500 Ω, CL = 0.1 μF 116 μs
6.7 Switching Characteristics: VIN = 1.8 VTA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITtON Turn-ON time RL = 500 Ω, CL = 0.1 μF 48 μstOFF Turn-OFF time RL = 500 Ω, CL = 0.1 μF 40 μstr VOUT rise time RL = 500 Ω, CL = 0.1 μF 36 μstf VOUT fall time RL = 500 Ω, CL = 0.1 μF 113 μs
6.8 Switching Characteristics: VIN = 1.1 VTA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITtON Turn-ON time RL = 500 Ω, CL = 0.1 μF 81 μstOFF Turn-OFF time RL = 500 Ω, CL = 0.1 μF 42 μstr VOUT rise time RL = 500 Ω, CL = 0.1 μF 57 μstf VOUT fall time RL = 500 Ω, CL = 0.1 μF 113 μs
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0.00
0.02
0.04
0.06
0.08
0.10
0.12
1 1.5 2 2.5 3 3.5 4
V IN - Input Voltage - V
I IN(o
ff)-
Off
Su
pp
lyC
urr
en
t-
µA
VON = 0 V
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
-40 -15 10 35 60 85
TA - Temperature - °C
I IN(O
FF
)-
Off
Su
pp
lyC
urr
en
t-
µA
V IN = 3.6 V
0.00
0.05
0.10
0.15
0.20
0.25
1 1.5 2 2.5 3 3.5 4
V IN - Input Voltage - V
I IN-
Qu
iescen
tC
urr
en
t-
µA
VON = V IN
IOUT = 0
0.00
0.05
0.10
0.15
0.20
0.25
0.30
-40 -15 10 35 60 85
TA - Temperature - °C
I IN-
Qu
iescen
tC
urr
en
t-
µA
V IN = 3.6 V
IOUT = 0
V IN = VON
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
1 1.5 2 2.5 3 3.5 4
V IN - Input Voltage - V
r ON
-O
N-S
tate
Resis
tan
ce
-W
TA = 25°CTA = -40°C
TA = 85°C
IOUT = -200 mAW
0
0.01
0.02
0.03
0.04
0.05
0.06
-40 -15 10 35 60 85
TA - Temperature - °C
r ON
-O
N-S
tate
Resis
tan
ce
-ð
V IN = 3.6 V
IOUT = 200 mA
W
TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015 www.ti.com
6.9 Typical DC Characteristics
Figure 1. ON-State Resistance vs. Input Voltage Figure 2. ON-State Resistance vs. Temperature
Figure 3. VIN Quiescent Current vs. Input Voltage Figure 4. VIN Quiescent Current vs. Temperature
Figure 5. VIN Off Supply Current vs. Input Voltage Figure 6. VIN OFF Supply Current vs. Temperature
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0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0 0.5 1 1.5 2
VON - ON Voltage - V
VO
UT-
Ou
tpu
tV
olt
ag
e-
V
V IN = 3.6 V
IOUT = 500 mA
TA = 85°C
TA = 25°C
TA = -40C
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
1 1.5 2 2.5 3 3.5 4
V IN - Input Voltage - V
I IN(l
ea
ka
ge
)-
Leakag
eC
urr
en
t-
µA
IOUT = 0
VON = 0
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
-40 -15 10 35 60 85
TA - Temperature - °C
I IN(l
ea
ka
ge
)-
Leakag
eC
urr
en
t-
µA
V IN = 3.6 V
IOUT = 0
VON = 0
TPS22907www.ti.com SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015
Typical DC Characteristics (continued)
Figure 7. VIN Leakage Current vs. Input Voltage Figure 8. VIN Leakage Current vs. Temperature
Figure 9. ON Input Threshold
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VON
IOUT
V = 3.6 V
C = 1 µF
C = 0.1 µF
R = 36
T = 25°C
IN
IN
L
L
A
W
VON
IOUT
V = 3.6 V
C = 1 µF
C = 0.1 µF
R = 36
T = 25°C
IN
IN
L
L
A
W
26.5
27.0
27.5
28.0
28.5
29.0
29.5
30.0
30.5
-40 -15 10 35 60 85
TA - Temperature - °C
t r-
Ris
eT
ime
-µs
V IN = 3.6 V
CL = 0.1 µF
RL = 500 W
106
108
110
112
114
116
118
120
122
-40 -15 10 35 60 85
TA - Temperature - °C
t f-
Fall
Tim
e-
µs
V IN = 3.6 V
CL = 0.1 µF
RL = 500 W
36.5
37.0
37.5
38.0
38.5
39.0
39.5
40.0
40.5
41.0
-40 -15 10 35 60 85
TA - Temperature - °C
t OF
F-
Off
Tim
e-
µs
V IN = 3.6 V
CL = 0.1 µF
RL = 500 W
0
5
10
15
20
25
30
35
40
-40 -15 10 35 60 85
TA - Temperature - °C
t ON
-O
nT
ime
-µs
V IN = 3.6 V
CL = 0.1 µF
RL = 500 W
TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015 www.ti.com
6.10 Typical AC Characteristics
Figure 10. OFF Time vs. Temperature Figure 11. ON Time vs. Temperature
Figure 12. Rise Time vs. Temperature Figure 13. Fall Time vs. Temperature
Figure 14. tON Response Figure 15. tOFF Response
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VON
IOUT V = 1.1 V
C = 1 µF
C = 10 µF
R = 11
T = 25°C
IN
IN
L
L
A
W
VON
IOUT
V = 1.1 V
C = 1 µF
C = 10 µF
R = 11
T = 25°C
IN
IN
L
L
A
W
VON
IOUT
V = 3.6 V
C = 1 µF
C = 10 µF
R = 36
T = 25°C
IN
IN
L
L
A
W
VON
IOUT
V = 3.6 V
C = 1 µF
C = 10 µF
R = 36
T = 25°C
IN
IN
L
L
A
W
VON
IOUT V = 1.1 V
C = 1 µF
C = 0.1 µF
R = 11
T = 25°C
IN
IN
L
L
A
W
VON
IOUT
V = 1.1 V
C = 1 µF
C = 0.1 µF
R = 11
T = 25°C
IN
IN
L
L
A
W
TPS22907www.ti.com SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015
Typical AC Characteristics (continued)
Figure 16. tON Response Figure 17. tOFF Response
Figure 18. tON Response Figure 19. tOFF Response
Figure 20. tON Response Figure 21. tOFF Response
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+
-
OFF
ON
TPS22907
VIN VOUT
RL
CL
TEST CIRCUIT
GND
(A)
GND
trtf
tON
tOFF
90% 90%
10% 10%
tON/tOFF WAVEFORMS
(A) Control signal rise and fall times are 100 ns.
VON
VOUT
VOUT
ON
GND
50% 50%
50% 50%
CIN = 1µF
TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015 www.ti.com
7 Parameter Measurement Information
Figure 22. Test Circuit and tON/tOFF Waveforms
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VIN
ON
VOUT
GND
Control Logic
A2
B2
B1
A1
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8 Detailed Description
8.1 OverviewThe TPS22907 is a single-channel, 1-A load switch in a small, space-saving DSBGA-4 package. This deviceimplements a P-channel MOSFET to provide a low ON-resistance for a low-voltage drop across the device. Acontrolled rise time is used in applications to limit the inrush current.
8.2 Functional Block Diagram
8.3 Feature Description
Table 1. Device Feature ListRON (Typical) SLEW RATE (Typical) MAXIMUM OUTPUTDEVICE ENABLEVIN = 1.8 V VIN = 1.8 V CURRENT
TPS22907 58 mΩ 36 μs 1 A Active high
8.3.1 On and Off ControlThe ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has alow threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standardGPIO logic threshold. It can be used with any microcontroller with 1.2-V, 1.8-V, 2.5-V, or 3.3-V GPIOs.
8.4 Device Functional Modes
Table 2. Function TableON (Control Input) VIN to VOUT
L OFFH ON
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Power Supply
OFF
ON
TPS22907
VIN VOUT
RL
CL
GND
ON
GND
CIN
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9 Application and Implementation
NOTEInformation in the following applications sections is not part of the TI componentspecification, and TI does not warrant its accuracy or completeness. TI’s customers areresponsible for determining suitability of components for their purposes. Customers shouldvalidate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Input CapacitorTo limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into adischarged load capacitor, a capacitor needs to be placed between VIN and GND. A 1-μF ceramic capacitor, CIN,place close to the pins is usually sufficient. Higher values of CIN can be use to further reduce the voltage dropduring high-current application. When switching heavy loads, TI recommends having an input capacitorapproximately ten times higher than the output capacitor to avoid excessive voltage drop.
9.1.2 Output CapacitorDue to the integrated body diode in the PMOS switch, a CIN greater than CL is highly recommended. A CLgreater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in currentflow through the body diode from VOUT to VIN. A CIN to CL ratio of at least 10 to 1 is recommended for minimizingVIN dip caused by inrush currents during startup; however, a 10 to 1 ratio for capacitance is not required forproper functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more VIN dipat turnon due to inrush currents.
9.2 Typical Application
Figure 23. Typical Application Schematic
9.2.1 Design RequirementsTable 3 lists the design requirements for the device.
Table 3. Design ParametersDESIGN PARAMETER EXAMPLE VALUE
VIN 3.6 VCL 4.7 µF
Load current 1 AAmbient Temperature 25 °C
Maximum inrush current 750 mA
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OUTINRUSH L
dVI C
dt= ´
TPS22907www.ti.com SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015
9.2.2 Detailed Design Procedure
9.2.2.1 Managing Inrush CurrentWhen the switch is enabled, the output capacitors must be charged up from 0 V to the set value (3.6 V in thisexample). This charge arrives in the form of inrush current. Inrush current can be calculated using the followingequation:
where:• CL = Output capacitance• dVOUT = Output voltage• dt = Rise time (1)
The TPS22907 offers a controlled rise time for minimizing inrush current. This device can be selected basedupon the minimum acceptable rise time which can be calculated using the design requirements and the inrushcurrent equation. An output capacitance of 4.7 µF will be used because the amount of inrush current increaseswith output capacitance:
750 mA = 4.7 µF × 3.6 V / dt
where• dt = 22.56 µs (2)
To ensure an inrush current of less than 750 mA, a device with a rise time greater than 22.56 µs must be used.The TPS22907 has a typical rise time of 25 µs at 3.6 V which meets the above design requirements.
9.2.2.2 Voltage Drop from VIN to VOUT
The voltage drop from VIN to VOUT is determined by the ON-resistance of the device and the load current. RONcan be found in Electrical Characteristics and is dependent on temperature. When the value of RON is found, thefollowing equation can be used to calculate the voltage drop across the device:
ΔV = ILOAD × RON
where:• ΔV = Voltage drop across the device• ILOAD = Load current• RON = ON-resistance of the device (3)
At VIN = 3.6 V, the TPS22907 has an RON value of 44 mΩ. Using this value and the defined load current, theabove equation can be evaluated:
ΔV = 1 A × 44 mΩ (4)ΔV = 44 mV
Therefore, the voltage drop across the device will be 44 mV.
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CL (PF)
Inru
sh C
urre
nt (
mA
)
0 1 2 3 4 5 6 7 8 9 100
200
400
600
800
1000
1200
1400
1600
A001
VIN = 3.6VVIN = 1.8VVIN = 1.1V
TPS22907SLVSA44B –NOVEMBER 2009–REVISED FEBRUARY 2015 www.ti.com
9.2.3 Application CurveFigure 24 shows the inrush current expected for different load capacitances at varying VIN voltages.
Figure 24. Expected Inrush Current vs Load Capacitance
10 Power Supply RecommendationsThe device is designed to operate with a VIN voltage range of 1.1 V to 3.6 V. The power supply should be wellregulated and placed as close to the device terminals as possible. It must be able to withstand all transient andload current steps. In most situations, using the minimum recommended input capacitance of 1 uF is sufficient toprevent the supply voltage from dipping when the switch is turned on. In cases where the power supply is slowto respond to a large transient current or large load current step, additional bulk capacitance may be required onthe input.
11 Layout
11.1 Layout GuidelinesFor best performance, VIN and VOUT traces should be as short and wide as possible to help minimize theparasitic electrical effects. To be most effective, the input and output capacitors should be placed close to thedevice to minimize the effects that parasitic trace inductances may have on normal operation.
11.2 Layout Example
Figure 25. Example Layout for the TPS2290714 Submit Documentation Feedback Copyright © 2009–2015, Texas Instruments Incorporated
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12 Device and Documentation Support
12.1 TrademarksAll trademarks are the property of their respective owners.
12.2 Electrostatic Discharge CautionThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
12.3 GlossarySLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable InformationThe following pages include mechanical, packaging, and orderable information. This information is the mostcurrent data available for the designated devices. This data is subject to change without notice and revision ofthis document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com 7-Jun-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status(1)
Package Type PackageDrawing
Pins PackageQty
Eco Plan(2)
Lead/Ball Finish(6)
MSL Peak Temp(3)
Op Temp (°C) Device Marking(4/5)
Samples
TPS22907YZTR NRND DSBGA YZT 4 3000 Green (RoHS& no Sb/Br)
SNAGCU Level-1-260C-UNLIM -40 to 85 5K(F ~ G)
TPS22907YZTT NRND DSBGA YZT 4 250 Green (RoHS& no Sb/Br)
SNAGCU Level-1-260C-UNLIM -40 to 85 5K(F ~ G)
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substancedo not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI mayreference these types of products as "Pb-Free".RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide basedflame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 7-Jun-2017
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device PackageType
PackageDrawing
Pins SPQ ReelDiameter
(mm)
ReelWidth
W1 (mm)
A0(mm)
B0(mm)
K0(mm)
P1(mm)
W(mm)
Pin1Quadrant
TPS22907YZTR DSBGA YZT 4 3000 178.0 9.2 1.0 1.0 0.73 4.0 8.0 Q1
TPS22907YZTT DSBGA YZT 4 250 178.0 9.2 1.0 1.0 0.73 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Feb-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS22907YZTR DSBGA YZT 4 3000 220.0 220.0 35.0
TPS22907YZTT DSBGA YZT 4 250 220.0 220.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 24-Feb-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C0.625 MAX
0.190.15
0.5TYP
0.5TYP
4X 0.250.21
B E A
D
4219477/A 05/2017
DSBGA - 0.625 mm max heightYZT0004DIE SIZE BALL GRID ARRAY
NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.2. This drawing is subject to change without notice.
BALL A1CORNER
SEATING PLANE
BALL TYP0.05 C
A
1 2
0.015 C A B
BSYMM
SYMM
SCALE 10.000
D: Max =
E: Max =
0.918 mm, Min =
0.918 mm, Min =
0.858 mm
0.858 mm
www.ti.com
EXAMPLE BOARD LAYOUT
4X ( 0.23)
(0.5) TYP
(0.5) TYP
( 0.23)METAL
0.05 MAX
SOLDER MASKOPENING
METALUNDERMASK
( 0.23)SOLDER MASKOPENING
0.05 MIN
4219477/A 05/2017
DSBGA - 0.625 mm max heightYZT0004DIE SIZE BALL GRID ARRAY
NOTES: (continued) 3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
SOLDER MASK DETAILSNOT TO SCALE
1
SYMM
SYMM
LAND PATTERN EXAMPLEEXPOSED METAL SHOWN
SCALE:50X
2
A
B
NON-SOLDER MASKDEFINED
(PREFERRED)
EXPOSEDMETAL
SOLDER MASKDEFINED
EXPOSEDMETAL
www.ti.com
EXAMPLE STENCIL DESIGN
(0.5)TYP
(0.5) TYP
4X ( 0.25) (R0.05) TYP
METALTYP
4219477/A 05/2017
DSBGA - 0.625 mm max heightYZT0004DIE SIZE BALL GRID ARRAY
NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
1 2
A
B
SYMM
SYMM
SOLDER PASTE EXAMPLEBASED ON 0.1 mm THICK STENCIL
SCALE:50X
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