Quick Review - Penn Engineeringese319/Lecture_Notes/... · ESE319 Introduction to Microelectronics...

ESE319 Introduction to Microelectronics

12008 Kenneth R. Laker updated 02Nov10 KRL

Quick ReviewIf R

C1 = R

C2 and Q1 = Q2, what is the

value of VO-dm

?

Let Q1 = Q2 and RC1

≠ RC2

s.t. RC1

= R

C2, express R

C1 & R

C2 in terms R

C

and ΔRC.

If VO-dm

is the differential output offset voltage, what is V

OS?



Quick Review

-VOS

0

V OS=V O−dm

Av−dm

∣V OS∣=∣V O−dm

Av−dm ∣Av−dm=g m RC



Quick Review

V OS RC =V T

RC

RC

V OS I S =V T

I S

I S

V OS rms =V OS−RC2V OS− I S

2=V T RC

RC 2

I S

I S 2

I OS = I B

Input Referred Offset Voltages Input Offset Current

Total Input Referred Offset Voltage



Quick Review - Summary1. DC offset voltage and current occur due to mismatches in the BJT differential amplifier external resistors and transistor parameters (I

s and β).

2. They are imperfections that are inherent to all differential amplifiers and their applications (e.g. op amps).

3. DC offset voltage and current are statistical quantities, i.e. no two differential amplifiers will have the same offset voltage and current.

4. MOS differential amplifiers have zero offset current.



Differential Amplifier with Active Loads

● Active load basics● PNP BJT current mirror● Small signal model● Design example and simulation● Comparison of CMRR with resistive load design



Differential Amp – Active Loads Basics 1

Rc1 Rc2

Rb1 Rb2

Rref

Vee

VccIref

Vcg1Vcg2

Rref1

Rref2

Iref1

Iref2

-Vee

Vcc

Q1

Q3 Q4

Q5 Q6 Q7

Vc1

Q2

Vc2

Vi1 Vi2

RC1⇒ ro6

RC2⇒ r o7

PROBLEM: Op. Pt. VC1

, VC2

very sensitive to mismatch I

ref1 ≠ I

ref2.

+

+ +

+

ro=V A

I C≫RC




IC2

, IC7

VBE2

VCE2

VCE2

VCE2

VBE2

slope = -1/RC2 slope = -1/r

o7

IC2

VCC

VCC




PROBLEM: Op. Pt. VC1

, VC2

very sensitive to mismatch I

ref1 ≠ I

ref2.

SOLUTION: all currents referenced to I

ref1. Op. Pt. sensitivity eliminated.

COST: output single-ended only. GOOD NEWS: CMRR is much improved over resistive-load differential amp single-ended CMRR.

Vc1 Vc2 Vc2Vc1



NOTES

A pnp current mirror (source) is an effective active load for an npn CE stage.

As we will later see, the collector resistance equals the parallel combination of output resistances of the mirror stage and the gain stage BJTs.

An npn current mirror stage (sink) is also an effective active load for an npn emitter-follower (CC) stage.



Quick Review - PNP BJT

I

IE

IC

IB

Note reference currentdirections!

Voltage bias equations:

I E=V CC−V EBV B

RE

I≈I E

10

I E=V CC−V B−0.7

RE

0.7 V

VB

R1

R2

RE

RC

V B≈ I R2=R2

R1R2V CC




iE

iC

iB

Usual Large signal equations:

iC=I S ev EB

V T

iB=iC

iE=iCiB=1

iC

iC= iE

R1

R2

RE

RC

iC=I S evBE

V T npn



Quick Review - PNP – Small Signal Model

ib

ie

ic

ib

ie

ic




Quick Review

What is accomplished by the progression differential amplifier circuits from 1. to 2. above?

What is accomplished by the progression differential amplifier circuits from 2. to 3. above?

Is circuit 3. a perfect replacement for circuit 1.?

1. 2. 3.

Iref1/2

Iref1/2

?



PNP Mirror

I

I=V CC−0.7

RREF

Q1 = Q2: gm1

= gm2

= gmp

;Small signal model:

i x=veb

r pgmp veb= 1

r pgmp veb

i x= gmp

pg mpveb=p1

p gmp veb=veb

rep

I

Q1 Q2

veb

ix

B1 C1

E1

B2

E2

C2

Current ix into the emitter of Q1:

re1

E1 E2

B1 C1 B2 C2

V CC=V EB1 I RREFr p=

p

gmb

rep=r p

p1

recall

rπp ropgmpveb gmpvebrπp

rop

ropgmpveb1rop rπp

rep

RREF

vEB2=v EB1

re1

= re2

= rep

; rπ1

= rπ2

= rπp

; β

1 = β

2 = β

p



Simplified Mid-band DM Small Signal Model

NOTE:1. Due to imbalance created by active load current mirror, only single-ended output is available from common collector of Q2 and Q4.2. Q3, Q4 emitter symmetry creates virtual ground at amplifier emitter connection.

Q1 Q2

Q3 Q4

vi-dm/2

vi-dm/2

VEE

VCC

I ieie

Q3 = Q4

vc4-dm

vc4-dm is single-ended output.

vi-dm/2 vi-dm/2

B3 C3

E3 E4

B4C4B1=C1

E1

B2 C2

E2

virtual groundv

e = 0, i = 0

i

vdm/2 vdm/2

vc4-dm

ie ie

Q1 = Q2

gmpveb1

gmnvi-dm/2

gmnvi-dm/2

rπn

rep||rop rπp rop

ron rπn

ron

vbe2 = veb1

ro

ve



Simplified DM Small Signal Model cont.

B3

E3

B4

E4

E1 E2

C3=B1=C1=B2 C4C2

vi-dm/2 vi-dm/2

virtual ground

rep∥rop∥r p∥r op≈ rep

vdm/2 vdm/2

combining parallel resistances to ground

Matched NPN: Q3 = Q4g m3=gm4=g mn

ro3=r o4=ron

Matched PNP Q1 = Q2gm1=gm2=gmp

ro1=r o2=r op

r1=r 2=r p

r3=r4=rn

re3=r e4=r en

re1=r e2=rep

gmpveb1

gmnvi-dm/2

gmnvi-dm/2

vc4-dm

rep

rπn rπnron

rop

vc4-dm

rep∥rop∥r p∥rop≈rep

From previous slide

vi-dm/2



Simplified DM Small Signal Model - cont.

veb1≈gmnvi−dm

2rep

Matched NPN & PNP transistors have beenassumed throughout.

ic2=g mp veb1=g mpgmnv i−dm

2r ep

where: rep= p1 p

1gmp

≈ 1gmp

ic2≈gmnvi−dm

2

vi-dm

/2 vi-dm

/2vdm/2 vdm/2

B1C2

C4

ic2

E1 E2

B3 B4

E3 E4 hence:

virtual ground

ic4

Determine ic2

and ic4

:

ic4=gmnvi−dm

2by inspection:

⇒ ic2≈ic4

gmp

veb1

Matched NPN: Q3 = Q4Matched PNP: Q1 = Q2

rep

gmn vi−dm /2

gmn vi−dm /2

vc4−dm

rop

ronrn

rn

From previous slide:

rep∥rop∥r op∥r p≈r ep

1

1

2

3

2

3



Simplified DM Small Signal Model - cont.

ic2≈gmn

v i−dm

2=ic4

vc4−dm=g mn Ro vi−dm

Av−dm4=vc4−dm

v i−dm=gmn rop∥ron

Ro=rop∥ron≠ ro∥ro=ro

2

Av−cm4=vc4−cm

v i−cm=−

r op

p roalso

Matched NPN: Q3 = Q4Matched PNP: Q1 = Q2

From previous slide:

Note that the resistors rop(PNP) & ron (NPN) are in parallel, and driven by two nearly equal parallel VCCSs.

vc4−dm=ic2ic4Ro=2 g mnv i−dm

2Rogmn vi−dm /2

gmn vi−dm /2

repvc4−dm

ro = bias current source output resistance



Quick Review



C2=C4

E1=E3

gmp

veb1

ic2

ron∥rop

gmn

vi-dm

/2

B4B1=C1=B2=C3

B3

E2=E4

veb1≈g mnvi−dm

2rep g mp veb1=gmpgmn

vi−dm

2rep=gmn

vi−dm

2

vc4−dm=gmp veb1gmnvi−dm

2ron∥rop=gmn vi−dm r on∥r op

Av−dm4=vc4−dm

v i−dm=gmn rop∥ron

Av−cm4=vc4−cm

vi−cm=−

rop

p r oNext show: where r

o = I output resistance

Quick Review

veb1



vi−cm=r n

1ie2 r o ie≈2 r o ie

veb1=r p∥rep ie=r p∥rep vi−cm

2 r o

vi-cm

B3 C3

E3 E4

B4C4B1=C1 = B2

E1 = E2

B2 C2

i = 2ie ro

ve

vcm vcm

vo-cm

ie ie

n ib n ib

ic4

ic4≈ie≈vi−cm

2 r o

Matched NPN: Q3 = Q4 Matched PNP: Q1 = Q2

gmpveb1

vo−cm=r opgmp veb1−ic4=r op

2 rogmp r p∥rep−1v i−cm

veb1

ie gmp veb1−ic4

Simplified Mid-band CM Small Signal Model

vi-cm

rn rnron ron

rop

ie≈vi−cm

2 ro

(ren

, rπn

, gmn

, βn) (r

ep, r

πp, g

mp, β

p)

r p∥rep



=> Av−cm4=−rop

2 pro≈−

r op

p r o

From previous slide

gmpveb1

r ep rnic4≈ie≈

vi−cm

2 r oron

rop

vi-cm vi-cm

vc4-cm

ro

n ib n ib

ieie

ic4

ve

ii

r ep

ic4≈ie≈vi−cm

2 r o

Simplified CM Small Signal Model - cont.

r b∥r ep=rep rep 1 p

reprep 1p=

r ep1 p2p

vc4−cm=rop g mp veb1−ic4=rop

2 rog mp r p∥rep−1v i−cm

.=r op

2 ro

−22 p

≈rop

2 ro

−2p

gmp= p

r p=

p

1 p

1r ep

gmp r b∥rep=p

1p

1rep

rep 1p2p

Av−cm=vc4−cm

v i−cm=

rop

2 rogmp r p∥rep−1=

rop

2 ro

p

2 p−1



DM Diff Amp 2N3906 PNP Active Loads

vi-dm

vc2-dm

Av−dm2=vo−dm

v i−dm=gm ro2∥ro8

Av-dm2(dB) = 55.5 dB @ 1 kHz = 52.5 dB @ 1.43 MHz

Design: set R3 for IREF = 10 mA

R3=23.3V10 mA

=2.33 k

IREF

Matched NPN: Q1 = Q2 = Q3 = Q4

Matched PNP: Q7 = Q8



CM Diff Amp 2N3906 PNP Active Loads

Av−cm2=vc2−cm

v i−cm

vi-cm

vc2-cm

Av-cm2(dB) = -79.9 dB @ 1 kHz = -76.9 dB @ 0.54 MHzAv-dm2(dB) = 55.5 dB @ 1 kHz

CMRR=20 log10 ∣Av−dm2∣∣Av−cm2∣

.=Av−dm2 dB −Av−cm2dB

= 135.4 dB @ 1 k HzMatched NPN: Q1 = Q2

= Q3 = Q4Matched PNP: Q7 = Q8



Sanity Check: VRc2

= (56 kΩ) (5 mA) = 28 V !

Iref

= 10 mA

Hence, for resistive load RC = 56 kΩ, I

ref << 10 mA



CMRR Comparison cont.

vc2

vi-dm/2

CMRR = 80 dB @ 1 kHz

v-dm/2 v-dm/2

vc2

CMRR = 135 dB @ 1 kHz

vi-dm/2vi-cm

vi-dm/2 vi-dm/2vi-cm

2.33k Ohm

I ref=10 mA

Av-cm2(dB) = -80 dB @ 1 kHzAv−cm2 dB =20 log10

RC

2 ro=−25 dB @1 kHz

56k Ohm56k Ohm

Av−dm2 dB=20 log10RC

RE=55 dB @1 k Hz

ro=500 k Av-dm2(dB) = 55 dB @ 1 kHz

RC RC

RE RE

I ref =0.2 mA

Rref

56kΩ 56kΩ

100Ω 100Ω

233kΩ

Sanity Check: VRc

= (56 kΩ) (0.1 mA) = 5.6 V !



Summary

Active load advantages:1. Minimizes number of passive elements needed.2. Can produce very high gain in one stage.3. Much larger single-ended CMRR then single-ended

CMRR for resistive load differential amplifier.3. Inherent differential-to-single-ended conversion.

Active load disadvantages:1. No differential output available.

Quick Review - Penn Engineeringese319/Lecture_Notes/... · ESE319 Introduction to Microelectronics...

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