N-channel 800 V, 0.80 typ., 4.5 A Zener-protected .DocID024079 Rev 3 5/17 STL8N80K5 Electrical...

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Transcript of N-channel 800 V, 0.80 typ., 4.5 A Zener-protected .DocID024079 Rev 3 5/17 STL8N80K5 Electrical...

  • This is information on a product in full production.

    November 2013 DocID024079 Rev 3 1/17

    17

    STL8N80K5

    N-channel 800 V, 0.80 typ., 4.5 A Zener-protected SuperMESH 5 Power MOSFET in a PowerFLAT 5x6 VHV package

    Datasheet production data

    Figure 1. Internal schematic diagram

    Features

    Outstanding RDS(on)*area Worldwide best FOM (figure of merit) Ultra low gate charge 100% avalanche tested Zener protected

    Applications Switching applications

    DescriptionThis N-channel Zener-protected Power MOSFET is designed using ST's revolutionary avalanche-rugged very high voltage SuperMESH 5 technology, based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance, and ultra-low gate charge for applications which require superior power density and high efficiency.

    AM15540v1

    5678

    1 2 3 4

    Top View

    D(5, 6, 7, 8)

    G(4)

    S(1, 2, 3)

    PowerFLAT 5x6 VHV

    12

    34

    Order code VDS RDS(on)max. ID

    STL8N80K5 800 V 0.95 4.5 A

    Table 1. Device summary

    Order code Marking Package Packaging

    STL8N80K5 8N80K5 PowerFLAT 5x6 VHV Tape and reel

    www.st.com

    http://www.st.com

  • Contents STL8N80K5

    2/17 DocID024079 Rev 3

    Contents

    1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

    2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

    2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

    3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

    4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

    5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

    6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

  • DocID024079 Rev 3 3/17

    STL8N80K5 Electrical ratings

    1 Electrical ratings

    Table 2. Absolute maximum ratings

    Symbol Parameter Value Unit

    VGS Gate-source voltage 30 V

    ID (1)

    1. The value is rated according to Rthj-case and limited by package.

    Drain current (continuous) at TC = 25 C 4.5 A

    ID (1) Drain current (continuous) at TC = 100 C 3 A

    IDM (1),(2)

    2. Pulse width limited by safe operating area.

    Drain current (pulsed) 18 A

    PTOT(1) Total dissipation at TC = 25 C 42 W

    IAR(3)

    3. Pulse width limited by Tjmax

    Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max)

    2 A

    EAS(4)

    4. Starting Tj=25 C, ID=IAR, VDD=50 V

    Single pulse avalanche energy(starting Tj = 25 C, ID = IAR, VDD = 50 V)

    114 mJ

    dv/dt (5)

    5. ISD 4.5 A, di/dt 100 A/s, VDS(peak) V(BR)DSS

    Peak diode recovery voltage slope 4.5 V/ns

    dv/dt (6)

    6. VDS 640 V

    MOSFET dv/dt ruggedness 50 V/ns

    Tstg Storage temperature- 55 to 150

    C

    Tj Max. operating junction temperature C

    Table 3. Thermal data

    Symbol Parameter Value Unit

    Rthj-case Thermal resistance junction-case max 3 C/W

    Rthj-amb(1)

    1. When mounted on 1inch FR-4 board, 2 oz Cu.

    Thermal resistance junction-amb max 59 C/W

  • Electrical characteristics STL8N80K5

    4/17 DocID024079 Rev 3

    2 Electrical characteristics

    (TC = 25 C unless otherwise specified)

    Table 4. On /off states

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    V(BR)DSS

    Drain-source breakdown voltage (VGS = 0)

    ID = 1 mA 800 V

    IDSSZero gate voltage

    drain current (VGS = 0)

    VDS = 800 V 1 A

    VDS = 800 V, TC=125 C 50 A

    IGSSGate-body leakagecurrent (VDS = 0)

    VGS = 20 V 10 A

    VGS(th) Gate threshold voltage VDS = VGS, ID = 100 A 3 4 5 V

    RDS(on)Static drain-source on- resistance

    VGS = 10 V, ID = 3 A 0.80 0.95

    Table 5. Dynamic

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    Ciss Input capacitance

    VDS = 100 V, f = 1 MHz,

    VGS = 0

    - 450 - pF

    Coss Output capacitance - 50 - pF

    Crss Reverse transfer capacitance - 1 - pF

    Co(tr)(1)

    1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS

    Equivalent capacitance time related

    VDS = 0 to 640 V, VGS = 0

    - 57 - pF

    Co(er)(2)

    2. Coss eq. energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS

    Equivalent capacitance energy related

    - 24 - pF

    RGIntrinsic gate resistance

    f = 1 MHz, ID=0 - 6 -

    Qg Total gate charge VDD = 640 V, ID = 6 A,

    VGS = 10 V(see Figure 16)

    - 16.5 - nC

    Qgs Gate-source charge - 3.2 - nC

    Qgd Gate-drain charge - 11 - nC

  • DocID024079 Rev 3 5/17

    STL8N80K5 Electrical characteristics

    The built-in back-to-back Zener diodes have been specifically designed to enhance not only the device's ESD capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. In this respect, the Zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components.

    Table 6. Switching times

    Symbol Parameter Test conditions Min. Typ. Max Unit

    td(on) Turn-on delay time VDD = 400 V, ID = 3 A, RG = 4.7 W, VGS = 10 V(see Figure 15),(see Figure 20)

    - 12 - ns

    tr Rise time - 14 - ns

    td(off) Turn-off delay time - 32 - ns

    tf Fall time - 20 - ns

    Table 7. Source drain diode

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    ISD Source-drain current - 4.5 A

    ISDM Source-drain current (pulsed) - 18 A

    VSD(1)

    1. Pulsed: pulse duration = 300 s, duty cycle 1.5%

    Forward on voltage ISD = 6 A, VGS = 0 - 1.5 V

    trr Reverse recovery timeISD = 6 A, di/dt = 100 A/sVDD = 60 V (see Figure 17)

    - 300 ns

    Qrr Reverse recovery charge - 3 C

    IRRM Reverse recovery current - 20 A

    trr Reverse recovery time ISD = 6 A, di/dt = 100 A/sVDD = 60 V, Tj = 150 C(see Figure 17)

    - 415 ns

    Qrr Reverse recovery charge - 3.8 C

    IRRM Reverse recovery current - 18 A

    Table 8. Gate-source Zener diode

    Symbol Parameter Test conditions Min Typ. Max Unit

    V(BR)GSO Gate-source breakdown voltage IGS= 1mA, ID=0 30 - - V

  • Electrical characteristics STL8N80K5

    6/17 DocID024079 Rev 3

    2.1 Electrical characteristics (curves)

    Figure 2. Safe operating area Figure 3. Thermal impedance

    ID

    10

    1

    0.1

    0.010.1 1 100 VDS(V)10

    (A)

    Oper

    ation

    in th

    is are

    a is

    Limite

    d by m

    ax RD

    S(on)

    10s

    100s

    1ms

    10msTj=150CTc=25CSingle pulse

    AM15762v1

    Single pulse

    =0.5

    0.050.02

    0.01

    0.1

    0.2

    K

    10 tp(s)-4 10-3

    10-2

    10-1

    10-510-3

    10-2 10-1 100

    pcb

    101

    ZthPowerFlat_5x6_27

    Figure 4. Output characteristics Figure 5. Transfer characteristics

    Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance

    ID

    12

    8

    4

    00 8 VDS(V)16

    (A)

    4 12

    6V

    VGS=10, 11V

    2

    6

    10

    7V

    8V

    9V

    AM15633v1ID

    12

    8

    4

    05 7 VGS(V)9

    (A)

    6 8 10

    2

    6

    10

    VDS=20V

    AM15634v1

    VGS

    6

    4

    2

    00 4 Qg(nC)

    (V)

    16

    8

    8 12

    10

    12

    300

    200

    100

    0

    400

    500

    VDSVDS(V)

    600

    VDD=640VID=6A

    AM15635v1RDS(on)

    1.2

    0.8

    0.4

    01 4 ID(A)

    ()

    3 5

    1.6

    VGS=10V

    62

    AM15636v1

  • DocID024079 Rev 3 7/17

    STL8N80K5 Electrical characteristics

    Figure 8. Capacitance variations Figure 9. Output capacitance stored energy

    Figure 10. Normalized gate threshold voltage vs. temperature

    Figure 11. Normalized on-resistance vs. temperature

    Figure 12. Drain-source diode forward characteristics

    Figure 13. Normalized VDS vs. temperature

    C

    1000

    100

    10

    10.1 10 VDS(V)

    (pF)

    1 100

    Ciss

    Coss

    Crss

    AM15637v1Eoss

    6

    4

    2

    00 VDS(V)

    (J)

    400200 600

    AM15638v1

    VGS(th)

    1

    0.8

    0.6

    0.4-50 0 TJ(C)

    (norm)

    50 100

    ID=100AVDS=VGS

    AM15639v1 RDS(on)

    2

    1.2

    0.4-50 0 TJ(C)

    (norm)

    50 100

    0.8

    1.6

    VGS=10VID=3 A2.4

    AM15640v1

    VSD

    1 3 ISD(A)

    (V)

    2 4 50.5

    0.6

    0.7

    0.8

    0.9

    TJ=-50C

    TJ=150C

    TJ=25C

    AM15641v1 VDS

    -50 0 TJ(C)

    (norm)

    50 1000.9

    0.94

    0.98

    1.02

    1.06

    1.1 ID = 1mA

    AM15642v1

  • Electrical characteristics STL8N80K5

    8/17 DocID024079 Rev 3

    Figure 14. Maximum avalanche energy vs. starting TJ

    EAS

    0 40 TJ(C)

    (mJ)

    800

    20

    40

    120

    60

    80

    100

    VDD=50VID=2A

    AM15643v1

  • DocID024079 Rev 3 9/17

    STL8N80K5 Test circuits

    3 Test circuits

    Figure 15. Switching times test circui