N-channel 650 V, 0.075 typ., 22.5 A MDmesh™ V Power …docs.rs-online.com › dee8 ›...

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This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. September 2012 Doc ID 023354 Rev 1 1/17 17 STL45N65M5 N-channel 650 V, 0.075 Ω typ., 22.5 A MDmesh™ V Power MOSFET in PowerFLAT™ 8x8 HV package Datasheet — preliminary data Features 100% avalanche tested Low input capacitance and gate charge Low gate input resistance Applications Switching applications Description This device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low on- resistance, which is unmatched among silicon- based Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency. Figure 1. Internal schematic diagram Order code V DSS @ T Jmax R DS(on) max I D STL45N65M5 710 V < 0.086 Ω 22.5 A (1) 1. The value is rated according to R thj-case and limited by package. Table 1. Device summary Order code Marking Package Packaging STL45N65M5 45N65M5 PowerFLAT™ 8x8 HV Tape and reel www.st.com

Transcript of N-channel 650 V, 0.075 typ., 22.5 A MDmesh™ V Power …docs.rs-online.com › dee8 ›...

  • This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

    September 2012 Doc ID 023354 Rev 1 1/17

    17

    STL45N65M5

    N-channel 650 V, 0.075 Ω typ., 22.5 A MDmesh™ V Power MOSFET in PowerFLAT™ 8x8 HV package

    Datasheet — preliminary data

    Features

    ■ 100% avalanche tested

    ■ Low input capacitance and gate charge

    ■ Low gate input resistance

    Applications■ Switching applications

    DescriptionThis device is an N-channel MDmesh™ V Power MOSFET based on an innovative proprietary vertical process technology, which is combined with STMicroelectronics’ well-known PowerMESH™ horizontal layout structure. The resulting product has extremely low on-resistance, which is unmatched among silicon-based Power MOSFETs, making it especially suitable for applications which require superior power density and outstanding efficiency.

    Figure 1. Internal schematic diagram

    Order codeVDSS @ TJmax

    RDS(on) max

    ID

    STL45N65M5 710 V < 0.086 Ω 22.5 A(1)

    1. The value is rated according to Rthj-case and limited by package.

    Table 1. Device summary

    Order code Marking Package Packaging

    STL45N65M5 45N65M5 PowerFLAT™ 8x8 HV Tape and reel

    www.st.com

    http://www.st.com

  • Contents STL45N65M5

    2/17 Doc ID 023354 Rev 1

    Contents

    1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

    2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

    2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

    3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

    4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

    5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

    6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

  • STL45N65M5 Electrical ratings

    Doc ID 023354 Rev 1 3/17

    1 Electrical ratings

    Table 2. Absolute maximum ratings

    Symbol Parameter Value Unit

    VDS Drain-source voltage 650 V

    VGS Gate-source voltage ± 25 V

    ID (1)

    1. The value is rated according to Rthj-case and limited by package.

    Drain current (continuous) at TC = 25 °C 22.5 A

    ID (1) Drain current (continuous) at TC = 100 °C 18 A

    IDM (1),(2)

    2. Pulse width limited by safe operating area.

    Drain current (pulsed) 90 A

    ID(3)

    3. When mounted on FR-4 board of inch², 2oz Cu.

    Drain current (continuous) at Tamb = 25 °C 3.8 A

    ID(3) Drain current (continuous) at Tamb = 100 °C 2.4 A

    PTOT (3) Total dissipation at Tamb = 25 °C 2.8 W

    PTOT (1) Total dissipation at TC = 25 °C 160 W

    IARAvalanche current, repetitive or not-repetitive (pulse width limited by Tj max)

    9 A

    EASSingle pulse avalanche energy

    (starting Tj = 25 °C, ID = IAR, VDD = 50 V)810 mJ

    dv/dt (4)

    4. ISD ≤ 22.5 A, di/dt ≤ 400 A/µs, VDD = 400 V, VDS(peak) < V(BR)DSS.

    Peak diode recovery voltage slope 15 V/ns

    Tstg Storage temperature - 55 to 150 °C

    Tj Max. operating junction temperature 150 °C

    Table 3. Thermal data

    Symbol Parameter Value Unit

    Rthj-case Thermal resistance junction-case max 0.78 °C/W

    Rthj-amb(1)

    1. When mounted on FR-4 board of inch², 2oz Cu.

    Thermal resistance junction-ambient max 45 °C/W

  • Electrical characteristics STL45N65M5

    4/17 Doc ID 023354 Rev 1

    2 Electrical characteristics

    (TC = 25 °C unless otherwise specified)

    Table 4. On /off states

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    V(BR)DSSDrain-source breakdown voltage

    ID = 1 mA, VGS = 0 650 V

    IDSSZero gate voltage drain current (VGS = 0)

    VDS = 650 VVDS = 650 V, TC=125 °C

    1100

    µAµA

    IGSSGate-body leakagecurrent (VDS = 0)

    VGS = ± 25 V ±100 nA

    VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V

    RDS(on)Static drain-source on- resistance

    VGS = 10 V, ID = 14.5 A 0.075 0.086 Ω

    Table 5. Dynamic

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    CissCossCrss

    Input capacitance

    Output capacitanceReverse transfer capacitance

    VDS = 100 V, f = 1 MHz,

    VGS = 0-

    3470

    827

    -

    pF

    pFpF

    Co(er)(1)

    1. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS

    Equivalent output capacitance energy related VGS = 0,

    VDS = 0 to 80% V(BR)DSS

    - 79 - pF

    Co(tr)(2)

    2. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS

    Equivalent output capacitance time related

    - 280 - pF

    RGIntrinsic gate resistance

    f = 1 MHz open drain - 2 - Ω

    QgQgsQgd

    Total gate chargeGate-source chargeGate-drain charge

    VDD = 520 V, ID = 17.5 A,VGS = 10 V(see Figure 16)

    -82

    18.535

    -nCnCnC

  • STL45N65M5 Electrical characteristics

    Doc ID 023354 Rev 1 5/17

    Table 6. Switching times

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    td (v)

    tr (v)tf (i)

    tc(off)

    Voltage delay time

    Voltage rise timeCurrent fall timeCrossing time

    VDD = 400 V, ID = 22.5 A,

    RG = 4.7 Ω, VGS = 10 V(see Figure 20)

    -

    79.5

    119.316

    -

    ns

    nsnsns

    Table 7. Source drain diode

    Symbol Parameter Test conditions Min. Typ. Max. Unit

    ISD (1)

    ISDM (1),(2)

    1. The value is rated according to Rthj-case and limited by package.

    2. Pulse width limited by safe operating area

    Source-drain current

    Source-drain current (pulsed)-

    22.5

    90

    A

    A

    VSD (3)

    3. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

    Forward on voltage ISD = 22.5 A, VGS = 0 - 1.5 V

    trrQrr

    IRRM

    Reverse recovery timeReverse recovery charge

    Reverse recovery current

    ISD = 22.5 A, di/dt= 100 A/µs

    VDD = 100 V (see Figure 17)-

    3466

    35

    nsµC

    A

    trrQrr

    IRRM

    Reverse recovery time

    Reverse recovery chargeReverse recovery current

    ISD = 22.5 A, di/dt= 100 A/µs

    VDD = 100 V, Tj = 150 °C(see Figure 17)

    -

    432

    8.439

    ns

    µCA

  • Electrical characteristics STL45N65M5

    6/17 Doc ID 023354 Rev 1

    2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance

    Figure 4. Output characteristics Figure 5. Transfer characteristics

    Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance

    ID

    10

    1

    0.10.1 1 100 VDS(V)10

    (A)

    Ope

    ratio

    n in

    this

    are

    a is

    Lim

    ited

    by m

    ax R

    DS(

    on)

    10µs

    100µs

    1ms

    10ms

    Tj=150°CTc=25°CSingle pulse

    AM14956v1

    10-5

    10-4

    10-3 10

    -2tp(s)

    10-2

    10-1

    K

    0.2

    0.05

    0.02

    0.01

    0.1

    Single pulse

    δ=0.5

    Zth PowerFLAT 8x8 HV

    ID

    60

    40

    20

    00 10 VDS(V)20

    (A)

    5 15 25

    80

    6V

    7V

    VGS=10V

    AM14957v1ID

    60

    40

    20

    04 VGS(V)8

    (A)

    3 6 9

    80

    5 7

    VDS=25V

    AM14958v1

    VGS

    6

    4

    2

    00 20 Qg(nC)

    (V)

    80

    8

    40 60

    10

    VDD=520VID=17.5A

    100

    12

    300

    200

    100

    0

    400

    500

    VDSVDS(V)

    AM14960v1RDS(on)

    0.071

    0.0660 20 ID(A)

    (Ω)

    10 25

    0.076

    0.081

    155

    AM14959v1

  • STL45N65M5 Electrical characteristics

    Doc ID 023354 Rev 1 7/17

    Figure 8. Capacitance variations Figure 9. Output capacitance stored energy

    Figure 10. Normalized gate threshold voltage vs. temperature

    Figure 11. Normalized on-resistance vs. temperature

    Figure 12. Drain-source diode forward characteristics

    Figure 13. Normalized VDS vs. temperature

    C

    1000

    100

    10

    10.1 10 VDS(V)

    (pF)

    1

    10000

    100

    Ciss

    Coss

    Crss

    AM14961v1Eoss

    6

    4

    2

    00 100 VDS(V)

    (µJ)

    400

    8

    200 300

    10

    12

    500 600

    14

    16

    AM14962v1

    VGS(th)

    1.00

    0.90

    0.80

    0.70-50 0 TJ(°C)

    (norm)

    -25

    1.10

    7525 50 100

    ID=250µA

    AM05459v2 RDS(on)

    1.7

    1.3

    0.9

    0.5-50 0 TJ(°C)

    (norm)

    -25 7525 50 100

    0.7

    1.1

    1.5

    1.9

    2.1VGS=10VID=17.5V

    AM05460v2

    VSD

    0 20 ISD(A)

    (V)

    10 5030 400

    0.2

    0.4

    0.6

    0.8

    1.0

    1.2

    TJ=-50°C

    TJ=150°C

    TJ=25°C

    AM05461v1 VDS

    -50 0 TJ(°C)

    (norm)

    -25 7525 50 1000.92

    0.94

    0.96

    0.98

    1.00

    1.04

    1.06

    1.02

    ID = 1mA1.08

    AM10399v1

  • Electrical characteristics STL45N65M5

    8/17 Doc ID 023354 Rev 1

    Figure 14. Switching losses vs. gate resistance (1)

    1. Eon including reverse recovery of a SiC diode

    E

    300

    200

    100

    00 20 RG(Ω)

    (μJ)

    10 30

    400

    500

    600

    40

    ID=23A

    VDD=400V

    Eon

    Eoff

    VGS=10V

    AM14963v1

  • STL45N65M5 Test circuits

    Doc ID 023354 Rev 1 9/17

    3 Test circuits

    Figure 15. Switching times test circuit for resistive load

    Figure 16. Gate charge test circuit

    Figure 17. Test circuit for inductive load switching and diode recovery times

    Figure 18. Unclamped inductive load test circuit

    Figure 19. Unclamped inductive waveform Figure 20. Switching time waveform

    AM01468v1

    VGS

    PW

    VD

    RG

    RL

    D.U.T.

    2200

    μF3.3μF

    VDD

    AM01469v1

    VDD

    47kΩ 1kΩ

    47kΩ

    2.7kΩ

    1kΩ

    12V

    Vi=20V=VGMAX2200μF

    PW

    IG=CONST100Ω

    100nF

    D.U.T.

    VG

    AM01470v1

    AD

    D.U.T.

    SB

    G

    25 Ω

    A A

    BB

    RG

    G

    FASTDIODE

    D

    S

    L=100μH

    μF3.3 1000

    μF VDD

    AM01471v1

    Vi

    Pw

    VD

    ID

    D.U.T.

    L

    2200μF

    3.3μF VDD

    AM01472v1

    V(BR)DSS

    VDDVDD

    VD

    IDM

    ID

    AM05540v2

    Id

    Vgs

    Vds

    90%Vds

    10%Id

    90%Vgs on

    Tdelay-off

    TfallTrise

    Tcross -over

    10%Vds

    90%Id

    Vgs(I(t))

    on

    -off

    TfallTrise

    -

    ))

    Concept waveform for Inductive Load Turn-off

  • Package mechanical data STL45N65M5

    10/17 Doc ID 023354 Rev 1

    4 Package mechanical data

    In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

  • STL45N65M5 Package mechanical data

    Doc ID 023354 Rev 1 11/17

    Table 8. PowerFLAT™ 8x8 HV mechanical data

    Dim.mm

    Min. Typ. Max.

    A 0.80 0.90 1.00

    A1 0.00 0.02 0.05

    b 0.95 1.00 1.05

    D 8.00

    E 8.00

    D2 7.05 7.20 7.30

    E2 4.15 4.30 4.40

    e 2.00

    L 0.40 0.50 0.60

    aaa 0.10

    bbb 0.10

    ccc 0.10

  • Package mechanical data STL45N65M5

    12/17 Doc ID 023354 Rev 1

    Figure 21. PowerFLAT™ 8x8 HV drawing mechanical data

    INDEX AREA

    TOP VIEW

    PLANESEATING

    0.08 C

    BOTTOM VIEW

    SIDE VIEW

    PIN#1 ID

    DE

    b

    A

    E2

    D2

    L0.

    40

    0.20

    ±0.0

    08

    C

    bbb C A B

    BA

    aaa C

    aaa C

    A1

    ccc C

    8222871_Rev_B

  • STL45N65M5 Package mechanical data

    Doc ID 023354 Rev 1 13/17

    Figure 22. PowerFLAT™ 8x8 HV recommended footprint

    7.30

    1.052.00

    7.70

    4.40

    0.60

    Footprint

  • Packaging mechanical data STL45N65M5

    14/17 Doc ID 023354 Rev 1

    5 Packaging mechanical data

    Figure 23. PowerFLAT™ 8x8 HV tape

    Figure 24. PowerFLAT™ 8x8 HV package orientation in carrier tape.

    W (

    16.0

    0±0.

    3)

    E (1.75±0.1)

    F (

    7.50

    ±0.

    1)

    A0 (8.30±0.1)P1 (12.00±0.1)

    P2 (2.0±0.1) P0 (4.0±0.1)

    D0 ( 1.55±0.05)

    D1 ( 1.5 Min)

    T (0.30±0.05)

    B0

    (8.3

    0±0.

    1)

    K0 (1.10±0.1)

    Note: Base and Bulk quantity 3000 pcs

    8229819_Tape_revA

  • STL45N65M5 Packaging mechanical data

    Doc ID 023354 Rev 1 15/17

    Figure 25. PowerFLAT™ 8x8 HV reel

    8229819_Reel_revA

  • Revision history STL45N65M5

    16/17 Doc ID 023354 Rev 1

    6 Revision history

    Table 9. Document revision history

    Date Revision Changes

    20-Sep-2012 1 First release.

  • STL45N65M5

    Doc ID 023354 Rev 1 17/17

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    Figure 1. Internal schematic diagramTable 1. Device summary1 Electrical ratingsTable 2. Absolute maximum ratingsTable 3. Thermal data

    2 Electrical characteristicsTable 4. On /off statesTable 5. DynamicTable 6. Switching timesTable 7. Source drain diode2.1 Electrical characteristics (curves)Figure 2. Safe operating areaFigure 3. Thermal impedanceFigure 4. Output characteristicsFigure 5. Transfer characteristicsFigure 6. Gate charge vs gate-source voltageFigure 7. Static drain-source on-resistanceFigure 8. Capacitance variationsFigure 9. Output capacitance stored energyFigure 10. Normalized gate threshold voltage vs. temperatureFigure 11. Normalized on-resistance vs. temperatureFigure 12. Drain-source diode forward characteristicsFigure 13. Normalized VDS vs. temperatureFigure 14. Switching losses vs. gate resistance

    3 Test circuitsFigure 15. Switching times test circuit for resistive loadFigure 16. Gate charge test circuitFigure 17. Test circuit for inductive load switching and diode recovery timesFigure 18. Unclamped inductive load test circuitFigure 19. Unclamped inductive waveformFigure 20. Switching time waveform

    4 Package mechanical dataTable 8. PowerFLAT™ 8x8 HV mechanical dataFigure 21. PowerFLAT™ 8x8 HV drawing mechanical dataFigure 22. PowerFLAT™ 8x8 HV recommended footprint

    5 Packaging mechanical dataFigure 23. PowerFLAT™ 8x8 HV tapeFigure 24. PowerFLAT™ 8x8 HV package orientation in carrier tape.Figure 25. PowerFLAT™ 8x8 HV reel

    6 Revision historyTable 9. Document revision history