This is information on a product in full production.

December 2014 DocID17439 Rev 3 1/15

15

STL23NM60ND

N-channel 600 V, 0.175 Ω typ., 19.5 A, FDmesh™ II Power MOSFET (with fast diode) in PowerFLAT™ 8x8 HV package

Datasheet − production data

Figure 1. Internal schematic diagram

Features

• Fast-recovery body diode

• Low gate charge and input capacitance

• Low on-resistance

• 100% avalanche tested

• High dv/dt ruggedness

Applications• Switching applications

DescriptionThis FDmesh™ II Power MOSFET with fast-recovery body diode is produced using MDmesh™ II technology. Utilizing a new strip-layout vertical structure, this device features low on-resistance and superior switching performance. It is ideal for bridge topologies and ZVS phase-shift converters.

Order code VDS @ TJmax RDS(on) max ID

STL23NM60ND 650 V 0.199 Ω 19.5 A

Table 1. Device summary

Order code Marking Package Packaging

STL23NM60ND 23NM60ND PowerFLAT™ 8x8 HV Tape and reel

www.st.com

Contents STL23NM60ND

2/15 DocID17439 Rev 3

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

DocID17439 Rev 3 3/15

STL23NM60ND Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 600 V

VGS Gate-source voltage ± 25 V

ID(1)

1. The value is rated according to Rthj-case

Drain current (continuous) at TC = 25 °C 19.5 A

ID(1) Drain current (continuous) at TC = 100 °C 11.7 A

IDM(1),(2)

2. Pulse width limited by safe operating area.

Drain current (pulsed) 78 A

ID(3)

3. When mounted on FR-4 board of inch², 2oz Cu.

Drain current (continuous) at Tamb = 25 °C 2.75 A

ID(3) Drain current (continuous) at Tamb = 100 °C 1.75 A

IDM(2),(3) Drain current (pulsed) 11 A

PTOT(1) Total dissipation at Tc = 25 °C 150 W

PTOT(3) Total dissipation at Tamb = 25 °C 3 W

IARAvalanche current, repetitive or not-repetitive (pulse width limited by Tj max)

9 A

EASSingle pulse avalanche energy(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

700 mJ

dv/dt (4)

4. ISD ≤ 19.5 A, di/dt ≤ 600 A/µs, VDD = 80% V(BR)DSS, VDS(peak) < V(BR)DSS

Peak diode recovery voltage slope 40 V/ns

Tstg Storage temperature - 55 to 150 °C

Tj Max. operating junction temperature 150 °C

Table 3. Thermal data

Symbol Parameter Value Unit

Rthj-case Thermal resistance junction-case max 0.83 °C/W

Rthj-amb(1)

1. When mounted on FR-4 board of inch², 2oz Cu.

Thermal resistance junction-ambient max 45 °C/W

Electrical characteristics STL23NM60ND

4/15 DocID17439 Rev 3

2 Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 4. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-source breakdown voltage

VGS = 0, ID = 1 mA 600 V

dv/dt(1)

1. Characteristic value at turn off on inductive load

Drain-source voltage slope

VDD = 480 V, ID = 19.5 A, VGS = 10 V

30 V/ns

IDSSZero gate voltage drain current

VGS = 0, VDS = 600V 1 µA

VGS = 0, VDS = 600 V, TC = 125 °C

100 µA

IGSSGate-body leakage

currentVDS = 0, VGS = ± 20 V ± 100 nA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 5 V

RDS(on)Static drain-source on- resistance

VGS = 10 V, ID = 10 A 0.175 0.199 Ω

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

Ciss Input capacitance

VDS = 50 V, f = 1 MHz, VGS = 0

- 2100 - pF

Coss Output capacitance - 80 - pF

Crss Reverse transfer capacitance - 10 - pF

Coss eq(1)

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS

Equivalent output capacitance

VGS = 0, VDS = 0 to 480 V - 310 - pF

RGIntrinsic gate resistance

f = 1 MHz, gate DC Bias = 0, test signal level = 20 mV

- 4 - Ω

Qg Total gate chargeVDD = 480 V, ID = 19.5 A, VGS = 10 V, (see Figure 14)

- 69 - nC

Qgs Gate-source charge - 13 - nC

Qgd Gate-drain charge - 35 - nC

DocID17439 Rev 3 5/15

STL23NM60ND Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

td(on) Turn-on delay time

VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V

(see Figure 13)

- 21 - ns

tr Voltage rise time - 19 - ns

td(off) Turn-off delay time - 92 - ns

tf Current fall time - 42 - ns

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

ISD Source-drain current - 19.5 A

ISDM(1)

1. Pulse width limited by safe operating area

Source-drain current (pulsed) - 78 A

VSD (2)

2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%

Forward on voltage ISD = 19.5 A, VGS = 0 - 1.3 V

trr Reverse recovery timeISD = 19.5 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 15)

- 190 ns

Qrr Reverse recovery charge - 1.2 µC

IRRM Reverse recovery current - 13 A

trr Reverse recovery time ISD = 19.5 A, di/dt = 100 A/µs, VDD = 100 V, Tj = 150 °C (see Figure 15)

- 270 ns

Qrr Reverse recovery charge - 2.0 µC

IRRM Reverse recovery current - 15 A

Electrical characteristics STL23NM60ND

6/15 DocID17439 Rev 3

2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance

Figure 4. Output characteristics Figure 5. Transfer characteristics

Figure 6. Normalized B(BR)DSS vs temperature Figure 7. Static drain-source on-resistance

ID

10

1

0.10.1 1 100 VDS(V)10

(A)

Opera

tion i

n this

area

is

limite

d by m

ax R DS(

on) 10μs

100μs

1ms

10ms

Tj=150°CTc=25°CSingle pulse

AM11319v1

10-2

10-5 10-4 10-3 10-2 tp(s)

10-1

K

0.2

0.05

0.02

0.01

0.1

Single pulse

δ=0.5

tp

Ƭ

Zth = k RthJ-c

δ = tp / Ƭ

Zth PowerFLAT 8x8 HV

5 V

6 V

7 V

VGS = 10 V

ID

30

20

10

00 10 VDS(V)20

(A)

5 15 25

40

50

30

AM14794v1 ID

30

20

10

00 4 VGS(V)8

(A)

2 6

40

50VDS= 20 V

AM14795v1

V(BR)DSS

-50 0 TJ(°C)

(norm)

-25 7525 50 1000.920.94

0.96

0.98

1.00

1.02

1.04

1.06

ID=1mA

1.08

1.10

AM09028v1 RDS(on)

0.16

0.14

0.12

0.100 6 ID(A)

(Ω)

3 9

0.18

0.20

VGS=10V

12

AM11320v1

DocID17439 Rev 3 7/15

STL23NM60ND Electrical characteristics

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

Figure 10. Normalized gate threshold voltage vs temperature

Figure 11. Normalized on-resistance vs temperature

Figure 12. Source-drain diode forward characteristics

VGS

6

4

2

00 20 Qg(nC)

(V)

80

8

40 60

10

VDD=480V12 ID=19.5A

AM01537v1 C

1000

100

10

10.1 10 VDS(V)

(pF)

1

10000

100

Ciss

Coss

Crss

AM01538v1

Test circuits STL23NM60ND

8/15 DocID17439 Rev 3

3 Test circuits

Figure 13. Switching times test circuit for resistive load

Figure 14. Gate charge test circuit

Figure 15. Test circuit for inductive load switching and diode recovery times

Figure 16. Unclamped inductive load test circuit

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

AM01468v1

VGS

PW

VD

RG

RL

D.U.T.

2200

μF3.3μF

VDD

AM01469v1

VDD

47kΩ 1kΩ

47kΩ

2.7kΩ

1kΩ

12V

Vi=20V=VGMAX

2200μF

PW

IG=CONST100Ω

100nF

D.U.T.

VG

AM01470v1

AD

D.U.T.

SB

G

25 Ω

A A

BB

RG

G

FASTDIODE

D

S

L=100μH

μF3.3 1000

μF VDD

AM01471v1

Vi

Pw

VD

ID

D.U.T.

L

2200μF

3.3μF VDD

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

AM01473v1

VDS

ton

tdon tdoff

toff

tftr

90%

10%

10%

0

0

90%

90%

10%

VGS

DocID17439 Rev 3 9/15

STL23NM60ND Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Package mechanical data STL23NM60ND

10/15 DocID17439 Rev 3

Figure 19. PowerFLAT™ 8x8 HV drawing mechanical data

DocID17439 Rev 3 11/15

STL23NM60ND Package mechanical data

Table 8. PowerFLAT™ 8x8 HV mechanical data

Dim.mm

Min. Typ. Max.

A 0.80 0.90 1.00

A1 0.00 0.02 0.05

b 0.95 1.00 1.05

D 8.00

E 8.00

D2 7.05 7.20 7.30

E2 4.15 4.30 4.40

e 2.00

L 0.40 0.50 0.60

Figure 20. PowerFLAT™ 8x8 HV recommended footprint

8222871_REV_C_footprint

Packaging mechanical data STL23NM60ND

12/15 DocID17439 Rev 3

5 Packaging mechanical data

Figure 21. PowerFLAT™ 8x8 HV tape

Figure 22. PowerFLAT™ 8x8 HV package orientation in carrier tape.

W (

16.0

0±0.

3)

E (1.75±0.1)

F (

7.50

±0.

1)

A0 (8.30±0.1)P1 (12.00±0.1)

P2 (2.0±0.1) P0 (4.0±0.1)

D0 ( 1.55±0.05)

D1 ( 1.5 Min)

T (0.30±0.05)

B0

(8.3

0±0.

1)

K0 (1.10±0.1)

Note: Base and Bulk quantity 3000 pcs

8229819_Tape_revA

DocID17439 Rev 3 13/15

STL23NM60ND Packaging mechanical data

Figure 23. PowerFLAT™ 8x8 HV reel

8229819_Reel_revA

Revision history STL23NM60ND

14/15 DocID17439 Rev 3

6 Revision history

Table 9. Document revision history

Date Revision Changes

28-Apr-2010 1 First release.

01-Mar-2013 2

– Section 4: Package mechanical data has been modified.– Section 2.1: Electrical characteristics (curves) has beeninserted.

– Minor text changes.

17-Dec-2014 3

Minor text and formatting changes throughout document.

On Cover page, updated Features and Description.In Table 2: Absolute maximum ratings, changed Values for both PTOT rows.In Table 7: Source drain diode, changed Units for both Qrr rows.In Figure 3: Thermal impedance, added inset with plot and formulas.

In Section 3: Test circuits, updated figures.In Section 4: Package mechanical data, updated figures and tables.

DocID17439 Rev 3 15/15

STL23NM60ND

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