N-channel 100 V, 0.0145 typ., 45 A, STripFET™ VII DeepGATE ... · N-channel 100 V, 0.0145 Ω...

This is information on a product in full production.

October 2013 DocID024455 Rev 1 1/19

STD45N10F7, STI45N10F7, STP45N10F7

N-channel 100 V, 0.0145 Ω typ., 45 A, STripFET™ VII DeepGATE™ Power MOSFETs in DPAK, I2PAK and TO-220 packages

Datasheet - production data

Figure 1. Internal schematic diagram

Features

• Ultra low on-resistance

• 100% avalanche tested

Applications• Switching applications

DescriptionThese devices utilize the 7th generation of design rules of ST’s proprietary STripFET™ technology, with a new gate structure. The resulting Power MOSFET exhibits the lowest RDS(on) in all packages.

1 23

TAB

123

TAB

DPAK

13

TAB

TO-220

I PAK2

Order codes VDSRDS(on) max.(1)

1. @ VGS = 10 V

ID PTOT

STD45N10F7

100 V 0.018 Ω 45 A 60 WSTI45N10F7

STP45N10F7

Table 1. Device summary

Order codes Marking Package Packaging

STD45N10F7

45N10F7

DPAK Tape and reel

STI45N10F7 I2PAKTube

STP45N10F7 TO-220

www.st.com

http://www.st.com

Contents STD45N10F7, STI45N10F7, STP45N10F7

2/19 DocID024455 Rev 1

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

DocID024455 Rev 1 3/19

STD45N10F7, STI45N10F7, STP45N10F7 Electrical ratings

19

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

VDS Drain-source voltage 100 V

VGS Gate-source voltage 20 V

ID Drain current (continuous) at TC = 25 °C 45 A

ID Drain current (continuous) at TC = 100 °C 32 A

IDM(1)

1. Pulse width limited by safe operating area.

Drain current (pulsed) 180 A

PTOT Total dissipation at Tc = 25 °C 60 W

TJ Operating junction temperature-55 to 175

°C

Tstg Storage temperature °C

Table 3. Thermal resistance

Symbol Parameter

Value

UnitDPAK

TO-220

I2PAK

Rthj-case Thermal resistance junction-case 2.5 2.5 °C/W

Rthj-amb Thermal resistance junction-ambient 62.5 °C/W

Rthj-pcb (1)

1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec.

Thermal resistance junction-pcb 31.2 °C/W

Electrical characteristics STD45N10F7, STI45N10F7, STP45N10F7

4/19 DocID024455 Rev 1

2 Electrical characteristics

(TCASE = 25 °C unless otherwise specified)

Table 4. On/off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V(BR)DSSDrain-source breakdown voltage (VGS= 0)

ID = 1 mA 100 - V

IDSSZero gate voltage drain current (VGS = 0)

VDS = 100 V 10 µA

VDS = 100 V; TC =125 °C 100 µA

IGSSGate body leakage current

(VDS = 0)VGS = 20 V 100 nA

VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2.5 4.5 V

RDS(on)Static drain-source on- resistance

VGS = 10 V, ID = 22.5 A 0.0145 0.018 Ω

Table 5. Dynamic


Ciss Input capacitance

VDS = 50 V, f =1 MHz, VGS = 0

- 1640 - pF

Coss Output capacitance - 360 - pF

CrssReverse transfer capacitance

- 25 - pF

Qg Total gate charge VDD = 50 V, ID = 45 A VGS = 10 VFigure 14

- 25 - nC

Qgs Gate-source charge - 5.1 - nC

Qgd Gate-drain charge - 12.2 - nC

Table 6. Switching times


td(on) Turn-on delay timeVDD = 50 V, ID = 22.5 A, RG = 4.7 Ω, VGS = 10 V

Figure 13

- 15 - ns

tr Rise time - 17 - ns

td(off) Turn-off delay time - 24 - ns

tf Fall time - 8 - ns

DocID024455 Rev 1 5/19

STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics

19

Table 7. Source-drain diode


ISD Source-drain current - 45 A

ISDM(1)

1. Pulse width limited by safe operating area.

Source-drain current (pulsed) - 180 A

VSD(2)

2. Pulsed: pulse duration=300 µs, duty cycle 1.5%.

Forward on voltage ISD = 45 A, VGS = 0 - 1.1 V

trr Reverse recovery time ISD = 45 A, di/dt = 100 A/µs,VDD = 80 V, Tj = 150 °C

- 53 ns

Qrr Reverse recovery charge - 67 nC

IRRM Reverse recovery current - 2.5 A

Electrical characteristics STD45N10F7, STI45N10F7, STP45N10F7

6/19 DocID024455 Rev 1

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

ID

10

1

0.1

0.1 1 VDS(V)10

(A)

Operation in this area is

Limited by max RDS(on)

100µs

1ms

10ms

0.01

Tj=175°CTc=25°CSingle pulse

100

AM16107v1

Single pulse

0.050.020.01

δ=0.5

0.20.1

K

10 tp(s)-4 10-3

10-1

10-510-2

10-2 10-1 100

AM16120v1

Figure 4. Output characteristics Figure 5. Transfer characteristics

ID

100

60

20

00 2 VDS(V)4

(A)

6

5V

6V

VGS=10V

40

80

8

120

140

160

7V

8V

9V

AM16109v1ID

120

80

40

00 4 VGS(V)8

(A)

2 6 10

20

60

100

140

VDS=8V

AM16110v1

Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance

VGS

6

4

2

00 10 Qg(nC)

(V)

30

8

15 20

10

VDD=50V12

5 25

ID=45A

AM16111v1 RDS(on)

14

13.5

1310 ID(A)

(mΩ)

5 15

14.5

VGS=10V

20 25

15

15.5

16

30 35 40

16.5

AM16112v1

DocID024455 Rev 1 7/19

STD45N10F7, STI45N10F7, STP45N10F7 Electrical characteristics

19

Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature

C

1000

100

00 20 VDS(V)

(pF)

Ciss

Coss

Crss

40 60 80

AM16114v1 VGS(th)

0.8

0.6

0.4

0.2-75 0 TJ(°C)

(norm)

-50

1

7525 50 100

ID=250µA

-50 125150

1.2

AM16115v1

Figure 10. Normalized on-resistance vs temperature

Figure 11. Source-drain diode forward characteristics

RDS(on)

2

1

0-75 0 TJ(°C)

(norm)

-50 7525 50 100

0.5

1.5

-25 125

ID=22.5AVGS=10 V

AM16116v1VSD

5 15 ISD(A)

(V)

10 3020 250.4

0.5

0.6

0.7

TJ=-55°C

TJ=175°C

TJ=25°C

0.8

0.9

35 40

1

AM16117v1

Figure 12. Normalized V(BR)DS vs temperature

V

-75 0 TJ(°C)

(norm)

-50 7525 50 1000.96

0.97

0.98

0.99

1

1.01

1.02

1.03

ID=1mA1.04

-25 125

(BR)DSAM16119v1

Test circuits STD45N10F7, STI45N10F7, STP45N10F7

8/19 DocID024455 Rev 1

3 Test circuits

Figure 13. Switching times test circuit for resistive load

Figure 14. Gate charge test circuit

Figure 15. Test circuit for inductive load switching and diode recovery times

Figure 16. Unclamped inductive load test circuit

Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform

AM01468v1

VGS

PW

VD

RG

RL

D.U.T.

2200

μF3.3μF

VDD

AM01469v1

VDD

47kΩ 1kΩ

47kΩ

2.7kΩ

1kΩ

12V

Vi=20V=VGMAX

2200μF

PW

IG=CONST100Ω

100nF

D.U.T.

VG

AM01470v1

AD

D.U.T.

SB

G

25 Ω

A A

BB

RG

G

FASTDIODE

D

S

L=100μH

μF3.3 1000

μF VDD

AM01471v1

Vi

Pw

VD

ID

D.U.T.

L

2200μF

3.3μF VDD

AM01472v1

V(BR)DSS

VDDVDD

VD

IDM

ID

AM01473v1

VDS

ton

tdon tdoff

toff

tftr

90%

10%

10%

0

0

90%

90%

10%

VGS

DocID024455 Rev 1 9/19

STD45N10F7, STI45N10F7, STP45N10F7 Package mechanical data

19

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

http://www.st.com

Package mechanical data STD45N10F7, STI45N10F7, STP45N10F7

10/19 DocID024455 Rev 1

Table 8. DPAK (TO-252) type A mechanical data

Dim.mm

Min. Typ. Max.

A 2.20 2.40

A1 0.90 1.10

A2 0.03 0.23

b 0.64 0.90

b4 5.20 5.40

c 0.45 0.60

c2 0.48 0.60

D 6.00 6.20

D1 5.10

E 6.40 6.60

E1 4.70

e 2.28

e1 4.40 4.60

H 9.35 10.10

L 1.00 1.50

(L1) 2.80

L2 0.80

L4 0.60 1.00

R 0.20

V2 0° 8°

DocID024455 Rev 1 11/19


19

Figure 19. DPAK (TO-252) type A drawing

0068772_L_type_A


12/19 DocID024455 Rev 1

Figure 20. DPAK footprint (a)

a. All dimensions are in millimeters

Footprint_REV_L

DocID024455 Rev 1 13/19


19

Figure 21. I²PAK (TO-262) drawings

Table 9. I²PAK (TO-262) mechanical data

Dim.mm

Min. Typ. Max.

A 4.40 4.60

A1 2.40 2.72

b 0.61 0.88

b1 1.14 1.70

c 0.49 0.70

c2 1.23 1.32

D 8.95 9.35

e 2.40 2.70

e1 4.95 5.15

E 10 10.40

L 13 14

L1 3.50 3.93

L2 1.27 1.40

0004982_Rev_H


14/19 DocID024455 Rev 1

Table 10. TO-220 type A mechanical data

Dim.mm

Min. Typ. Max.

A 4.40 4.60

b 0.61 0.88

b1 1.14 1.70

c 0.48 0.70

D 15.25 15.75

D1 1.27

E 10 10.40

e 2.40 2.70

e1 4.95 5.15

F 1.23 1.32

H1 6.20 6.60

J1 2.40 2.72

L 13 14

L1 3.50 3.93

L20 16.40

L30 28.90

∅P 3.75 3.85

Q 2.65 2.95

DocID024455 Rev 1 15/19


19

Figure 22. TO-220 type A drawing

Packaging mechanical data STD45N10F7, STI45N10F7, STP45N10F7

16/19 DocID024455 Rev 1

5 Packaging mechanical data

Table 11. DPAK (TO-252) tape and reel mechanical data

Tape Reel

Dim.mm

Dim.mm

Min. Max. Min. Max.

A0 6.8 7 A 330

B0 10.4 10.6 B 1.5

B1 12.1 C 12.8 13.2

D 1.5 1.6 D 20.2

D1 1.5 G 16.4 18.4

E 1.65 1.85 N 50

F 7.4 7.6 T 22.4

K0 2.55 2.75

P0 3.9 4.1 Base qty. 2500

P1 7.9 8.1 Bulk qty. 2500

P2 1.9 2.1

R 40

T 0.25 0.35

W 15.7 16.3

DocID024455 Rev 1 17/19

STD45N10F7, STI45N10F7, STP45N10F7 Packaging mechanical data

19

Figure 23. Tape

Figure 24. Reel

P1A0 D1

P0

F

W

E

D

B0K0

T

User direction of feed

P2

10 pitches cumulativetolerance on tape +/- 0.2 mm

User direction of feed

R

Bending radius

B1

For machine ref. onlyincluding draft andradii concentric around B0

AM08852v1

Top covertape

A

D

B

Full radius G measured at hub

C

N

REEL DIMENSIONS

40mm min.

Access hole

At slot location

T

Tape slot in core fortape start 25 mm min.width

AM08851v2

Revision history STD45N10F7, STI45N10F7, STP45N10F7

18/19 DocID024455 Rev 1

6 Revision history

Table 12. Document revision history

Date Revision Changes

10-Oct-2013 1 First release.

DocID024455 Rev 1 19/19

STD45N10F7, STI45N10F7, STP45N10F7

19

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N-channel 100 V, 0.0145 typ., 45 A, STripFET™ VII DeepGATE ... · N-channel 100 V, 0.0145 Ω...

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